xref: /linux/drivers/gpu/nova-core/mctp.rs (revision 944a0fedca7ed226685d3b965dd1371ff34b3017)
1 // SPDX-License-Identifier: GPL-2.0
2 // SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
3 
4 //! MCTP/NVDM protocol types for NVIDIA GPU firmware communication.
5 //!
6 //! MCTP (Management Component Transport Protocol) carries NVDM (NVIDIA
7 //! Data Model) messages between the kernel driver and GPU firmware processors
8 //! such as FSP and GSP.
9 
10 #![expect(dead_code)]
11 
12 use kernel::pci::Vendor;
13 
14 /// NVDM message type identifiers carried over MCTP.
15 #[derive(Debug, Clone, Copy, Default, PartialEq, Eq)]
16 #[repr(u8)]
17 pub(crate) enum NvdmType {
18     #[default]
19     /// Chain of Trust boot message.
20     Cot = 0x14,
21     /// FSP command response.
22     FspResponse = 0x15,
23 }
24 
25 impl TryFrom<u8> for NvdmType {
26     type Error = u8;
27 
28     fn try_from(value: u8) -> Result<Self, Self::Error> {
29         match value {
30             x if x == u8::from(Self::Cot) => Ok(Self::Cot),
31             x if x == u8::from(Self::FspResponse) => Ok(Self::FspResponse),
32             _ => Err(value),
33         }
34     }
35 }
36 
37 impl From<NvdmType> for u8 {
38     fn from(value: NvdmType) -> Self {
39         value as u8
40     }
41 }
42 
43 bitfield! {
44     pub(crate) struct MctpHeader(u32), "MCTP transport header for NVIDIA firmware messages." {
45         31:31 som as bool, "Start-of-message bit.";
46         30:30 eom as bool, "End-of-message bit.";
47         29:28 seq as u8, "Packet sequence number.";
48         23:16 seid as u8, "Source endpoint ID.";
49     }
50 }
51 
52 impl MctpHeader {
53     /// Builds a single-packet MCTP header (`SOM=1`, `EOM=1`, `SEQ=0`, `SEID=0`).
54     pub(crate) fn single_packet() -> Self {
55         Self::default().set_som(true).set_eom(true)
56     }
57 
58     /// Returns whether this is a complete single-packet message (`SOM=1` and `EOM=1`).
59     pub(crate) fn is_single_packet(self) -> bool {
60         self.som() && self.eom()
61     }
62 }
63 
64 /// MCTP message type for PCI vendor-defined messages.
65 const MSG_TYPE_VENDOR_PCI: u8 = 0x7e;
66 
67 bitfield! {
68     pub(crate) struct NvdmHeader(u32), "NVIDIA Vendor-Defined Message header over MCTP." {
69         31:24 nvdm_type as u8 ?=> NvdmType, "NVDM message type.";
70         23:8 vendor_id as u16, "PCI vendor ID.";
71         6:0 msg_type as u8, "MCTP vendor-defined message type.";
72     }
73 }
74 
75 impl NvdmHeader {
76     /// Builds an NVDM header for the given message type.
77     pub(crate) fn new(nvdm_type: NvdmType) -> Self {
78         Self::default()
79             .set_msg_type(MSG_TYPE_VENDOR_PCI)
80             .set_vendor_id(Vendor::NVIDIA.as_raw())
81             .set_nvdm_type(nvdm_type)
82     }
83 
84     /// Validates this header against the expected NVIDIA NVDM format and type.
85     pub(crate) fn validate(self, expected_type: NvdmType) -> bool {
86         self.msg_type() == MSG_TYPE_VENDOR_PCI
87             && self.vendor_id() == Vendor::NVIDIA.as_raw()
88             && matches!(self.nvdm_type(), Ok(nvdm_type) if nvdm_type == expected_type)
89     }
90 }
91