1 // SPDX-License-Identifier: GPL-2.0 2 3 use crate::driver::Bar0; 4 use crate::fb::hal::FbHal; 5 use crate::regs; 6 use kernel::prelude::*; 7 8 /// Shift applied to the sysmem address before it is written into `NV_PFB_NISO_FLUSH_SYSMEM_ADDR`, 9 /// to be used by HALs. 10 pub(super) const FLUSH_SYSMEM_ADDR_SHIFT: u32 = 8; 11 12 pub(super) fn read_sysmem_flush_page_gm107(bar: &Bar0) -> u64 { 13 u64::from(regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR::read(bar).adr_39_08()) << FLUSH_SYSMEM_ADDR_SHIFT 14 } 15 16 pub(super) fn write_sysmem_flush_page_gm107(bar: &Bar0, addr: u64) -> Result { 17 // Check that the address doesn't overflow the receiving 32-bit register. 18 u32::try_from(addr >> FLUSH_SYSMEM_ADDR_SHIFT) 19 .map_err(|_| EINVAL) 20 .map(|addr| { 21 regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR::default() 22 .set_adr_39_08(addr) 23 .write(bar) 24 }) 25 } 26 27 pub(super) fn display_enabled_gm107(bar: &Bar0) -> bool { 28 !regs::gm107::NV_FUSE_STATUS_OPT_DISPLAY::read(bar).display_disabled() 29 } 30 31 pub(super) fn vidmem_size_gp102(bar: &Bar0) -> u64 { 32 regs::NV_PFB_PRI_MMU_LOCAL_MEMORY_RANGE::read(bar).usable_fb_size() 33 } 34 35 struct Tu102; 36 37 impl FbHal for Tu102 { 38 fn read_sysmem_flush_page(&self, bar: &Bar0) -> u64 { 39 read_sysmem_flush_page_gm107(bar) 40 } 41 42 fn write_sysmem_flush_page(&self, bar: &Bar0, addr: u64) -> Result { 43 write_sysmem_flush_page_gm107(bar, addr) 44 } 45 46 fn supports_display(&self, bar: &Bar0) -> bool { 47 display_enabled_gm107(bar) 48 } 49 50 fn vidmem_size(&self, bar: &Bar0) -> u64 { 51 vidmem_size_gp102(bar) 52 } 53 } 54 55 const TU102: Tu102 = Tu102; 56 pub(super) const TU102_HAL: &dyn FbHal = &TU102; 57