xref: /linux/drivers/gpu/nova-core/fb/hal/ga102.rs (revision bba2c3615bd6cfee7456d1130f2e6b01b3f4e9ba)
1 // SPDX-License-Identifier: GPL-2.0
2 // SPDX-FileCopyrightText: Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
3 
4 use kernel::{
5     io::Io,
6     prelude::*, //
7 };
8 
9 use crate::{
10     driver::Bar0,
11     fb::hal::FbHal,
12     regs, //
13 };
14 
15 pub(super) fn vidmem_size_ga102(bar: Bar0<'_>) -> u64 {
16     bar.read(regs::NV_USABLE_FB_SIZE_IN_MB).usable_fb_size()
17 }
18 
19 struct Ga102;
20 
21 impl FbHal for Ga102 {
22     fn read_sysmem_flush_page(&self, bar: Bar0<'_>) -> u64 {
23         super::ga100::read_sysmem_flush_page_ga100(bar)
24     }
25 
26     fn write_sysmem_flush_page(&self, bar: Bar0<'_>, addr: u64) -> Result {
27         super::ga100::write_sysmem_flush_page_ga100(bar, addr);
28 
29         Ok(())
30     }
31 
32     fn supports_display(&self, bar: Bar0<'_>) -> bool {
33         super::ga100::display_enabled_ga100(bar)
34     }
35 
36     fn vidmem_size(&self, bar: Bar0<'_>) -> u64 {
37         vidmem_size_ga102(bar)
38     }
39 
40     fn pmu_reserved_size(&self) -> u32 {
41         super::tu102::pmu_reserved_size_tu102()
42     }
43 
44     fn non_wpr_heap_size(&self) -> u32 {
45         super::tu102::non_wpr_heap_size_tu102()
46     }
47 
48     fn frts_size(&self) -> u64 {
49         super::tu102::frts_size_tu102()
50     }
51 }
52 
53 const GA102: Ga102 = Ga102;
54 pub(super) const GA102_HAL: &dyn FbHal = &GA102;
55