1 // SPDX-License-Identifier: GPL-2.0 2 3 struct Ga100; 4 5 use kernel::prelude::*; 6 7 use crate::driver::Bar0; 8 use crate::fb::hal::FbHal; 9 use crate::regs; 10 11 use super::tu102::FLUSH_SYSMEM_ADDR_SHIFT; 12 13 pub(super) fn read_sysmem_flush_page_ga100(bar: &Bar0) -> u64 { 14 (regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR::read(bar).adr_39_08() as u64) << FLUSH_SYSMEM_ADDR_SHIFT 15 | (regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR_HI::read(bar).adr_63_40() as u64) 16 << FLUSH_SYSMEM_ADDR_SHIFT_HI 17 } 18 19 pub(super) fn write_sysmem_flush_page_ga100(bar: &Bar0, addr: u64) { 20 regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR_HI::default() 21 .set_adr_63_40((addr >> FLUSH_SYSMEM_ADDR_SHIFT_HI) as u32) 22 .write(bar); 23 regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR::default() 24 .set_adr_39_08((addr >> FLUSH_SYSMEM_ADDR_SHIFT) as u32) 25 .write(bar); 26 } 27 28 /// Shift applied to the sysmem address before it is written into 29 /// `NV_PFB_NISO_FLUSH_SYSMEM_ADDR_HI`, 30 const FLUSH_SYSMEM_ADDR_SHIFT_HI: u32 = 40; 31 32 impl FbHal for Ga100 { 33 fn read_sysmem_flush_page(&self, bar: &Bar0) -> u64 { 34 read_sysmem_flush_page_ga100(bar) 35 } 36 37 fn write_sysmem_flush_page(&self, bar: &Bar0, addr: u64) -> Result { 38 write_sysmem_flush_page_ga100(bar, addr); 39 40 Ok(()) 41 } 42 } 43 44 const GA100: Ga100 = Ga100; 45 pub(super) const GA100_HAL: &dyn FbHal = &GA100; 46