1 // SPDX-License-Identifier: GPL-2.0 2 3 use kernel::prelude::*; 4 5 use crate::{ 6 driver::Bar0, 7 gpu::{ 8 Architecture, 9 Chipset, // 10 }, 11 }; 12 13 mod ga100; 14 mod ga102; 15 mod tu102; 16 17 pub(crate) trait FbHal { 18 /// Returns the address of the currently-registered sysmem flush page. 19 fn read_sysmem_flush_page(&self, bar: &Bar0) -> u64; 20 21 /// Register `addr` as the address of the sysmem flush page. 22 /// 23 /// This might fail if the address is too large for the receiving register. 24 fn write_sysmem_flush_page(&self, bar: &Bar0, addr: u64) -> Result; 25 26 /// Returns `true` is display is supported. 27 fn supports_display(&self, bar: &Bar0) -> bool; 28 29 /// Returns the VRAM size, in bytes. 30 fn vidmem_size(&self, bar: &Bar0) -> u64; 31 32 /// Returns the FRTS size, in bytes. 33 fn frts_size(&self) -> u64; 34 } 35 36 /// Returns the HAL corresponding to `chipset`. 37 pub(super) fn fb_hal(chipset: Chipset) -> &'static dyn FbHal { 38 match chipset.arch() { 39 Architecture::Turing => tu102::TU102_HAL, 40 Architecture::Ampere if chipset == Chipset::GA100 => ga100::GA100_HAL, 41 Architecture::Ampere => ga102::GA102_HAL, 42 Architecture::Ada 43 | Architecture::Hopper 44 | Architecture::BlackwellGB10x 45 | Architecture::BlackwellGB20x => ga102::GA102_HAL, 46 } 47 } 48