1 // SPDX-License-Identifier: GPL-2.0 2 3 use core::marker::PhantomData; 4 5 use kernel::{ 6 device, 7 io::poll::read_poll_timeout, 8 prelude::*, 9 time::Delta, // 10 }; 11 12 use crate::{ 13 driver::Bar0, 14 falcon::{ 15 hal::LoadMethod, 16 Falcon, 17 FalconBromParams, 18 FalconEngine, 19 FalconModSelAlgo, 20 PeregrineCoreSelect, // 21 }, 22 regs, 23 }; 24 25 use super::FalconHal; 26 27 fn select_core_ga102<E: FalconEngine>(bar: &Bar0) -> Result { 28 let bcr_ctrl = regs::NV_PRISCV_RISCV_BCR_CTRL::read(bar, &E::ID); 29 if bcr_ctrl.core_select() != PeregrineCoreSelect::Falcon { 30 regs::NV_PRISCV_RISCV_BCR_CTRL::default() 31 .set_core_select(PeregrineCoreSelect::Falcon) 32 .write(bar, &E::ID); 33 34 // TIMEOUT: falcon core should take less than 10ms to report being enabled. 35 read_poll_timeout( 36 || Ok(regs::NV_PRISCV_RISCV_BCR_CTRL::read(bar, &E::ID)), 37 |r| r.valid(), 38 Delta::ZERO, 39 Delta::from_millis(10), 40 )?; 41 } 42 43 Ok(()) 44 } 45 46 fn signature_reg_fuse_version_ga102( 47 dev: &device::Device, 48 bar: &Bar0, 49 engine_id_mask: u16, 50 ucode_id: u8, 51 ) -> Result<u32> { 52 // Each engine has 16 ucode version registers numbered from 1 to 16. 53 let ucode_idx = match usize::from(ucode_id) { 54 ucode_id @ 1..=regs::NV_FUSE_OPT_FPF_SIZE => ucode_id - 1, 55 _ => { 56 dev_err!(dev, "invalid ucode id {:#x}\n", ucode_id); 57 return Err(EINVAL); 58 } 59 }; 60 61 // `ucode_idx` is guaranteed to be in the range [0..15], making the `read` calls provable valid 62 // at build-time. 63 let reg_fuse_version = if engine_id_mask & 0x0001 != 0 { 64 regs::NV_FUSE_OPT_FPF_SEC2_UCODE1_VERSION::read(bar, ucode_idx).data() 65 } else if engine_id_mask & 0x0004 != 0 { 66 regs::NV_FUSE_OPT_FPF_NVDEC_UCODE1_VERSION::read(bar, ucode_idx).data() 67 } else if engine_id_mask & 0x0400 != 0 { 68 regs::NV_FUSE_OPT_FPF_GSP_UCODE1_VERSION::read(bar, ucode_idx).data() 69 } else { 70 dev_err!(dev, "unexpected engine_id_mask {:#x}\n", engine_id_mask); 71 return Err(EINVAL); 72 }; 73 74 // TODO[NUMM]: replace with `last_set_bit` once it lands. 75 Ok(u16::BITS - reg_fuse_version.leading_zeros()) 76 } 77 78 fn program_brom_ga102<E: FalconEngine>(bar: &Bar0, params: &FalconBromParams) -> Result { 79 regs::NV_PFALCON2_FALCON_BROM_PARAADDR::default() 80 .set_value(params.pkc_data_offset) 81 .write(bar, &E::ID, 0); 82 regs::NV_PFALCON2_FALCON_BROM_ENGIDMASK::default() 83 .set_value(u32::from(params.engine_id_mask)) 84 .write(bar, &E::ID); 85 regs::NV_PFALCON2_FALCON_BROM_CURR_UCODE_ID::default() 86 .set_ucode_id(params.ucode_id) 87 .write(bar, &E::ID); 88 regs::NV_PFALCON2_FALCON_MOD_SEL::default() 89 .set_algo(FalconModSelAlgo::Rsa3k) 90 .write(bar, &E::ID); 91 92 Ok(()) 93 } 94 95 pub(super) struct Ga102<E: FalconEngine>(PhantomData<E>); 96 97 impl<E: FalconEngine> Ga102<E> { 98 pub(super) fn new() -> Self { 99 Self(PhantomData) 100 } 101 } 102 103 impl<E: FalconEngine> FalconHal<E> for Ga102<E> { 104 fn select_core(&self, _falcon: &Falcon<E>, bar: &Bar0) -> Result { 105 select_core_ga102::<E>(bar) 106 } 107 108 fn signature_reg_fuse_version( 109 &self, 110 falcon: &Falcon<E>, 111 bar: &Bar0, 112 engine_id_mask: u16, 113 ucode_id: u8, 114 ) -> Result<u32> { 115 signature_reg_fuse_version_ga102(&falcon.dev, bar, engine_id_mask, ucode_id) 116 } 117 118 fn program_brom(&self, _falcon: &Falcon<E>, bar: &Bar0, params: &FalconBromParams) -> Result { 119 program_brom_ga102::<E>(bar, params) 120 } 121 122 fn is_riscv_active(&self, bar: &Bar0) -> bool { 123 let cpuctl = regs::NV_PRISCV_RISCV_CPUCTL::read(bar, &E::ID); 124 cpuctl.active_stat() 125 } 126 127 fn reset_wait_mem_scrubbing(&self, bar: &Bar0) -> Result { 128 // TIMEOUT: memory scrubbing should complete in less than 20ms. 129 read_poll_timeout( 130 || Ok(regs::NV_PFALCON_FALCON_HWCFG2::read(bar, &E::ID)), 131 |r| r.mem_scrubbing_done(), 132 Delta::ZERO, 133 Delta::from_millis(20), 134 ) 135 .map(|_| ()) 136 } 137 138 fn reset_eng(&self, bar: &Bar0) -> Result { 139 let _ = regs::NV_PFALCON_FALCON_HWCFG2::read(bar, &E::ID); 140 141 // According to OpenRM's `kflcnPreResetWait_GA102` documentation, HW sometimes does not set 142 // RESET_READY so a non-failing timeout is used. 143 let _ = read_poll_timeout( 144 || Ok(regs::NV_PFALCON_FALCON_HWCFG2::read(bar, &E::ID)), 145 |r| r.reset_ready(), 146 Delta::ZERO, 147 Delta::from_micros(150), 148 ); 149 150 regs::NV_PFALCON_FALCON_ENGINE::reset_engine::<E>(bar); 151 self.reset_wait_mem_scrubbing(bar)?; 152 153 Ok(()) 154 } 155 156 fn load_method(&self) -> LoadMethod { 157 LoadMethod::Dma 158 } 159 } 160