1*69f5cd67SAlexandre Courbot // SPDX-License-Identifier: GPL-2.0 2*69f5cd67SAlexandre Courbot 3*69f5cd67SAlexandre Courbot use crate::{ 4*69f5cd67SAlexandre Courbot driver::Bar0, 5*69f5cd67SAlexandre Courbot falcon::{Falcon, FalconEngine}, 6*69f5cd67SAlexandre Courbot regs, 7*69f5cd67SAlexandre Courbot }; 8*69f5cd67SAlexandre Courbot 9*69f5cd67SAlexandre Courbot /// Type specifying the `Gsp` falcon engine. Cannot be instantiated. 10*69f5cd67SAlexandre Courbot pub(crate) struct Gsp(()); 11*69f5cd67SAlexandre Courbot 12*69f5cd67SAlexandre Courbot impl FalconEngine for Gsp { 13*69f5cd67SAlexandre Courbot const BASE: usize = 0x00110000; 14*69f5cd67SAlexandre Courbot } 15*69f5cd67SAlexandre Courbot 16*69f5cd67SAlexandre Courbot impl Falcon<Gsp> { 17*69f5cd67SAlexandre Courbot /// Clears the SWGEN0 bit in the Falcon's IRQ status clear register to 18*69f5cd67SAlexandre Courbot /// allow GSP to signal CPU for processing new messages in message queue. clear_swgen0_intr(&self, bar: &Bar0)19*69f5cd67SAlexandre Courbot pub(crate) fn clear_swgen0_intr(&self, bar: &Bar0) { 20*69f5cd67SAlexandre Courbot regs::NV_PFALCON_FALCON_IRQSCLR::default() 21*69f5cd67SAlexandre Courbot .set_swgen0(true) 22*69f5cd67SAlexandre Courbot .write(bar, Gsp::BASE); 23*69f5cd67SAlexandre Courbot } 24*69f5cd67SAlexandre Courbot } 25