1 // SPDX-License-Identifier: GPL-2.0 2 3 use kernel::{ 4 auxiliary, 5 device::Core, 6 devres::Devres, 7 dma::Device, 8 dma::DmaMask, 9 pci, 10 pci::{ 11 Class, 12 ClassMask, 13 Vendor, // 14 }, 15 prelude::*, 16 sizes::SZ_16M, 17 sync::Arc, // 18 }; 19 20 use crate::gpu::Gpu; 21 22 #[pin_data] 23 pub(crate) struct NovaCore { 24 #[pin] 25 pub(crate) gpu: Gpu, 26 #[pin] 27 _reg: Devres<auxiliary::Registration>, 28 } 29 30 const BAR0_SIZE: usize = SZ_16M; 31 32 // For now we only support Ampere which can use up to 47-bit DMA addresses. 33 // 34 // TODO: Add an abstraction for this to support newer GPUs which may support 35 // larger DMA addresses. Limiting these GPUs to smaller address widths won't 36 // have any adverse affects, unless installed on systems which require larger 37 // DMA addresses. These systems should be quite rare. 38 const GPU_DMA_BITS: u32 = 47; 39 40 pub(crate) type Bar0 = pci::Bar<BAR0_SIZE>; 41 42 kernel::pci_device_table!( 43 PCI_TABLE, 44 MODULE_PCI_TABLE, 45 <NovaCore as pci::Driver>::IdInfo, 46 [ 47 // Modern NVIDIA GPUs will show up as either VGA or 3D controllers. 48 ( 49 pci::DeviceId::from_class_and_vendor( 50 Class::DISPLAY_VGA, 51 ClassMask::ClassSubclass, 52 Vendor::NVIDIA 53 ), 54 () 55 ), 56 ( 57 pci::DeviceId::from_class_and_vendor( 58 Class::DISPLAY_3D, 59 ClassMask::ClassSubclass, 60 Vendor::NVIDIA 61 ), 62 () 63 ), 64 ] 65 ); 66 67 impl pci::Driver for NovaCore { 68 type IdInfo = (); 69 const ID_TABLE: pci::IdTable<Self::IdInfo> = &PCI_TABLE; 70 71 fn probe(pdev: &pci::Device<Core>, _info: &Self::IdInfo) -> impl PinInit<Self, Error> { 72 pin_init::pin_init_scope(move || { 73 dev_dbg!(pdev.as_ref(), "Probe Nova Core GPU driver.\n"); 74 75 pdev.enable_device_mem()?; 76 pdev.set_master(); 77 78 // SAFETY: No concurrent DMA allocations or mappings can be made because 79 // the device is still being probed and therefore isn't being used by 80 // other threads of execution. 81 unsafe { pdev.dma_set_mask_and_coherent(DmaMask::new::<GPU_DMA_BITS>())? }; 82 83 let bar = Arc::pin_init( 84 pdev.iomap_region_sized::<BAR0_SIZE>(0, c"nova-core/bar0"), 85 GFP_KERNEL, 86 )?; 87 88 Ok(try_pin_init!(Self { 89 gpu <- Gpu::new(pdev, bar.clone(), bar.access(pdev.as_ref())?), 90 _reg <- auxiliary::Registration::new( 91 pdev.as_ref(), 92 c"nova-drm", 93 0, // TODO[XARR]: Once it lands, use XArray; for now we don't use the ID. 94 crate::MODULE_NAME 95 ), 96 })) 97 }) 98 } 99 100 fn unbind(pdev: &pci::Device<Core>, this: Pin<&Self>) { 101 this.gpu.unbind(pdev.as_ref()); 102 } 103 } 104