139b9004dSPhilipp Zabel /* 239b9004dSPhilipp Zabel * Copyright (c) 2010 Sascha Hauer <s.hauer@pengutronix.de> 339b9004dSPhilipp Zabel * Copyright (C) 2005-2009 Freescale Semiconductor, Inc. 439b9004dSPhilipp Zabel * 539b9004dSPhilipp Zabel * This program is free software; you can redistribute it and/or modify it 639b9004dSPhilipp Zabel * under the terms of the GNU General Public License as published by the 739b9004dSPhilipp Zabel * Free Software Foundation; either version 2 of the License, or (at your 839b9004dSPhilipp Zabel * option) any later version. 939b9004dSPhilipp Zabel * 1039b9004dSPhilipp Zabel * This program is distributed in the hope that it will be useful, but 1139b9004dSPhilipp Zabel * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 1239b9004dSPhilipp Zabel * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 1339b9004dSPhilipp Zabel * for more details. 1439b9004dSPhilipp Zabel */ 1539b9004dSPhilipp Zabel #ifndef __IPU_PRV_H__ 1639b9004dSPhilipp Zabel #define __IPU_PRV_H__ 1739b9004dSPhilipp Zabel 1839b9004dSPhilipp Zabel struct ipu_soc; 1939b9004dSPhilipp Zabel 2039b9004dSPhilipp Zabel #include <linux/types.h> 2139b9004dSPhilipp Zabel #include <linux/device.h> 2239b9004dSPhilipp Zabel #include <linux/clk.h> 2339b9004dSPhilipp Zabel #include <linux/platform_device.h> 2439b9004dSPhilipp Zabel 2539b9004dSPhilipp Zabel #include <video/imx-ipu-v3.h> 2639b9004dSPhilipp Zabel 2739b9004dSPhilipp Zabel #define IPUV3_CHANNEL_CSI0 0 2839b9004dSPhilipp Zabel #define IPUV3_CHANNEL_CSI1 1 2939b9004dSPhilipp Zabel #define IPUV3_CHANNEL_CSI2 2 3039b9004dSPhilipp Zabel #define IPUV3_CHANNEL_CSI3 3 31c2d670fdSSteve Longerbeam #define IPUV3_CHANNEL_VDI_MEM_IC_VF 5 32c2d670fdSSteve Longerbeam #define IPUV3_CHANNEL_MEM_IC_PP 11 33c2d670fdSSteve Longerbeam #define IPUV3_CHANNEL_MEM_IC_PRP_VF 12 34c2d670fdSSteve Longerbeam #define IPUV3_CHANNEL_G_MEM_IC_PRP_VF 14 35c2d670fdSSteve Longerbeam #define IPUV3_CHANNEL_G_MEM_IC_PP 15 36c2d670fdSSteve Longerbeam #define IPUV3_CHANNEL_IC_PRP_ENC_MEM 20 37c2d670fdSSteve Longerbeam #define IPUV3_CHANNEL_IC_PRP_VF_MEM 21 38c2d670fdSSteve Longerbeam #define IPUV3_CHANNEL_IC_PP_MEM 22 3939b9004dSPhilipp Zabel #define IPUV3_CHANNEL_MEM_BG_SYNC 23 4039b9004dSPhilipp Zabel #define IPUV3_CHANNEL_MEM_FG_SYNC 27 4139b9004dSPhilipp Zabel #define IPUV3_CHANNEL_MEM_DC_SYNC 28 4239b9004dSPhilipp Zabel #define IPUV3_CHANNEL_MEM_FG_SYNC_ALPHA 31 4339b9004dSPhilipp Zabel #define IPUV3_CHANNEL_MEM_DC_ASYNC 41 44c2d670fdSSteve Longerbeam #define IPUV3_CHANNEL_MEM_ROT_ENC 45 45c2d670fdSSteve Longerbeam #define IPUV3_CHANNEL_MEM_ROT_VF 46 46c2d670fdSSteve Longerbeam #define IPUV3_CHANNEL_MEM_ROT_PP 47 47c2d670fdSSteve Longerbeam #define IPUV3_CHANNEL_ROT_ENC_MEM 48 48c2d670fdSSteve Longerbeam #define IPUV3_CHANNEL_ROT_VF_MEM 49 49c2d670fdSSteve Longerbeam #define IPUV3_CHANNEL_ROT_PP_MEM 50 5039b9004dSPhilipp Zabel #define IPUV3_CHANNEL_MEM_BG_SYNC_ALPHA 51 5139b9004dSPhilipp Zabel 5239b9004dSPhilipp Zabel #define IPU_MCU_T_DEFAULT 8 5339b9004dSPhilipp Zabel #define IPU_CM_IDMAC_REG_OFS 0x00008000 5439b9004dSPhilipp Zabel #define IPU_CM_IC_REG_OFS 0x00020000 5539b9004dSPhilipp Zabel #define IPU_CM_IRT_REG_OFS 0x00028000 5639b9004dSPhilipp Zabel #define IPU_CM_CSI0_REG_OFS 0x00030000 5739b9004dSPhilipp Zabel #define IPU_CM_CSI1_REG_OFS 0x00038000 5839b9004dSPhilipp Zabel #define IPU_CM_SMFC_REG_OFS 0x00050000 5939b9004dSPhilipp Zabel #define IPU_CM_DC_REG_OFS 0x00058000 6039b9004dSPhilipp Zabel #define IPU_CM_DMFC_REG_OFS 0x00060000 6139b9004dSPhilipp Zabel 6239b9004dSPhilipp Zabel /* Register addresses */ 6339b9004dSPhilipp Zabel /* IPU Common registers */ 6439b9004dSPhilipp Zabel #define IPU_CM_REG(offset) (offset) 6539b9004dSPhilipp Zabel 6639b9004dSPhilipp Zabel #define IPU_CONF IPU_CM_REG(0) 6739b9004dSPhilipp Zabel 6839b9004dSPhilipp Zabel #define IPU_SRM_PRI1 IPU_CM_REG(0x00a0) 6939b9004dSPhilipp Zabel #define IPU_SRM_PRI2 IPU_CM_REG(0x00a4) 7039b9004dSPhilipp Zabel #define IPU_FS_PROC_FLOW1 IPU_CM_REG(0x00a8) 7139b9004dSPhilipp Zabel #define IPU_FS_PROC_FLOW2 IPU_CM_REG(0x00ac) 7239b9004dSPhilipp Zabel #define IPU_FS_PROC_FLOW3 IPU_CM_REG(0x00b0) 7339b9004dSPhilipp Zabel #define IPU_FS_DISP_FLOW1 IPU_CM_REG(0x00b4) 7439b9004dSPhilipp Zabel #define IPU_FS_DISP_FLOW2 IPU_CM_REG(0x00b8) 7539b9004dSPhilipp Zabel #define IPU_SKIP IPU_CM_REG(0x00bc) 7639b9004dSPhilipp Zabel #define IPU_DISP_ALT_CONF IPU_CM_REG(0x00c0) 7739b9004dSPhilipp Zabel #define IPU_DISP_GEN IPU_CM_REG(0x00c4) 7839b9004dSPhilipp Zabel #define IPU_DISP_ALT1 IPU_CM_REG(0x00c8) 7939b9004dSPhilipp Zabel #define IPU_DISP_ALT2 IPU_CM_REG(0x00cc) 8039b9004dSPhilipp Zabel #define IPU_DISP_ALT3 IPU_CM_REG(0x00d0) 8139b9004dSPhilipp Zabel #define IPU_DISP_ALT4 IPU_CM_REG(0x00d4) 8239b9004dSPhilipp Zabel #define IPU_SNOOP IPU_CM_REG(0x00d8) 8339b9004dSPhilipp Zabel #define IPU_MEM_RST IPU_CM_REG(0x00dc) 8439b9004dSPhilipp Zabel #define IPU_PM IPU_CM_REG(0x00e0) 8539b9004dSPhilipp Zabel #define IPU_GPR IPU_CM_REG(0x00e4) 8639b9004dSPhilipp Zabel #define IPU_CHA_DB_MODE_SEL(ch) IPU_CM_REG(0x0150 + 4 * ((ch) / 32)) 8739b9004dSPhilipp Zabel #define IPU_ALT_CHA_DB_MODE_SEL(ch) IPU_CM_REG(0x0168 + 4 * ((ch) / 32)) 8839b9004dSPhilipp Zabel #define IPU_CHA_CUR_BUF(ch) IPU_CM_REG(0x023C + 4 * ((ch) / 32)) 8939b9004dSPhilipp Zabel #define IPU_ALT_CUR_BUF0 IPU_CM_REG(0x0244) 9039b9004dSPhilipp Zabel #define IPU_ALT_CUR_BUF1 IPU_CM_REG(0x0248) 9139b9004dSPhilipp Zabel #define IPU_SRM_STAT IPU_CM_REG(0x024C) 9239b9004dSPhilipp Zabel #define IPU_PROC_TASK_STAT IPU_CM_REG(0x0250) 9339b9004dSPhilipp Zabel #define IPU_DISP_TASK_STAT IPU_CM_REG(0x0254) 9439b9004dSPhilipp Zabel #define IPU_CHA_BUF0_RDY(ch) IPU_CM_REG(0x0268 + 4 * ((ch) / 32)) 9539b9004dSPhilipp Zabel #define IPU_CHA_BUF1_RDY(ch) IPU_CM_REG(0x0270 + 4 * ((ch) / 32)) 9639b9004dSPhilipp Zabel #define IPU_ALT_CHA_BUF0_RDY(ch) IPU_CM_REG(0x0278 + 4 * ((ch) / 32)) 9739b9004dSPhilipp Zabel #define IPU_ALT_CHA_BUF1_RDY(ch) IPU_CM_REG(0x0280 + 4 * ((ch) / 32)) 9839b9004dSPhilipp Zabel 9939b9004dSPhilipp Zabel #define IPU_INT_CTRL(n) IPU_CM_REG(0x003C + 4 * (n)) 10039b9004dSPhilipp Zabel #define IPU_INT_STAT(n) IPU_CM_REG(0x0200 + 4 * (n)) 10139b9004dSPhilipp Zabel 10239b9004dSPhilipp Zabel #define IPU_DI0_COUNTER_RELEASE (1 << 24) 10339b9004dSPhilipp Zabel #define IPU_DI1_COUNTER_RELEASE (1 << 25) 10439b9004dSPhilipp Zabel 10539b9004dSPhilipp Zabel #define IPU_IDMAC_REG(offset) (offset) 10639b9004dSPhilipp Zabel 10739b9004dSPhilipp Zabel #define IDMAC_CONF IPU_IDMAC_REG(0x0000) 10839b9004dSPhilipp Zabel #define IDMAC_CHA_EN(ch) IPU_IDMAC_REG(0x0004 + 4 * ((ch) / 32)) 10939b9004dSPhilipp Zabel #define IDMAC_SEP_ALPHA IPU_IDMAC_REG(0x000c) 11039b9004dSPhilipp Zabel #define IDMAC_ALT_SEP_ALPHA IPU_IDMAC_REG(0x0010) 11139b9004dSPhilipp Zabel #define IDMAC_CHA_PRI(ch) IPU_IDMAC_REG(0x0014 + 4 * ((ch) / 32)) 11239b9004dSPhilipp Zabel #define IDMAC_WM_EN(ch) IPU_IDMAC_REG(0x001c + 4 * ((ch) / 32)) 11339b9004dSPhilipp Zabel #define IDMAC_CH_LOCK_EN_1 IPU_IDMAC_REG(0x0024) 11439b9004dSPhilipp Zabel #define IDMAC_CH_LOCK_EN_2 IPU_IDMAC_REG(0x0028) 11539b9004dSPhilipp Zabel #define IDMAC_SUB_ADDR_0 IPU_IDMAC_REG(0x002c) 11639b9004dSPhilipp Zabel #define IDMAC_SUB_ADDR_1 IPU_IDMAC_REG(0x0030) 11739b9004dSPhilipp Zabel #define IDMAC_SUB_ADDR_2 IPU_IDMAC_REG(0x0034) 11839b9004dSPhilipp Zabel #define IDMAC_BAND_EN(ch) IPU_IDMAC_REG(0x0040 + 4 * ((ch) / 32)) 11939b9004dSPhilipp Zabel #define IDMAC_CHA_BUSY(ch) IPU_IDMAC_REG(0x0100 + 4 * ((ch) / 32)) 12039b9004dSPhilipp Zabel 12139b9004dSPhilipp Zabel #define IPU_NUM_IRQS (32 * 15) 12239b9004dSPhilipp Zabel 12339b9004dSPhilipp Zabel enum ipu_modules { 12439b9004dSPhilipp Zabel IPU_CONF_CSI0_EN = (1 << 0), 12539b9004dSPhilipp Zabel IPU_CONF_CSI1_EN = (1 << 1), 12639b9004dSPhilipp Zabel IPU_CONF_IC_EN = (1 << 2), 12739b9004dSPhilipp Zabel IPU_CONF_ROT_EN = (1 << 3), 12839b9004dSPhilipp Zabel IPU_CONF_ISP_EN = (1 << 4), 12939b9004dSPhilipp Zabel IPU_CONF_DP_EN = (1 << 5), 13039b9004dSPhilipp Zabel IPU_CONF_DI0_EN = (1 << 6), 13139b9004dSPhilipp Zabel IPU_CONF_DI1_EN = (1 << 7), 13239b9004dSPhilipp Zabel IPU_CONF_SMFC_EN = (1 << 8), 13339b9004dSPhilipp Zabel IPU_CONF_DC_EN = (1 << 9), 13439b9004dSPhilipp Zabel IPU_CONF_DMFC_EN = (1 << 10), 13539b9004dSPhilipp Zabel 13639b9004dSPhilipp Zabel IPU_CONF_VDI_EN = (1 << 12), 13739b9004dSPhilipp Zabel 13839b9004dSPhilipp Zabel IPU_CONF_IDMAC_DIS = (1 << 22), 13939b9004dSPhilipp Zabel 14039b9004dSPhilipp Zabel IPU_CONF_IC_DMFC_SEL = (1 << 25), 14139b9004dSPhilipp Zabel IPU_CONF_IC_DMFC_SYNC = (1 << 26), 14239b9004dSPhilipp Zabel IPU_CONF_VDI_DMFC_SYNC = (1 << 27), 14339b9004dSPhilipp Zabel 14439b9004dSPhilipp Zabel IPU_CONF_CSI0_DATA_SOURCE = (1 << 28), 14539b9004dSPhilipp Zabel IPU_CONF_CSI1_DATA_SOURCE = (1 << 29), 14639b9004dSPhilipp Zabel IPU_CONF_IC_INPUT = (1 << 30), 14739b9004dSPhilipp Zabel IPU_CONF_CSI_SEL = (1 << 31), 14839b9004dSPhilipp Zabel }; 14939b9004dSPhilipp Zabel 15039b9004dSPhilipp Zabel struct ipuv3_channel { 15139b9004dSPhilipp Zabel unsigned int num; 15239b9004dSPhilipp Zabel 15339b9004dSPhilipp Zabel bool enabled; 15439b9004dSPhilipp Zabel bool busy; 15539b9004dSPhilipp Zabel 15639b9004dSPhilipp Zabel struct ipu_soc *ipu; 15739b9004dSPhilipp Zabel }; 15839b9004dSPhilipp Zabel 1597d2691daSSteve Longerbeam struct ipu_cpmem; 160*2ffd48f2SSteve Longerbeam struct ipu_csi; 16139b9004dSPhilipp Zabel struct ipu_dc_priv; 16239b9004dSPhilipp Zabel struct ipu_dmfc_priv; 16339b9004dSPhilipp Zabel struct ipu_di; 16435de925fSPhilipp Zabel struct ipu_smfc_priv; 16535de925fSPhilipp Zabel 16639b9004dSPhilipp Zabel struct ipu_devtype; 16739b9004dSPhilipp Zabel 16839b9004dSPhilipp Zabel struct ipu_soc { 16939b9004dSPhilipp Zabel struct device *dev; 17039b9004dSPhilipp Zabel const struct ipu_devtype *devtype; 17139b9004dSPhilipp Zabel enum ipuv3_type ipu_type; 17239b9004dSPhilipp Zabel spinlock_t lock; 17339b9004dSPhilipp Zabel struct mutex channel_lock; 17439b9004dSPhilipp Zabel 17539b9004dSPhilipp Zabel void __iomem *cm_reg; 17639b9004dSPhilipp Zabel void __iomem *idmac_reg; 17739b9004dSPhilipp Zabel 17839b9004dSPhilipp Zabel int usecount; 17939b9004dSPhilipp Zabel 18039b9004dSPhilipp Zabel struct clk *clk; 18139b9004dSPhilipp Zabel 18239b9004dSPhilipp Zabel struct ipuv3_channel channel[64]; 18339b9004dSPhilipp Zabel 18439b9004dSPhilipp Zabel int irq_sync; 18539b9004dSPhilipp Zabel int irq_err; 18639b9004dSPhilipp Zabel struct irq_domain *domain; 18739b9004dSPhilipp Zabel 1887d2691daSSteve Longerbeam struct ipu_cpmem *cpmem_priv; 18939b9004dSPhilipp Zabel struct ipu_dc_priv *dc_priv; 19039b9004dSPhilipp Zabel struct ipu_dp_priv *dp_priv; 19139b9004dSPhilipp Zabel struct ipu_dmfc_priv *dmfc_priv; 19239b9004dSPhilipp Zabel struct ipu_di *di_priv[2]; 193*2ffd48f2SSteve Longerbeam struct ipu_csi *csi_priv[2]; 19435de925fSPhilipp Zabel struct ipu_smfc_priv *smfc_priv; 19539b9004dSPhilipp Zabel }; 19639b9004dSPhilipp Zabel 1977d2691daSSteve Longerbeam static inline u32 ipu_idmac_read(struct ipu_soc *ipu, unsigned offset) 1987d2691daSSteve Longerbeam { 1997d2691daSSteve Longerbeam return readl(ipu->idmac_reg + offset); 2007d2691daSSteve Longerbeam } 2017d2691daSSteve Longerbeam 2027d2691daSSteve Longerbeam static inline void ipu_idmac_write(struct ipu_soc *ipu, u32 value, 2037d2691daSSteve Longerbeam unsigned offset) 2047d2691daSSteve Longerbeam { 2057d2691daSSteve Longerbeam writel(value, ipu->idmac_reg + offset); 2067d2691daSSteve Longerbeam } 2077d2691daSSteve Longerbeam 20839b9004dSPhilipp Zabel void ipu_srm_dp_sync_update(struct ipu_soc *ipu); 20939b9004dSPhilipp Zabel 21039b9004dSPhilipp Zabel int ipu_module_enable(struct ipu_soc *ipu, u32 mask); 21139b9004dSPhilipp Zabel int ipu_module_disable(struct ipu_soc *ipu, u32 mask); 21239b9004dSPhilipp Zabel 213682b7c1cSLinus Torvalds bool ipu_idmac_channel_busy(struct ipu_soc *ipu, unsigned int chno); 214682b7c1cSLinus Torvalds int ipu_wait_interrupt(struct ipu_soc *ipu, int irq, int ms); 215682b7c1cSLinus Torvalds 216*2ffd48f2SSteve Longerbeam int ipu_csi_init(struct ipu_soc *ipu, struct device *dev, int id, 217*2ffd48f2SSteve Longerbeam unsigned long base, u32 module, struct clk *clk_ipu); 218*2ffd48f2SSteve Longerbeam void ipu_csi_exit(struct ipu_soc *ipu, int id); 219*2ffd48f2SSteve Longerbeam 22039b9004dSPhilipp Zabel int ipu_di_init(struct ipu_soc *ipu, struct device *dev, int id, 22139b9004dSPhilipp Zabel unsigned long base, u32 module, struct clk *ipu_clk); 22239b9004dSPhilipp Zabel void ipu_di_exit(struct ipu_soc *ipu, int id); 22339b9004dSPhilipp Zabel 22439b9004dSPhilipp Zabel int ipu_dmfc_init(struct ipu_soc *ipu, struct device *dev, unsigned long base, 22539b9004dSPhilipp Zabel struct clk *ipu_clk); 22639b9004dSPhilipp Zabel void ipu_dmfc_exit(struct ipu_soc *ipu); 22739b9004dSPhilipp Zabel 22839b9004dSPhilipp Zabel int ipu_dp_init(struct ipu_soc *ipu, struct device *dev, unsigned long base); 22939b9004dSPhilipp Zabel void ipu_dp_exit(struct ipu_soc *ipu); 23039b9004dSPhilipp Zabel 23139b9004dSPhilipp Zabel int ipu_dc_init(struct ipu_soc *ipu, struct device *dev, unsigned long base, 23239b9004dSPhilipp Zabel unsigned long template_base); 23339b9004dSPhilipp Zabel void ipu_dc_exit(struct ipu_soc *ipu); 23439b9004dSPhilipp Zabel 23539b9004dSPhilipp Zabel int ipu_cpmem_init(struct ipu_soc *ipu, struct device *dev, unsigned long base); 23639b9004dSPhilipp Zabel void ipu_cpmem_exit(struct ipu_soc *ipu); 23739b9004dSPhilipp Zabel 23835de925fSPhilipp Zabel int ipu_smfc_init(struct ipu_soc *ipu, struct device *dev, unsigned long base); 23935de925fSPhilipp Zabel void ipu_smfc_exit(struct ipu_soc *ipu); 24035de925fSPhilipp Zabel 24139b9004dSPhilipp Zabel #endif /* __IPU_PRV_H__ */ 242