139b9004dSPhilipp Zabel /* 239b9004dSPhilipp Zabel * Copyright (c) 2010 Sascha Hauer <s.hauer@pengutronix.de> 339b9004dSPhilipp Zabel * Copyright (C) 2005-2009 Freescale Semiconductor, Inc. 439b9004dSPhilipp Zabel * 539b9004dSPhilipp Zabel * This program is free software; you can redistribute it and/or modify it 639b9004dSPhilipp Zabel * under the terms of the GNU General Public License as published by the 739b9004dSPhilipp Zabel * Free Software Foundation; either version 2 of the License, or (at your 839b9004dSPhilipp Zabel * option) any later version. 939b9004dSPhilipp Zabel * 1039b9004dSPhilipp Zabel * This program is distributed in the hope that it will be useful, but 1139b9004dSPhilipp Zabel * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 1239b9004dSPhilipp Zabel * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 1339b9004dSPhilipp Zabel * for more details. 1439b9004dSPhilipp Zabel */ 1539b9004dSPhilipp Zabel #ifndef __IPU_PRV_H__ 1639b9004dSPhilipp Zabel #define __IPU_PRV_H__ 1739b9004dSPhilipp Zabel 1839b9004dSPhilipp Zabel struct ipu_soc; 1939b9004dSPhilipp Zabel 2039b9004dSPhilipp Zabel #include <linux/types.h> 2139b9004dSPhilipp Zabel #include <linux/device.h> 2239b9004dSPhilipp Zabel #include <linux/clk.h> 2339b9004dSPhilipp Zabel #include <linux/platform_device.h> 2439b9004dSPhilipp Zabel 2539b9004dSPhilipp Zabel #include <video/imx-ipu-v3.h> 2639b9004dSPhilipp Zabel 2739b9004dSPhilipp Zabel #define IPU_MCU_T_DEFAULT 8 2839b9004dSPhilipp Zabel #define IPU_CM_IDMAC_REG_OFS 0x00008000 2939b9004dSPhilipp Zabel #define IPU_CM_IC_REG_OFS 0x00020000 3039b9004dSPhilipp Zabel #define IPU_CM_IRT_REG_OFS 0x00028000 3139b9004dSPhilipp Zabel #define IPU_CM_CSI0_REG_OFS 0x00030000 3239b9004dSPhilipp Zabel #define IPU_CM_CSI1_REG_OFS 0x00038000 3339b9004dSPhilipp Zabel #define IPU_CM_SMFC_REG_OFS 0x00050000 3439b9004dSPhilipp Zabel #define IPU_CM_DC_REG_OFS 0x00058000 3539b9004dSPhilipp Zabel #define IPU_CM_DMFC_REG_OFS 0x00060000 3639b9004dSPhilipp Zabel 3739b9004dSPhilipp Zabel /* Register addresses */ 3839b9004dSPhilipp Zabel /* IPU Common registers */ 3939b9004dSPhilipp Zabel #define IPU_CM_REG(offset) (offset) 4039b9004dSPhilipp Zabel 4139b9004dSPhilipp Zabel #define IPU_CONF IPU_CM_REG(0) 4239b9004dSPhilipp Zabel 4339b9004dSPhilipp Zabel #define IPU_SRM_PRI1 IPU_CM_REG(0x00a0) 4439b9004dSPhilipp Zabel #define IPU_SRM_PRI2 IPU_CM_REG(0x00a4) 4539b9004dSPhilipp Zabel #define IPU_FS_PROC_FLOW1 IPU_CM_REG(0x00a8) 4639b9004dSPhilipp Zabel #define IPU_FS_PROC_FLOW2 IPU_CM_REG(0x00ac) 4739b9004dSPhilipp Zabel #define IPU_FS_PROC_FLOW3 IPU_CM_REG(0x00b0) 4839b9004dSPhilipp Zabel #define IPU_FS_DISP_FLOW1 IPU_CM_REG(0x00b4) 4939b9004dSPhilipp Zabel #define IPU_FS_DISP_FLOW2 IPU_CM_REG(0x00b8) 5039b9004dSPhilipp Zabel #define IPU_SKIP IPU_CM_REG(0x00bc) 5139b9004dSPhilipp Zabel #define IPU_DISP_ALT_CONF IPU_CM_REG(0x00c0) 5239b9004dSPhilipp Zabel #define IPU_DISP_GEN IPU_CM_REG(0x00c4) 5339b9004dSPhilipp Zabel #define IPU_DISP_ALT1 IPU_CM_REG(0x00c8) 5439b9004dSPhilipp Zabel #define IPU_DISP_ALT2 IPU_CM_REG(0x00cc) 5539b9004dSPhilipp Zabel #define IPU_DISP_ALT3 IPU_CM_REG(0x00d0) 5639b9004dSPhilipp Zabel #define IPU_DISP_ALT4 IPU_CM_REG(0x00d4) 5739b9004dSPhilipp Zabel #define IPU_SNOOP IPU_CM_REG(0x00d8) 5839b9004dSPhilipp Zabel #define IPU_MEM_RST IPU_CM_REG(0x00dc) 5939b9004dSPhilipp Zabel #define IPU_PM IPU_CM_REG(0x00e0) 6039b9004dSPhilipp Zabel #define IPU_GPR IPU_CM_REG(0x00e4) 6139b9004dSPhilipp Zabel #define IPU_CHA_DB_MODE_SEL(ch) IPU_CM_REG(0x0150 + 4 * ((ch) / 32)) 6239b9004dSPhilipp Zabel #define IPU_ALT_CHA_DB_MODE_SEL(ch) IPU_CM_REG(0x0168 + 4 * ((ch) / 32)) 6339b9004dSPhilipp Zabel #define IPU_CHA_CUR_BUF(ch) IPU_CM_REG(0x023C + 4 * ((ch) / 32)) 6439b9004dSPhilipp Zabel #define IPU_ALT_CUR_BUF0 IPU_CM_REG(0x0244) 6539b9004dSPhilipp Zabel #define IPU_ALT_CUR_BUF1 IPU_CM_REG(0x0248) 6639b9004dSPhilipp Zabel #define IPU_SRM_STAT IPU_CM_REG(0x024C) 6739b9004dSPhilipp Zabel #define IPU_PROC_TASK_STAT IPU_CM_REG(0x0250) 6839b9004dSPhilipp Zabel #define IPU_DISP_TASK_STAT IPU_CM_REG(0x0254) 6939b9004dSPhilipp Zabel #define IPU_CHA_BUF0_RDY(ch) IPU_CM_REG(0x0268 + 4 * ((ch) / 32)) 7039b9004dSPhilipp Zabel #define IPU_CHA_BUF1_RDY(ch) IPU_CM_REG(0x0270 + 4 * ((ch) / 32)) 71aa52f578SSteve Longerbeam #define IPU_CHA_BUF2_RDY(ch) IPU_CM_REG(0x0288 + 4 * ((ch) / 32)) 7239b9004dSPhilipp Zabel #define IPU_ALT_CHA_BUF0_RDY(ch) IPU_CM_REG(0x0278 + 4 * ((ch) / 32)) 7339b9004dSPhilipp Zabel #define IPU_ALT_CHA_BUF1_RDY(ch) IPU_CM_REG(0x0280 + 4 * ((ch) / 32)) 7439b9004dSPhilipp Zabel 7539b9004dSPhilipp Zabel #define IPU_INT_CTRL(n) IPU_CM_REG(0x003C + 4 * (n)) 7639b9004dSPhilipp Zabel #define IPU_INT_STAT(n) IPU_CM_REG(0x0200 + 4 * (n)) 7739b9004dSPhilipp Zabel 78f9bb7acbSPhilipp Zabel /* SRM_PRI2 */ 79f9bb7acbSPhilipp Zabel #define DP_S_SRM_MODE_MASK (0x3 << 3) 80f9bb7acbSPhilipp Zabel #define DP_S_SRM_MODE_NOW (0x3 << 3) 81f9bb7acbSPhilipp Zabel #define DP_S_SRM_MODE_NEXT_FRAME (0x1 << 3) 82f9bb7acbSPhilipp Zabel 83ac4708faSSteve Longerbeam /* FS_PROC_FLOW1 */ 84ac4708faSSteve Longerbeam #define FS_PRPENC_ROT_SRC_SEL_MASK (0xf << 0) 85ac4708faSSteve Longerbeam #define FS_PRPENC_ROT_SRC_SEL_ENC (0x7 << 0) 86ac4708faSSteve Longerbeam #define FS_PRPVF_ROT_SRC_SEL_MASK (0xf << 8) 87ac4708faSSteve Longerbeam #define FS_PRPVF_ROT_SRC_SEL_VF (0x8 << 8) 88ac4708faSSteve Longerbeam #define FS_PP_SRC_SEL_MASK (0xf << 12) 89ac4708faSSteve Longerbeam #define FS_PP_ROT_SRC_SEL_MASK (0xf << 16) 90ac4708faSSteve Longerbeam #define FS_PP_ROT_SRC_SEL_PP (0x5 << 16) 91ac4708faSSteve Longerbeam #define FS_VDI1_SRC_SEL_MASK (0x3 << 20) 92ac4708faSSteve Longerbeam #define FS_VDI3_SRC_SEL_MASK (0x3 << 20) 93ac4708faSSteve Longerbeam #define FS_PRP_SRC_SEL_MASK (0xf << 24) 94ac4708faSSteve Longerbeam #define FS_VDI_SRC_SEL_MASK (0x3 << 28) 95ac4708faSSteve Longerbeam #define FS_VDI_SRC_SEL_CSI_DIRECT (0x1 << 28) 96ac4708faSSteve Longerbeam #define FS_VDI_SRC_SEL_VDOA (0x2 << 28) 97ac4708faSSteve Longerbeam 98ac4708faSSteve Longerbeam /* FS_PROC_FLOW2 */ 99ac4708faSSteve Longerbeam #define FS_PRP_ENC_DEST_SEL_MASK (0xf << 0) 100ac4708faSSteve Longerbeam #define FS_PRP_ENC_DEST_SEL_IRT_ENC (0x1 << 0) 101ac4708faSSteve Longerbeam #define FS_PRPVF_DEST_SEL_MASK (0xf << 4) 102ac4708faSSteve Longerbeam #define FS_PRPVF_DEST_SEL_IRT_VF (0x1 << 4) 103ac4708faSSteve Longerbeam #define FS_PRPVF_ROT_DEST_SEL_MASK (0xf << 8) 104ac4708faSSteve Longerbeam #define FS_PP_DEST_SEL_MASK (0xf << 12) 105ac4708faSSteve Longerbeam #define FS_PP_DEST_SEL_IRT_PP (0x3 << 12) 106ac4708faSSteve Longerbeam #define FS_PP_ROT_DEST_SEL_MASK (0xf << 16) 107ac4708faSSteve Longerbeam #define FS_PRPENC_ROT_DEST_SEL_MASK (0xf << 20) 108ac4708faSSteve Longerbeam #define FS_PRP_DEST_SEL_MASK (0xf << 24) 109ac4708faSSteve Longerbeam 11039b9004dSPhilipp Zabel #define IPU_DI0_COUNTER_RELEASE (1 << 24) 11139b9004dSPhilipp Zabel #define IPU_DI1_COUNTER_RELEASE (1 << 25) 11239b9004dSPhilipp Zabel 11339b9004dSPhilipp Zabel #define IPU_IDMAC_REG(offset) (offset) 11439b9004dSPhilipp Zabel 11539b9004dSPhilipp Zabel #define IDMAC_CONF IPU_IDMAC_REG(0x0000) 11639b9004dSPhilipp Zabel #define IDMAC_CHA_EN(ch) IPU_IDMAC_REG(0x0004 + 4 * ((ch) / 32)) 11739b9004dSPhilipp Zabel #define IDMAC_SEP_ALPHA IPU_IDMAC_REG(0x000c) 11839b9004dSPhilipp Zabel #define IDMAC_ALT_SEP_ALPHA IPU_IDMAC_REG(0x0010) 11939b9004dSPhilipp Zabel #define IDMAC_CHA_PRI(ch) IPU_IDMAC_REG(0x0014 + 4 * ((ch) / 32)) 12039b9004dSPhilipp Zabel #define IDMAC_WM_EN(ch) IPU_IDMAC_REG(0x001c + 4 * ((ch) / 32)) 12139b9004dSPhilipp Zabel #define IDMAC_CH_LOCK_EN_1 IPU_IDMAC_REG(0x0024) 12239b9004dSPhilipp Zabel #define IDMAC_CH_LOCK_EN_2 IPU_IDMAC_REG(0x0028) 12339b9004dSPhilipp Zabel #define IDMAC_SUB_ADDR_0 IPU_IDMAC_REG(0x002c) 12439b9004dSPhilipp Zabel #define IDMAC_SUB_ADDR_1 IPU_IDMAC_REG(0x0030) 12539b9004dSPhilipp Zabel #define IDMAC_SUB_ADDR_2 IPU_IDMAC_REG(0x0034) 12639b9004dSPhilipp Zabel #define IDMAC_BAND_EN(ch) IPU_IDMAC_REG(0x0040 + 4 * ((ch) / 32)) 12739b9004dSPhilipp Zabel #define IDMAC_CHA_BUSY(ch) IPU_IDMAC_REG(0x0100 + 4 * ((ch) / 32)) 12839b9004dSPhilipp Zabel 12939b9004dSPhilipp Zabel #define IPU_NUM_IRQS (32 * 15) 13039b9004dSPhilipp Zabel 13139b9004dSPhilipp Zabel enum ipu_modules { 13239b9004dSPhilipp Zabel IPU_CONF_CSI0_EN = (1 << 0), 13339b9004dSPhilipp Zabel IPU_CONF_CSI1_EN = (1 << 1), 13439b9004dSPhilipp Zabel IPU_CONF_IC_EN = (1 << 2), 13539b9004dSPhilipp Zabel IPU_CONF_ROT_EN = (1 << 3), 13639b9004dSPhilipp Zabel IPU_CONF_ISP_EN = (1 << 4), 13739b9004dSPhilipp Zabel IPU_CONF_DP_EN = (1 << 5), 13839b9004dSPhilipp Zabel IPU_CONF_DI0_EN = (1 << 6), 13939b9004dSPhilipp Zabel IPU_CONF_DI1_EN = (1 << 7), 14039b9004dSPhilipp Zabel IPU_CONF_SMFC_EN = (1 << 8), 14139b9004dSPhilipp Zabel IPU_CONF_DC_EN = (1 << 9), 14239b9004dSPhilipp Zabel IPU_CONF_DMFC_EN = (1 << 10), 14339b9004dSPhilipp Zabel 14439b9004dSPhilipp Zabel IPU_CONF_VDI_EN = (1 << 12), 14539b9004dSPhilipp Zabel 14639b9004dSPhilipp Zabel IPU_CONF_IDMAC_DIS = (1 << 22), 14739b9004dSPhilipp Zabel 14839b9004dSPhilipp Zabel IPU_CONF_IC_DMFC_SEL = (1 << 25), 14939b9004dSPhilipp Zabel IPU_CONF_IC_DMFC_SYNC = (1 << 26), 15039b9004dSPhilipp Zabel IPU_CONF_VDI_DMFC_SYNC = (1 << 27), 15139b9004dSPhilipp Zabel 15239b9004dSPhilipp Zabel IPU_CONF_CSI0_DATA_SOURCE = (1 << 28), 15339b9004dSPhilipp Zabel IPU_CONF_CSI1_DATA_SOURCE = (1 << 29), 15439b9004dSPhilipp Zabel IPU_CONF_IC_INPUT = (1 << 30), 15539b9004dSPhilipp Zabel IPU_CONF_CSI_SEL = (1 << 31), 15639b9004dSPhilipp Zabel }; 15739b9004dSPhilipp Zabel 15839b9004dSPhilipp Zabel struct ipuv3_channel { 15939b9004dSPhilipp Zabel unsigned int num; 16039b9004dSPhilipp Zabel struct ipu_soc *ipu; 16193adc8b5SPhilipp Zabel struct list_head list; 16239b9004dSPhilipp Zabel }; 16339b9004dSPhilipp Zabel 1647d2691daSSteve Longerbeam struct ipu_cpmem; 1652ffd48f2SSteve Longerbeam struct ipu_csi; 16639b9004dSPhilipp Zabel struct ipu_dc_priv; 16739b9004dSPhilipp Zabel struct ipu_dmfc_priv; 16839b9004dSPhilipp Zabel struct ipu_di; 1691aa8ea0dSSteve Longerbeam struct ipu_ic_priv; 1702d2ead45SSteve Longerbeam struct ipu_vdi; 171cd98e85aSSteve Longerbeam struct ipu_image_convert_priv; 17235de925fSPhilipp Zabel struct ipu_smfc_priv; 173d2a34232SLucas Stach struct ipu_pre; 174ea9c2605SLucas Stach struct ipu_prg; 17535de925fSPhilipp Zabel 17639b9004dSPhilipp Zabel struct ipu_devtype; 17739b9004dSPhilipp Zabel 17839b9004dSPhilipp Zabel struct ipu_soc { 17939b9004dSPhilipp Zabel struct device *dev; 18039b9004dSPhilipp Zabel const struct ipu_devtype *devtype; 18139b9004dSPhilipp Zabel enum ipuv3_type ipu_type; 18239b9004dSPhilipp Zabel spinlock_t lock; 18339b9004dSPhilipp Zabel struct mutex channel_lock; 18493adc8b5SPhilipp Zabel struct list_head channels; 18539b9004dSPhilipp Zabel 18639b9004dSPhilipp Zabel void __iomem *cm_reg; 18739b9004dSPhilipp Zabel void __iomem *idmac_reg; 18839b9004dSPhilipp Zabel 189572a7615SSteve Longerbeam int id; 19039b9004dSPhilipp Zabel int usecount; 19139b9004dSPhilipp Zabel 19239b9004dSPhilipp Zabel struct clk *clk; 19339b9004dSPhilipp Zabel 19439b9004dSPhilipp Zabel int irq_sync; 19539b9004dSPhilipp Zabel int irq_err; 19639b9004dSPhilipp Zabel struct irq_domain *domain; 19739b9004dSPhilipp Zabel 1987d2691daSSteve Longerbeam struct ipu_cpmem *cpmem_priv; 19939b9004dSPhilipp Zabel struct ipu_dc_priv *dc_priv; 20039b9004dSPhilipp Zabel struct ipu_dp_priv *dp_priv; 20139b9004dSPhilipp Zabel struct ipu_dmfc_priv *dmfc_priv; 20239b9004dSPhilipp Zabel struct ipu_di *di_priv[2]; 2032ffd48f2SSteve Longerbeam struct ipu_csi *csi_priv[2]; 2041aa8ea0dSSteve Longerbeam struct ipu_ic_priv *ic_priv; 2052d2ead45SSteve Longerbeam struct ipu_vdi *vdi_priv; 206cd98e85aSSteve Longerbeam struct ipu_image_convert_priv *image_convert_priv; 20735de925fSPhilipp Zabel struct ipu_smfc_priv *smfc_priv; 208ea9c2605SLucas Stach struct ipu_prg *prg_priv; 20939b9004dSPhilipp Zabel }; 21039b9004dSPhilipp Zabel 2117d2691daSSteve Longerbeam static inline u32 ipu_idmac_read(struct ipu_soc *ipu, unsigned offset) 2127d2691daSSteve Longerbeam { 2137d2691daSSteve Longerbeam return readl(ipu->idmac_reg + offset); 2147d2691daSSteve Longerbeam } 2157d2691daSSteve Longerbeam 2167d2691daSSteve Longerbeam static inline void ipu_idmac_write(struct ipu_soc *ipu, u32 value, 2177d2691daSSteve Longerbeam unsigned offset) 2187d2691daSSteve Longerbeam { 2197d2691daSSteve Longerbeam writel(value, ipu->idmac_reg + offset); 2207d2691daSSteve Longerbeam } 2217d2691daSSteve Longerbeam 222f9bb7acbSPhilipp Zabel void ipu_srm_dp_update(struct ipu_soc *ipu, bool sync); 22339b9004dSPhilipp Zabel 22439b9004dSPhilipp Zabel int ipu_module_enable(struct ipu_soc *ipu, u32 mask); 22539b9004dSPhilipp Zabel int ipu_module_disable(struct ipu_soc *ipu, u32 mask); 22639b9004dSPhilipp Zabel 227682b7c1cSLinus Torvalds bool ipu_idmac_channel_busy(struct ipu_soc *ipu, unsigned int chno); 228682b7c1cSLinus Torvalds 2292ffd48f2SSteve Longerbeam int ipu_csi_init(struct ipu_soc *ipu, struct device *dev, int id, 2302ffd48f2SSteve Longerbeam unsigned long base, u32 module, struct clk *clk_ipu); 2312ffd48f2SSteve Longerbeam void ipu_csi_exit(struct ipu_soc *ipu, int id); 2322ffd48f2SSteve Longerbeam 2331aa8ea0dSSteve Longerbeam int ipu_ic_init(struct ipu_soc *ipu, struct device *dev, 2341aa8ea0dSSteve Longerbeam unsigned long base, unsigned long tpmem_base); 2351aa8ea0dSSteve Longerbeam void ipu_ic_exit(struct ipu_soc *ipu); 2361aa8ea0dSSteve Longerbeam 2372d2ead45SSteve Longerbeam int ipu_vdi_init(struct ipu_soc *ipu, struct device *dev, 2382d2ead45SSteve Longerbeam unsigned long base, u32 module); 2392d2ead45SSteve Longerbeam void ipu_vdi_exit(struct ipu_soc *ipu); 2402d2ead45SSteve Longerbeam 241cd98e85aSSteve Longerbeam int ipu_image_convert_init(struct ipu_soc *ipu, struct device *dev); 242cd98e85aSSteve Longerbeam void ipu_image_convert_exit(struct ipu_soc *ipu); 243cd98e85aSSteve Longerbeam 24439b9004dSPhilipp Zabel int ipu_di_init(struct ipu_soc *ipu, struct device *dev, int id, 24539b9004dSPhilipp Zabel unsigned long base, u32 module, struct clk *ipu_clk); 24639b9004dSPhilipp Zabel void ipu_di_exit(struct ipu_soc *ipu, int id); 24739b9004dSPhilipp Zabel 24839b9004dSPhilipp Zabel int ipu_dmfc_init(struct ipu_soc *ipu, struct device *dev, unsigned long base, 24939b9004dSPhilipp Zabel struct clk *ipu_clk); 25039b9004dSPhilipp Zabel void ipu_dmfc_exit(struct ipu_soc *ipu); 25139b9004dSPhilipp Zabel 25239b9004dSPhilipp Zabel int ipu_dp_init(struct ipu_soc *ipu, struct device *dev, unsigned long base); 25339b9004dSPhilipp Zabel void ipu_dp_exit(struct ipu_soc *ipu); 25439b9004dSPhilipp Zabel 25539b9004dSPhilipp Zabel int ipu_dc_init(struct ipu_soc *ipu, struct device *dev, unsigned long base, 25639b9004dSPhilipp Zabel unsigned long template_base); 25739b9004dSPhilipp Zabel void ipu_dc_exit(struct ipu_soc *ipu); 25839b9004dSPhilipp Zabel 25939b9004dSPhilipp Zabel int ipu_cpmem_init(struct ipu_soc *ipu, struct device *dev, unsigned long base); 26039b9004dSPhilipp Zabel void ipu_cpmem_exit(struct ipu_soc *ipu); 26139b9004dSPhilipp Zabel 26235de925fSPhilipp Zabel int ipu_smfc_init(struct ipu_soc *ipu, struct device *dev, unsigned long base); 26335de925fSPhilipp Zabel void ipu_smfc_exit(struct ipu_soc *ipu); 26435de925fSPhilipp Zabel 265d2a34232SLucas Stach struct ipu_pre *ipu_pre_lookup_by_phandle(struct device *dev, const char *name, 266d2a34232SLucas Stach int index); 267d2a34232SLucas Stach int ipu_pre_get_available_count(void); 268d2a34232SLucas Stach int ipu_pre_get(struct ipu_pre *pre); 269d2a34232SLucas Stach void ipu_pre_put(struct ipu_pre *pre); 270d2a34232SLucas Stach u32 ipu_pre_get_baddr(struct ipu_pre *pre); 271d2a34232SLucas Stach void ipu_pre_configure(struct ipu_pre *pre, unsigned int width, 2722f64a554SLucas Stach unsigned int height, unsigned int stride, u32 format, 2732f64a554SLucas Stach uint64_t modifier, unsigned int bufaddr); 274d2a34232SLucas Stach void ipu_pre_update(struct ipu_pre *pre, unsigned int bufaddr); 275*0a29b1abSLucas Stach bool ipu_pre_update_pending(struct ipu_pre *pre); 276d2a34232SLucas Stach 277ea9c2605SLucas Stach struct ipu_prg *ipu_prg_lookup_by_phandle(struct device *dev, const char *name, 278ea9c2605SLucas Stach int ipu_id); 279ea9c2605SLucas Stach 280d2a34232SLucas Stach extern struct platform_driver ipu_pre_drv; 281ea9c2605SLucas Stach extern struct platform_driver ipu_prg_drv; 282d2a34232SLucas Stach 28339b9004dSPhilipp Zabel #endif /* __IPU_PRV_H__ */ 284