1c942fddfSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */
239b9004dSPhilipp Zabel /*
339b9004dSPhilipp Zabel * Copyright (c) 2010 Sascha Hauer <s.hauer@pengutronix.de>
439b9004dSPhilipp Zabel * Copyright (C) 2005-2009 Freescale Semiconductor, Inc.
539b9004dSPhilipp Zabel */
639b9004dSPhilipp Zabel #ifndef __IPU_PRV_H__
739b9004dSPhilipp Zabel #define __IPU_PRV_H__
839b9004dSPhilipp Zabel
939b9004dSPhilipp Zabel struct ipu_soc;
1039b9004dSPhilipp Zabel
1130745abeSThomas Zimmermann #include <linux/io.h>
1239b9004dSPhilipp Zabel #include <linux/types.h>
1339b9004dSPhilipp Zabel #include <linux/device.h>
1439b9004dSPhilipp Zabel #include <linux/clk.h>
1539b9004dSPhilipp Zabel #include <linux/platform_device.h>
1639b9004dSPhilipp Zabel
1739b9004dSPhilipp Zabel #include <video/imx-ipu-v3.h>
1839b9004dSPhilipp Zabel
1939b9004dSPhilipp Zabel #define IPU_MCU_T_DEFAULT 8
2039b9004dSPhilipp Zabel #define IPU_CM_IDMAC_REG_OFS 0x00008000
2139b9004dSPhilipp Zabel #define IPU_CM_IC_REG_OFS 0x00020000
2239b9004dSPhilipp Zabel #define IPU_CM_IRT_REG_OFS 0x00028000
2339b9004dSPhilipp Zabel #define IPU_CM_CSI0_REG_OFS 0x00030000
2439b9004dSPhilipp Zabel #define IPU_CM_CSI1_REG_OFS 0x00038000
2539b9004dSPhilipp Zabel #define IPU_CM_SMFC_REG_OFS 0x00050000
2639b9004dSPhilipp Zabel #define IPU_CM_DC_REG_OFS 0x00058000
2739b9004dSPhilipp Zabel #define IPU_CM_DMFC_REG_OFS 0x00060000
2839b9004dSPhilipp Zabel
2939b9004dSPhilipp Zabel /* Register addresses */
3039b9004dSPhilipp Zabel /* IPU Common registers */
3139b9004dSPhilipp Zabel #define IPU_CM_REG(offset) (offset)
3239b9004dSPhilipp Zabel
3339b9004dSPhilipp Zabel #define IPU_CONF IPU_CM_REG(0)
3439b9004dSPhilipp Zabel
3539b9004dSPhilipp Zabel #define IPU_SRM_PRI1 IPU_CM_REG(0x00a0)
3639b9004dSPhilipp Zabel #define IPU_SRM_PRI2 IPU_CM_REG(0x00a4)
3739b9004dSPhilipp Zabel #define IPU_FS_PROC_FLOW1 IPU_CM_REG(0x00a8)
3839b9004dSPhilipp Zabel #define IPU_FS_PROC_FLOW2 IPU_CM_REG(0x00ac)
3939b9004dSPhilipp Zabel #define IPU_FS_PROC_FLOW3 IPU_CM_REG(0x00b0)
4039b9004dSPhilipp Zabel #define IPU_FS_DISP_FLOW1 IPU_CM_REG(0x00b4)
4139b9004dSPhilipp Zabel #define IPU_FS_DISP_FLOW2 IPU_CM_REG(0x00b8)
4239b9004dSPhilipp Zabel #define IPU_SKIP IPU_CM_REG(0x00bc)
4339b9004dSPhilipp Zabel #define IPU_DISP_ALT_CONF IPU_CM_REG(0x00c0)
4439b9004dSPhilipp Zabel #define IPU_DISP_GEN IPU_CM_REG(0x00c4)
4539b9004dSPhilipp Zabel #define IPU_DISP_ALT1 IPU_CM_REG(0x00c8)
4639b9004dSPhilipp Zabel #define IPU_DISP_ALT2 IPU_CM_REG(0x00cc)
4739b9004dSPhilipp Zabel #define IPU_DISP_ALT3 IPU_CM_REG(0x00d0)
4839b9004dSPhilipp Zabel #define IPU_DISP_ALT4 IPU_CM_REG(0x00d4)
4939b9004dSPhilipp Zabel #define IPU_SNOOP IPU_CM_REG(0x00d8)
5039b9004dSPhilipp Zabel #define IPU_MEM_RST IPU_CM_REG(0x00dc)
5139b9004dSPhilipp Zabel #define IPU_PM IPU_CM_REG(0x00e0)
5239b9004dSPhilipp Zabel #define IPU_GPR IPU_CM_REG(0x00e4)
5339b9004dSPhilipp Zabel #define IPU_CHA_DB_MODE_SEL(ch) IPU_CM_REG(0x0150 + 4 * ((ch) / 32))
5439b9004dSPhilipp Zabel #define IPU_ALT_CHA_DB_MODE_SEL(ch) IPU_CM_REG(0x0168 + 4 * ((ch) / 32))
5539b9004dSPhilipp Zabel #define IPU_CHA_CUR_BUF(ch) IPU_CM_REG(0x023C + 4 * ((ch) / 32))
5639b9004dSPhilipp Zabel #define IPU_ALT_CUR_BUF0 IPU_CM_REG(0x0244)
5739b9004dSPhilipp Zabel #define IPU_ALT_CUR_BUF1 IPU_CM_REG(0x0248)
5839b9004dSPhilipp Zabel #define IPU_SRM_STAT IPU_CM_REG(0x024C)
5939b9004dSPhilipp Zabel #define IPU_PROC_TASK_STAT IPU_CM_REG(0x0250)
6039b9004dSPhilipp Zabel #define IPU_DISP_TASK_STAT IPU_CM_REG(0x0254)
6139b9004dSPhilipp Zabel #define IPU_CHA_BUF0_RDY(ch) IPU_CM_REG(0x0268 + 4 * ((ch) / 32))
6239b9004dSPhilipp Zabel #define IPU_CHA_BUF1_RDY(ch) IPU_CM_REG(0x0270 + 4 * ((ch) / 32))
63aa52f578SSteve Longerbeam #define IPU_CHA_BUF2_RDY(ch) IPU_CM_REG(0x0288 + 4 * ((ch) / 32))
6439b9004dSPhilipp Zabel #define IPU_ALT_CHA_BUF0_RDY(ch) IPU_CM_REG(0x0278 + 4 * ((ch) / 32))
6539b9004dSPhilipp Zabel #define IPU_ALT_CHA_BUF1_RDY(ch) IPU_CM_REG(0x0280 + 4 * ((ch) / 32))
6639b9004dSPhilipp Zabel
6739b9004dSPhilipp Zabel #define IPU_INT_CTRL(n) IPU_CM_REG(0x003C + 4 * (n))
6839b9004dSPhilipp Zabel #define IPU_INT_STAT(n) IPU_CM_REG(0x0200 + 4 * (n))
6939b9004dSPhilipp Zabel
70f9bb7acbSPhilipp Zabel /* SRM_PRI2 */
71f9bb7acbSPhilipp Zabel #define DP_S_SRM_MODE_MASK (0x3 << 3)
72f9bb7acbSPhilipp Zabel #define DP_S_SRM_MODE_NOW (0x3 << 3)
73f9bb7acbSPhilipp Zabel #define DP_S_SRM_MODE_NEXT_FRAME (0x1 << 3)
74f9bb7acbSPhilipp Zabel
75ac4708faSSteve Longerbeam /* FS_PROC_FLOW1 */
76ac4708faSSteve Longerbeam #define FS_PRPENC_ROT_SRC_SEL_MASK (0xf << 0)
77ac4708faSSteve Longerbeam #define FS_PRPENC_ROT_SRC_SEL_ENC (0x7 << 0)
78ac4708faSSteve Longerbeam #define FS_PRPVF_ROT_SRC_SEL_MASK (0xf << 8)
79ac4708faSSteve Longerbeam #define FS_PRPVF_ROT_SRC_SEL_VF (0x8 << 8)
80ac4708faSSteve Longerbeam #define FS_PP_SRC_SEL_MASK (0xf << 12)
81ac4708faSSteve Longerbeam #define FS_PP_ROT_SRC_SEL_MASK (0xf << 16)
82ac4708faSSteve Longerbeam #define FS_PP_ROT_SRC_SEL_PP (0x5 << 16)
83ac4708faSSteve Longerbeam #define FS_VDI1_SRC_SEL_MASK (0x3 << 20)
84ac4708faSSteve Longerbeam #define FS_VDI3_SRC_SEL_MASK (0x3 << 20)
85ac4708faSSteve Longerbeam #define FS_PRP_SRC_SEL_MASK (0xf << 24)
86ac4708faSSteve Longerbeam #define FS_VDI_SRC_SEL_MASK (0x3 << 28)
87ac4708faSSteve Longerbeam #define FS_VDI_SRC_SEL_CSI_DIRECT (0x1 << 28)
88ac4708faSSteve Longerbeam #define FS_VDI_SRC_SEL_VDOA (0x2 << 28)
89ac4708faSSteve Longerbeam
90ac4708faSSteve Longerbeam /* FS_PROC_FLOW2 */
91ac4708faSSteve Longerbeam #define FS_PRP_ENC_DEST_SEL_MASK (0xf << 0)
92ac4708faSSteve Longerbeam #define FS_PRP_ENC_DEST_SEL_IRT_ENC (0x1 << 0)
93ac4708faSSteve Longerbeam #define FS_PRPVF_DEST_SEL_MASK (0xf << 4)
94ac4708faSSteve Longerbeam #define FS_PRPVF_DEST_SEL_IRT_VF (0x1 << 4)
95ac4708faSSteve Longerbeam #define FS_PRPVF_ROT_DEST_SEL_MASK (0xf << 8)
96ac4708faSSteve Longerbeam #define FS_PP_DEST_SEL_MASK (0xf << 12)
97ac4708faSSteve Longerbeam #define FS_PP_DEST_SEL_IRT_PP (0x3 << 12)
98ac4708faSSteve Longerbeam #define FS_PP_ROT_DEST_SEL_MASK (0xf << 16)
99ac4708faSSteve Longerbeam #define FS_PRPENC_ROT_DEST_SEL_MASK (0xf << 20)
100ac4708faSSteve Longerbeam #define FS_PRP_DEST_SEL_MASK (0xf << 24)
101ac4708faSSteve Longerbeam
10239b9004dSPhilipp Zabel #define IPU_DI0_COUNTER_RELEASE (1 << 24)
10339b9004dSPhilipp Zabel #define IPU_DI1_COUNTER_RELEASE (1 << 25)
10439b9004dSPhilipp Zabel
10539b9004dSPhilipp Zabel #define IPU_IDMAC_REG(offset) (offset)
10639b9004dSPhilipp Zabel
10739b9004dSPhilipp Zabel #define IDMAC_CONF IPU_IDMAC_REG(0x0000)
10839b9004dSPhilipp Zabel #define IDMAC_CHA_EN(ch) IPU_IDMAC_REG(0x0004 + 4 * ((ch) / 32))
10939b9004dSPhilipp Zabel #define IDMAC_SEP_ALPHA IPU_IDMAC_REG(0x000c)
11039b9004dSPhilipp Zabel #define IDMAC_ALT_SEP_ALPHA IPU_IDMAC_REG(0x0010)
11139b9004dSPhilipp Zabel #define IDMAC_CHA_PRI(ch) IPU_IDMAC_REG(0x0014 + 4 * ((ch) / 32))
11239b9004dSPhilipp Zabel #define IDMAC_WM_EN(ch) IPU_IDMAC_REG(0x001c + 4 * ((ch) / 32))
11339b9004dSPhilipp Zabel #define IDMAC_CH_LOCK_EN_1 IPU_IDMAC_REG(0x0024)
11439b9004dSPhilipp Zabel #define IDMAC_CH_LOCK_EN_2 IPU_IDMAC_REG(0x0028)
11539b9004dSPhilipp Zabel #define IDMAC_SUB_ADDR_0 IPU_IDMAC_REG(0x002c)
11639b9004dSPhilipp Zabel #define IDMAC_SUB_ADDR_1 IPU_IDMAC_REG(0x0030)
11739b9004dSPhilipp Zabel #define IDMAC_SUB_ADDR_2 IPU_IDMAC_REG(0x0034)
11839b9004dSPhilipp Zabel #define IDMAC_BAND_EN(ch) IPU_IDMAC_REG(0x0040 + 4 * ((ch) / 32))
11939b9004dSPhilipp Zabel #define IDMAC_CHA_BUSY(ch) IPU_IDMAC_REG(0x0100 + 4 * ((ch) / 32))
12039b9004dSPhilipp Zabel
12139b9004dSPhilipp Zabel #define IPU_NUM_IRQS (32 * 15)
12239b9004dSPhilipp Zabel
12339b9004dSPhilipp Zabel enum ipu_modules {
12439b9004dSPhilipp Zabel IPU_CONF_CSI0_EN = (1 << 0),
12539b9004dSPhilipp Zabel IPU_CONF_CSI1_EN = (1 << 1),
12639b9004dSPhilipp Zabel IPU_CONF_IC_EN = (1 << 2),
12739b9004dSPhilipp Zabel IPU_CONF_ROT_EN = (1 << 3),
12839b9004dSPhilipp Zabel IPU_CONF_ISP_EN = (1 << 4),
12939b9004dSPhilipp Zabel IPU_CONF_DP_EN = (1 << 5),
13039b9004dSPhilipp Zabel IPU_CONF_DI0_EN = (1 << 6),
13139b9004dSPhilipp Zabel IPU_CONF_DI1_EN = (1 << 7),
13239b9004dSPhilipp Zabel IPU_CONF_SMFC_EN = (1 << 8),
13339b9004dSPhilipp Zabel IPU_CONF_DC_EN = (1 << 9),
13439b9004dSPhilipp Zabel IPU_CONF_DMFC_EN = (1 << 10),
13539b9004dSPhilipp Zabel
13639b9004dSPhilipp Zabel IPU_CONF_VDI_EN = (1 << 12),
13739b9004dSPhilipp Zabel
13839b9004dSPhilipp Zabel IPU_CONF_IDMAC_DIS = (1 << 22),
13939b9004dSPhilipp Zabel
14039b9004dSPhilipp Zabel IPU_CONF_IC_DMFC_SEL = (1 << 25),
14139b9004dSPhilipp Zabel IPU_CONF_IC_DMFC_SYNC = (1 << 26),
14239b9004dSPhilipp Zabel IPU_CONF_VDI_DMFC_SYNC = (1 << 27),
14339b9004dSPhilipp Zabel
14439b9004dSPhilipp Zabel IPU_CONF_CSI0_DATA_SOURCE = (1 << 28),
14539b9004dSPhilipp Zabel IPU_CONF_CSI1_DATA_SOURCE = (1 << 29),
14639b9004dSPhilipp Zabel IPU_CONF_IC_INPUT = (1 << 30),
14739b9004dSPhilipp Zabel IPU_CONF_CSI_SEL = (1 << 31),
14839b9004dSPhilipp Zabel };
14939b9004dSPhilipp Zabel
15039b9004dSPhilipp Zabel struct ipuv3_channel {
15139b9004dSPhilipp Zabel unsigned int num;
15239b9004dSPhilipp Zabel struct ipu_soc *ipu;
15393adc8b5SPhilipp Zabel struct list_head list;
15439b9004dSPhilipp Zabel };
15539b9004dSPhilipp Zabel
1567d2691daSSteve Longerbeam struct ipu_cpmem;
1572ffd48f2SSteve Longerbeam struct ipu_csi;
15839b9004dSPhilipp Zabel struct ipu_dc_priv;
15939b9004dSPhilipp Zabel struct ipu_dmfc_priv;
16039b9004dSPhilipp Zabel struct ipu_di;
1611aa8ea0dSSteve Longerbeam struct ipu_ic_priv;
1622d2ead45SSteve Longerbeam struct ipu_vdi;
163cd98e85aSSteve Longerbeam struct ipu_image_convert_priv;
16435de925fSPhilipp Zabel struct ipu_smfc_priv;
165d2a34232SLucas Stach struct ipu_pre;
166ea9c2605SLucas Stach struct ipu_prg;
16735de925fSPhilipp Zabel
16839b9004dSPhilipp Zabel struct ipu_devtype;
16939b9004dSPhilipp Zabel
17039b9004dSPhilipp Zabel struct ipu_soc {
17139b9004dSPhilipp Zabel struct device *dev;
17239b9004dSPhilipp Zabel const struct ipu_devtype *devtype;
17339b9004dSPhilipp Zabel enum ipuv3_type ipu_type;
17439b9004dSPhilipp Zabel spinlock_t lock;
17539b9004dSPhilipp Zabel struct mutex channel_lock;
17693adc8b5SPhilipp Zabel struct list_head channels;
17739b9004dSPhilipp Zabel
17839b9004dSPhilipp Zabel void __iomem *cm_reg;
17939b9004dSPhilipp Zabel void __iomem *idmac_reg;
18039b9004dSPhilipp Zabel
181572a7615SSteve Longerbeam int id;
18239b9004dSPhilipp Zabel int usecount;
18339b9004dSPhilipp Zabel
18439b9004dSPhilipp Zabel struct clk *clk;
18539b9004dSPhilipp Zabel
18639b9004dSPhilipp Zabel int irq_sync;
18739b9004dSPhilipp Zabel int irq_err;
18839b9004dSPhilipp Zabel struct irq_domain *domain;
18939b9004dSPhilipp Zabel
1907d2691daSSteve Longerbeam struct ipu_cpmem *cpmem_priv;
19139b9004dSPhilipp Zabel struct ipu_dc_priv *dc_priv;
19239b9004dSPhilipp Zabel struct ipu_dp_priv *dp_priv;
19339b9004dSPhilipp Zabel struct ipu_dmfc_priv *dmfc_priv;
19439b9004dSPhilipp Zabel struct ipu_di *di_priv[2];
1952ffd48f2SSteve Longerbeam struct ipu_csi *csi_priv[2];
1961aa8ea0dSSteve Longerbeam struct ipu_ic_priv *ic_priv;
1972d2ead45SSteve Longerbeam struct ipu_vdi *vdi_priv;
198cd98e85aSSteve Longerbeam struct ipu_image_convert_priv *image_convert_priv;
19935de925fSPhilipp Zabel struct ipu_smfc_priv *smfc_priv;
200ea9c2605SLucas Stach struct ipu_prg *prg_priv;
20139b9004dSPhilipp Zabel };
20239b9004dSPhilipp Zabel
ipu_idmac_read(struct ipu_soc * ipu,unsigned offset)2037d2691daSSteve Longerbeam static inline u32 ipu_idmac_read(struct ipu_soc *ipu, unsigned offset)
2047d2691daSSteve Longerbeam {
2057d2691daSSteve Longerbeam return readl(ipu->idmac_reg + offset);
2067d2691daSSteve Longerbeam }
2077d2691daSSteve Longerbeam
ipu_idmac_write(struct ipu_soc * ipu,u32 value,unsigned offset)2087d2691daSSteve Longerbeam static inline void ipu_idmac_write(struct ipu_soc *ipu, u32 value,
2097d2691daSSteve Longerbeam unsigned offset)
2107d2691daSSteve Longerbeam {
2117d2691daSSteve Longerbeam writel(value, ipu->idmac_reg + offset);
2127d2691daSSteve Longerbeam }
2137d2691daSSteve Longerbeam
214f9bb7acbSPhilipp Zabel void ipu_srm_dp_update(struct ipu_soc *ipu, bool sync);
21539b9004dSPhilipp Zabel
21639b9004dSPhilipp Zabel int ipu_module_enable(struct ipu_soc *ipu, u32 mask);
21739b9004dSPhilipp Zabel int ipu_module_disable(struct ipu_soc *ipu, u32 mask);
21839b9004dSPhilipp Zabel
219682b7c1cSLinus Torvalds bool ipu_idmac_channel_busy(struct ipu_soc *ipu, unsigned int chno);
220682b7c1cSLinus Torvalds
2212ffd48f2SSteve Longerbeam int ipu_csi_init(struct ipu_soc *ipu, struct device *dev, int id,
2222ffd48f2SSteve Longerbeam unsigned long base, u32 module, struct clk *clk_ipu);
2232ffd48f2SSteve Longerbeam void ipu_csi_exit(struct ipu_soc *ipu, int id);
2242ffd48f2SSteve Longerbeam
2251aa8ea0dSSteve Longerbeam int ipu_ic_init(struct ipu_soc *ipu, struct device *dev,
2261aa8ea0dSSteve Longerbeam unsigned long base, unsigned long tpmem_base);
2271aa8ea0dSSteve Longerbeam void ipu_ic_exit(struct ipu_soc *ipu);
2281aa8ea0dSSteve Longerbeam
2292d2ead45SSteve Longerbeam int ipu_vdi_init(struct ipu_soc *ipu, struct device *dev,
2302d2ead45SSteve Longerbeam unsigned long base, u32 module);
2312d2ead45SSteve Longerbeam void ipu_vdi_exit(struct ipu_soc *ipu);
2322d2ead45SSteve Longerbeam
233cd98e85aSSteve Longerbeam int ipu_image_convert_init(struct ipu_soc *ipu, struct device *dev);
234cd98e85aSSteve Longerbeam void ipu_image_convert_exit(struct ipu_soc *ipu);
235cd98e85aSSteve Longerbeam
23639b9004dSPhilipp Zabel int ipu_di_init(struct ipu_soc *ipu, struct device *dev, int id,
23739b9004dSPhilipp Zabel unsigned long base, u32 module, struct clk *ipu_clk);
23839b9004dSPhilipp Zabel void ipu_di_exit(struct ipu_soc *ipu, int id);
23939b9004dSPhilipp Zabel
24039b9004dSPhilipp Zabel int ipu_dmfc_init(struct ipu_soc *ipu, struct device *dev, unsigned long base,
24139b9004dSPhilipp Zabel struct clk *ipu_clk);
24239b9004dSPhilipp Zabel void ipu_dmfc_exit(struct ipu_soc *ipu);
24339b9004dSPhilipp Zabel
24439b9004dSPhilipp Zabel int ipu_dp_init(struct ipu_soc *ipu, struct device *dev, unsigned long base);
24539b9004dSPhilipp Zabel void ipu_dp_exit(struct ipu_soc *ipu);
24639b9004dSPhilipp Zabel
24739b9004dSPhilipp Zabel int ipu_dc_init(struct ipu_soc *ipu, struct device *dev, unsigned long base,
24839b9004dSPhilipp Zabel unsigned long template_base);
24939b9004dSPhilipp Zabel void ipu_dc_exit(struct ipu_soc *ipu);
25039b9004dSPhilipp Zabel
25139b9004dSPhilipp Zabel int ipu_cpmem_init(struct ipu_soc *ipu, struct device *dev, unsigned long base);
25239b9004dSPhilipp Zabel void ipu_cpmem_exit(struct ipu_soc *ipu);
25339b9004dSPhilipp Zabel
25435de925fSPhilipp Zabel int ipu_smfc_init(struct ipu_soc *ipu, struct device *dev, unsigned long base);
25535de925fSPhilipp Zabel void ipu_smfc_exit(struct ipu_soc *ipu);
25635de925fSPhilipp Zabel
257d2a34232SLucas Stach struct ipu_pre *ipu_pre_lookup_by_phandle(struct device *dev, const char *name,
258d2a34232SLucas Stach int index);
259d2a34232SLucas Stach int ipu_pre_get_available_count(void);
260d2a34232SLucas Stach int ipu_pre_get(struct ipu_pre *pre);
261d2a34232SLucas Stach void ipu_pre_put(struct ipu_pre *pre);
262d2a34232SLucas Stach u32 ipu_pre_get_baddr(struct ipu_pre *pre);
263d2a34232SLucas Stach void ipu_pre_configure(struct ipu_pre *pre, unsigned int width,
2642f64a554SLucas Stach unsigned int height, unsigned int stride, u32 format,
2652f64a554SLucas Stach uint64_t modifier, unsigned int bufaddr);
266*4dbc7d5dSLucas Stach void ipu_pre_update(struct ipu_pre *pre, uint64_t modifier, unsigned int bufaddr);
2670a29b1abSLucas Stach bool ipu_pre_update_pending(struct ipu_pre *pre);
268d2a34232SLucas Stach
269ea9c2605SLucas Stach struct ipu_prg *ipu_prg_lookup_by_phandle(struct device *dev, const char *name,
270ea9c2605SLucas Stach int ipu_id);
271ea9c2605SLucas Stach
272d2a34232SLucas Stach extern struct platform_driver ipu_pre_drv;
273ea9c2605SLucas Stach extern struct platform_driver ipu_prg_drv;
274d2a34232SLucas Stach
27539b9004dSPhilipp Zabel #endif /* __IPU_PRV_H__ */
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