1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2021, NVIDIA Corporation. 4 */ 5 6 #include <linux/device.h> 7 #include <linux/kref.h> 8 #include <linux/of.h> 9 #include <linux/of_platform.h> 10 #include <linux/pid.h> 11 #include <linux/slab.h> 12 13 #include "context.h" 14 #include "dev.h" 15 16 static void host1x_memory_context_release(struct device *dev) 17 { 18 /* context device is freed in host1x_memory_context_list_free() */ 19 } 20 21 int host1x_memory_context_list_init(struct host1x *host1x) 22 { 23 struct host1x_memory_context_list *cdl = &host1x->context_list; 24 struct device_node *node = host1x->dev->of_node; 25 struct host1x_memory_context *ctx; 26 unsigned int i; 27 int err; 28 29 cdl->devs = NULL; 30 cdl->len = 0; 31 mutex_init(&cdl->lock); 32 33 err = of_property_count_u32_elems(node, "iommu-map"); 34 if (err < 0) 35 return 0; 36 37 cdl->devs = kcalloc(err, sizeof(*cdl->devs), GFP_KERNEL); 38 if (!cdl->devs) 39 return -ENOMEM; 40 cdl->len = err / 4; 41 42 for (i = 0; i < cdl->len; i++) { 43 ctx = &cdl->devs[i]; 44 45 ctx->host = host1x; 46 47 device_initialize(&ctx->dev); 48 49 /* 50 * Due to an issue with T194 NVENC, only 38 bits can be used. 51 * Anyway, 256GiB of IOVA ought to be enough for anyone. 52 */ 53 ctx->dma_mask = DMA_BIT_MASK(38); 54 ctx->dev.dma_mask = &ctx->dma_mask; 55 ctx->dev.coherent_dma_mask = ctx->dma_mask; 56 dev_set_name(&ctx->dev, "host1x-ctx.%d", i); 57 ctx->dev.bus = &host1x_context_device_bus_type; 58 ctx->dev.parent = host1x->dev; 59 ctx->dev.release = host1x_memory_context_release; 60 61 dma_set_max_seg_size(&ctx->dev, UINT_MAX); 62 63 err = device_add(&ctx->dev); 64 if (err) { 65 dev_err(host1x->dev, "could not add context device %d: %d\n", i, err); 66 put_device(&ctx->dev); 67 goto unreg_devices; 68 } 69 70 err = of_dma_configure_id(&ctx->dev, node, true, &i); 71 if (err) { 72 dev_err(host1x->dev, "IOMMU configuration failed for context device %d: %d\n", 73 i, err); 74 device_unregister(&ctx->dev); 75 goto unreg_devices; 76 } 77 78 if (!tegra_dev_iommu_get_stream_id(&ctx->dev, &ctx->stream_id) || 79 !device_iommu_mapped(&ctx->dev)) { 80 dev_err(host1x->dev, "Context device %d has no IOMMU!\n", i); 81 device_unregister(&ctx->dev); 82 goto unreg_devices; 83 } 84 } 85 86 return 0; 87 88 unreg_devices: 89 while (i--) 90 device_unregister(&cdl->devs[i].dev); 91 92 kfree(cdl->devs); 93 cdl->devs = NULL; 94 cdl->len = 0; 95 96 return err; 97 } 98 99 void host1x_memory_context_list_free(struct host1x_memory_context_list *cdl) 100 { 101 unsigned int i; 102 103 for (i = 0; i < cdl->len; i++) 104 device_unregister(&cdl->devs[i].dev); 105 106 kfree(cdl->devs); 107 cdl->len = 0; 108 } 109 110 struct host1x_memory_context *host1x_memory_context_alloc(struct host1x *host1x, 111 struct device *dev, 112 struct pid *pid) 113 { 114 struct host1x_memory_context_list *cdl = &host1x->context_list; 115 struct host1x_memory_context *free = NULL; 116 int i; 117 118 if (!cdl->len) 119 return ERR_PTR(-EOPNOTSUPP); 120 121 mutex_lock(&cdl->lock); 122 123 for (i = 0; i < cdl->len; i++) { 124 struct host1x_memory_context *cd = &cdl->devs[i]; 125 126 if (cd->dev.iommu->iommu_dev != dev->iommu->iommu_dev) 127 continue; 128 129 if (cd->owner == pid) { 130 refcount_inc(&cd->ref); 131 mutex_unlock(&cdl->lock); 132 return cd; 133 } else if (!cd->owner && !free) { 134 free = cd; 135 } 136 } 137 138 if (!free) { 139 mutex_unlock(&cdl->lock); 140 return ERR_PTR(-EBUSY); 141 } 142 143 refcount_set(&free->ref, 1); 144 free->owner = get_pid(pid); 145 146 mutex_unlock(&cdl->lock); 147 148 return free; 149 } 150 EXPORT_SYMBOL_GPL(host1x_memory_context_alloc); 151 152 void host1x_memory_context_get(struct host1x_memory_context *cd) 153 { 154 refcount_inc(&cd->ref); 155 } 156 EXPORT_SYMBOL_GPL(host1x_memory_context_get); 157 158 void host1x_memory_context_put(struct host1x_memory_context *cd) 159 { 160 struct host1x_memory_context_list *cdl = &cd->host->context_list; 161 162 if (refcount_dec_and_mutex_lock(&cd->ref, &cdl->lock)) { 163 put_pid(cd->owner); 164 cd->owner = NULL; 165 mutex_unlock(&cdl->lock); 166 } 167 } 168 EXPORT_SYMBOL_GPL(host1x_memory_context_put); 169