1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * ZynqMP DisplayPort Subsystem Driver 4 * 5 * Copyright (C) 2017 - 2020 Xilinx, Inc. 6 * 7 * Authors: 8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com> 9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com> 10 */ 11 12 #include <linux/clk.h> 13 #include <linux/dma-mapping.h> 14 #include <linux/module.h> 15 #include <linux/of_graph.h> 16 #include <linux/of_reserved_mem.h> 17 #include <linux/platform_device.h> 18 #include <linux/pm_runtime.h> 19 #include <linux/slab.h> 20 21 #include <drm/drm_atomic_helper.h> 22 #include <drm/drm_bridge.h> 23 #include <drm/drm_modeset_helper.h> 24 #include <drm/drm_module.h> 25 26 #include "zynqmp_disp.h" 27 #include "zynqmp_dp.h" 28 #include "zynqmp_dpsub.h" 29 #include "zynqmp_kms.h" 30 31 /* ----------------------------------------------------------------------------- 32 * Power Management 33 */ 34 35 static int __maybe_unused zynqmp_dpsub_suspend(struct device *dev) 36 { 37 struct zynqmp_dpsub *dpsub = dev_get_drvdata(dev); 38 39 if (!dpsub->drm) 40 return 0; 41 42 return drm_mode_config_helper_suspend(&dpsub->drm->dev); 43 } 44 45 static int __maybe_unused zynqmp_dpsub_resume(struct device *dev) 46 { 47 struct zynqmp_dpsub *dpsub = dev_get_drvdata(dev); 48 49 if (!dpsub->drm) 50 return 0; 51 52 return drm_mode_config_helper_resume(&dpsub->drm->dev); 53 } 54 55 static const struct dev_pm_ops zynqmp_dpsub_pm_ops = { 56 SET_SYSTEM_SLEEP_PM_OPS(zynqmp_dpsub_suspend, zynqmp_dpsub_resume) 57 }; 58 59 /* ----------------------------------------------------------------------------- 60 * Probe & Remove 61 */ 62 63 static int zynqmp_dpsub_init_clocks(struct zynqmp_dpsub *dpsub) 64 { 65 int ret; 66 67 dpsub->apb_clk = devm_clk_get(dpsub->dev, "dp_apb_clk"); 68 if (IS_ERR(dpsub->apb_clk)) 69 return PTR_ERR(dpsub->apb_clk); 70 71 ret = clk_prepare_enable(dpsub->apb_clk); 72 if (ret) { 73 dev_err(dpsub->dev, "failed to enable the APB clock\n"); 74 return ret; 75 } 76 77 /* 78 * Try the live PL video clock, and fall back to the PS clock if the 79 * live PL video clock isn't valid. 80 */ 81 dpsub->vid_clk = devm_clk_get(dpsub->dev, "dp_live_video_in_clk"); 82 if (!IS_ERR(dpsub->vid_clk)) 83 dpsub->vid_clk_from_ps = false; 84 else if (PTR_ERR(dpsub->vid_clk) == -EPROBE_DEFER) 85 return PTR_ERR(dpsub->vid_clk); 86 87 if (IS_ERR_OR_NULL(dpsub->vid_clk)) { 88 dpsub->vid_clk = devm_clk_get(dpsub->dev, "dp_vtc_pixel_clk_in"); 89 if (IS_ERR(dpsub->vid_clk)) { 90 dev_err(dpsub->dev, "failed to init any video clock\n"); 91 return PTR_ERR(dpsub->vid_clk); 92 } 93 dpsub->vid_clk_from_ps = true; 94 } 95 96 /* 97 * Try the live PL audio clock, and fall back to the PS clock if the 98 * live PL audio clock isn't valid. Missing audio clock disables audio 99 * but isn't an error. 100 */ 101 dpsub->aud_clk = devm_clk_get(dpsub->dev, "dp_live_audio_aclk"); 102 if (!IS_ERR(dpsub->aud_clk)) { 103 dpsub->aud_clk_from_ps = false; 104 return 0; 105 } 106 107 dpsub->aud_clk = devm_clk_get(dpsub->dev, "dp_aud_clk"); 108 if (!IS_ERR(dpsub->aud_clk)) { 109 dpsub->aud_clk_from_ps = true; 110 return 0; 111 } 112 113 dev_info(dpsub->dev, "audio disabled due to missing clock\n"); 114 return 0; 115 } 116 117 static int zynqmp_dpsub_parse_dt(struct zynqmp_dpsub *dpsub) 118 { 119 struct device_node *np; 120 unsigned int i; 121 122 /* 123 * For backward compatibility with old device trees that don't contain 124 * ports, consider that only the DP output port is connected if no 125 * ports child no exists. 126 */ 127 np = of_get_child_by_name(dpsub->dev->of_node, "ports"); 128 of_node_put(np); 129 if (!np) { 130 dev_warn(dpsub->dev, "missing ports, update DT bindings\n"); 131 dpsub->connected_ports = BIT(ZYNQMP_DPSUB_PORT_OUT_DP); 132 dpsub->dma_enabled = true; 133 return 0; 134 } 135 136 /* Check which ports are connected. */ 137 for (i = 0; i < ZYNQMP_DPSUB_NUM_PORTS; ++i) { 138 struct device_node *np; 139 140 np = of_graph_get_remote_node(dpsub->dev->of_node, i, -1); 141 if (np) { 142 dpsub->connected_ports |= BIT(i); 143 of_node_put(np); 144 } 145 } 146 147 /* Sanity checks. */ 148 if ((dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_LIVE_VIDEO)) && 149 (dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_LIVE_GFX))) { 150 dev_err(dpsub->dev, "only one live video input is supported\n"); 151 return -EINVAL; 152 } 153 154 if ((dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_LIVE_VIDEO)) || 155 (dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_LIVE_GFX))) { 156 if (dpsub->vid_clk_from_ps) { 157 dev_err(dpsub->dev, 158 "live video input requires PL clock\n"); 159 return -EINVAL; 160 } 161 } else { 162 dpsub->dma_enabled = true; 163 } 164 165 if (dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_LIVE_AUDIO)) 166 dev_warn(dpsub->dev, "live audio unsupported, ignoring\n"); 167 168 if ((dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_OUT_VIDEO)) || 169 (dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_OUT_AUDIO))) 170 dev_warn(dpsub->dev, "output to PL unsupported, ignoring\n"); 171 172 if (!(dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_OUT_DP))) { 173 dev_err(dpsub->dev, "DP output port not connected\n"); 174 return -EINVAL; 175 } 176 177 return 0; 178 } 179 180 void zynqmp_dpsub_release(struct zynqmp_dpsub *dpsub) 181 { 182 kfree(dpsub->disp); 183 kfree(dpsub); 184 } 185 186 static int zynqmp_dpsub_probe(struct platform_device *pdev) 187 { 188 struct zynqmp_dpsub *dpsub; 189 int ret; 190 191 /* Allocate private data. */ 192 dpsub = kzalloc(sizeof(*dpsub), GFP_KERNEL); 193 if (!dpsub) 194 return -ENOMEM; 195 196 dpsub->dev = &pdev->dev; 197 platform_set_drvdata(pdev, dpsub); 198 199 ret = dma_set_mask(dpsub->dev, DMA_BIT_MASK(ZYNQMP_DISP_MAX_DMA_BIT)); 200 if (ret) 201 return ret; 202 203 dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32)); 204 205 /* Try the reserved memory. Proceed if there's none. */ 206 of_reserved_mem_device_init(&pdev->dev); 207 208 ret = zynqmp_dpsub_init_clocks(dpsub); 209 if (ret < 0) 210 goto err_mem; 211 212 ret = zynqmp_dpsub_parse_dt(dpsub); 213 if (ret < 0) 214 goto err_mem; 215 216 pm_runtime_enable(&pdev->dev); 217 218 /* 219 * DP should be probed first so that the zynqmp_disp can set the output 220 * format accordingly. 221 */ 222 ret = zynqmp_dp_probe(dpsub); 223 if (ret) 224 goto err_pm; 225 226 ret = zynqmp_disp_probe(dpsub); 227 if (ret) 228 goto err_dp; 229 230 drm_bridge_add(dpsub->bridge); 231 232 if (dpsub->dma_enabled) { 233 ret = zynqmp_dpsub_drm_init(dpsub); 234 if (ret) 235 goto err_disp; 236 } 237 238 ret = zynqmp_audio_init(dpsub); 239 if (ret) 240 goto err_drm_cleanup; 241 242 dev_info(&pdev->dev, "ZynqMP DisplayPort Subsystem driver probed"); 243 244 return 0; 245 246 err_drm_cleanup: 247 if (dpsub->drm) 248 zynqmp_dpsub_drm_cleanup(dpsub); 249 err_disp: 250 drm_bridge_remove(dpsub->bridge); 251 zynqmp_disp_remove(dpsub); 252 err_dp: 253 zynqmp_dp_remove(dpsub); 254 err_pm: 255 pm_runtime_disable(&pdev->dev); 256 clk_disable_unprepare(dpsub->apb_clk); 257 err_mem: 258 of_reserved_mem_device_release(&pdev->dev); 259 if (!dpsub->drm) 260 zynqmp_dpsub_release(dpsub); 261 return ret; 262 } 263 264 static void zynqmp_dpsub_remove(struct platform_device *pdev) 265 { 266 struct zynqmp_dpsub *dpsub = platform_get_drvdata(pdev); 267 268 zynqmp_audio_uninit(dpsub); 269 270 if (dpsub->drm) 271 zynqmp_dpsub_drm_cleanup(dpsub); 272 273 drm_bridge_remove(dpsub->bridge); 274 zynqmp_disp_remove(dpsub); 275 zynqmp_dp_remove(dpsub); 276 277 pm_runtime_disable(&pdev->dev); 278 clk_disable_unprepare(dpsub->apb_clk); 279 of_reserved_mem_device_release(&pdev->dev); 280 281 if (!dpsub->drm) 282 zynqmp_dpsub_release(dpsub); 283 } 284 285 static void zynqmp_dpsub_shutdown(struct platform_device *pdev) 286 { 287 struct zynqmp_dpsub *dpsub = platform_get_drvdata(pdev); 288 289 if (!dpsub->drm) 290 return; 291 292 drm_atomic_helper_shutdown(&dpsub->drm->dev); 293 } 294 295 static const struct of_device_id zynqmp_dpsub_of_match[] = { 296 { .compatible = "xlnx,zynqmp-dpsub-1.7", }, 297 { /* end of table */ }, 298 }; 299 MODULE_DEVICE_TABLE(of, zynqmp_dpsub_of_match); 300 301 static struct platform_driver zynqmp_dpsub_driver = { 302 .probe = zynqmp_dpsub_probe, 303 .remove = zynqmp_dpsub_remove, 304 .shutdown = zynqmp_dpsub_shutdown, 305 .driver = { 306 .name = "zynqmp-dpsub", 307 .pm = &zynqmp_dpsub_pm_ops, 308 .of_match_table = zynqmp_dpsub_of_match, 309 }, 310 }; 311 312 drm_module_platform_driver(zynqmp_dpsub_driver); 313 314 MODULE_AUTHOR("Xilinx, Inc."); 315 MODULE_DESCRIPTION("ZynqMP DP Subsystem Driver"); 316 MODULE_LICENSE("GPL v2"); 317