1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * ZynqMP DisplayPort Subsystem Driver - Audio support 4 * 5 * Copyright (C) 2015 - 2024 Xilinx, Inc. 6 * 7 * Authors: 8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com> 9 * - Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> 10 */ 11 12 #include <linux/clk.h> 13 #include <linux/device.h> 14 #include <linux/mutex.h> 15 #include <linux/pm_runtime.h> 16 17 #include <sound/asoundef.h> 18 #include <sound/core.h> 19 #include <sound/dmaengine_pcm.h> 20 #include <sound/initval.h> 21 #include <sound/pcm.h> 22 #include <sound/soc.h> 23 #include <sound/tlv.h> 24 25 #include "zynqmp_disp_regs.h" 26 #include "zynqmp_dp.h" 27 #include "zynqmp_dpsub.h" 28 29 #define ZYNQMP_DISP_AUD_SMPL_RATE_TO_CLK 512 30 #define ZYNQMP_NUM_PCMS 2 31 32 struct zynqmp_dpsub_audio { 33 void __iomem *base; 34 35 struct snd_soc_card card; 36 37 const char *dai_name; 38 const char *link_names[ZYNQMP_NUM_PCMS]; 39 const char *pcm_names[ZYNQMP_NUM_PCMS]; 40 41 struct snd_soc_dai_driver dai_driver; 42 struct snd_dmaengine_pcm_config pcm_configs[2]; 43 44 struct snd_soc_dai_link links[ZYNQMP_NUM_PCMS]; 45 46 struct { 47 struct snd_soc_dai_link_component cpu; 48 struct snd_soc_dai_link_component codec; 49 struct snd_soc_dai_link_component platform; 50 } components[ZYNQMP_NUM_PCMS]; 51 52 /* 53 * Protects: 54 * - enabled_streams 55 * - volumes 56 * - current_rate 57 */ 58 struct mutex enable_lock; 59 60 u32 enabled_streams; 61 u32 current_rate; 62 63 u16 volumes[2]; 64 }; 65 66 static const struct snd_pcm_hardware zynqmp_dp_pcm_hw = { 67 .info = SNDRV_PCM_INFO_MMAP | 68 SNDRV_PCM_INFO_MMAP_VALID | 69 SNDRV_PCM_INFO_INTERLEAVED | 70 SNDRV_PCM_INFO_PAUSE | 71 SNDRV_PCM_INFO_RESUME | 72 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP, 73 74 .buffer_bytes_max = 128 * 1024, 75 .period_bytes_min = 256, 76 .period_bytes_max = 1024 * 1024, 77 .periods_min = 2, 78 .periods_max = 256, 79 }; 80 81 static int zynqmp_dp_startup(struct snd_pcm_substream *substream) 82 { 83 struct snd_pcm_runtime *runtime = substream->runtime; 84 85 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 86 256); 87 88 return 0; 89 } 90 91 static const struct snd_soc_ops zynqmp_dp_ops = { 92 .startup = zynqmp_dp_startup, 93 }; 94 95 static void zynqmp_dp_audio_write(struct zynqmp_dpsub_audio *audio, int reg, 96 u32 val) 97 { 98 writel(val, audio->base + reg); 99 } 100 101 static int dp_dai_hw_params(struct snd_pcm_substream *substream, 102 struct snd_pcm_hw_params *params, 103 struct snd_soc_dai *socdai) 104 { 105 struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); 106 struct zynqmp_dpsub *dpsub = 107 snd_soc_dai_get_drvdata(snd_soc_rtd_to_cpu(rtd, 0)); 108 struct zynqmp_dpsub_audio *audio = dpsub->audio; 109 int ret; 110 u32 sample_rate; 111 struct snd_aes_iec958 iec = { 0 }; 112 unsigned long rate; 113 114 sample_rate = params_rate(params); 115 116 if (sample_rate != 48000 && sample_rate != 44100) 117 return -EINVAL; 118 119 guard(mutex)(&audio->enable_lock); 120 121 if (audio->enabled_streams && audio->current_rate != sample_rate) { 122 dev_err(dpsub->dev, 123 "Can't change rate while playback enabled\n"); 124 return -EINVAL; 125 } 126 127 if (audio->enabled_streams > 0) { 128 /* Nothing to do */ 129 audio->enabled_streams++; 130 return 0; 131 } 132 133 audio->current_rate = sample_rate; 134 135 /* Note: clock rate can only be changed if the clock is disabled */ 136 ret = clk_set_rate(dpsub->aud_clk, 137 sample_rate * ZYNQMP_DISP_AUD_SMPL_RATE_TO_CLK); 138 if (ret) { 139 dev_err(dpsub->dev, "can't set aud_clk to %u err:%d\n", 140 sample_rate * ZYNQMP_DISP_AUD_SMPL_RATE_TO_CLK, ret); 141 return ret; 142 } 143 144 clk_prepare_enable(dpsub->aud_clk); 145 146 rate = clk_get_rate(dpsub->aud_clk); 147 148 /* Ignore some offset +- 10 */ 149 if (abs(sample_rate * ZYNQMP_DISP_AUD_SMPL_RATE_TO_CLK - rate) > 10) { 150 dev_err(dpsub->dev, "aud_clk offset is higher: %ld\n", 151 sample_rate * ZYNQMP_DISP_AUD_SMPL_RATE_TO_CLK - rate); 152 clk_disable_unprepare(dpsub->aud_clk); 153 return -EINVAL; 154 } 155 156 pm_runtime_get_sync(dpsub->dev); 157 158 zynqmp_dp_audio_write(audio, ZYNQMP_DISP_AUD_MIXER_VOLUME, 159 audio->volumes[0] | (audio->volumes[1] << 16)); 160 161 /* Clear the audio soft reset register as it's an non-reset flop. */ 162 zynqmp_dp_audio_write(audio, ZYNQMP_DISP_AUD_SOFT_RESET, 0); 163 164 /* Only 2 channel audio is supported now */ 165 zynqmp_dp_audio_set_channels(dpsub->dp, 2); 166 167 zynqmp_dp_audio_write_n_m(dpsub->dp); 168 169 /* Channel status */ 170 171 if (sample_rate == 48000) 172 iec.status[3] = IEC958_AES3_CON_FS_48000; 173 else 174 iec.status[3] = IEC958_AES3_CON_FS_44100; 175 176 for (unsigned int i = 0; i < AES_IEC958_STATUS_SIZE / 4; ++i) { 177 u32 v; 178 179 v = (iec.status[(i * 4) + 0] << 0) | 180 (iec.status[(i * 4) + 1] << 8) | 181 (iec.status[(i * 4) + 2] << 16) | 182 (iec.status[(i * 4) + 3] << 24); 183 184 zynqmp_dp_audio_write(audio, ZYNQMP_DISP_AUD_CH_STATUS(i), v); 185 } 186 187 zynqmp_dp_audio_enable(dpsub->dp); 188 189 audio->enabled_streams++; 190 191 return 0; 192 } 193 194 static int dp_dai_hw_free(struct snd_pcm_substream *substream, 195 struct snd_soc_dai *socdai) 196 { 197 struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); 198 struct zynqmp_dpsub *dpsub = 199 snd_soc_dai_get_drvdata(snd_soc_rtd_to_cpu(rtd, 0)); 200 struct zynqmp_dpsub_audio *audio = dpsub->audio; 201 202 guard(mutex)(&audio->enable_lock); 203 204 /* Nothing to do */ 205 if (audio->enabled_streams > 1) { 206 audio->enabled_streams--; 207 return 0; 208 } 209 210 pm_runtime_put(dpsub->dev); 211 212 zynqmp_dp_audio_disable(dpsub->dp); 213 214 /* 215 * Reset doesn't work. If we assert reset between audio stop and start, 216 * the audio won't start anymore. Probably we are missing writing 217 * some audio related registers. A/B buf? 218 */ 219 /* 220 zynqmp_disp_audio_write(audio, ZYNQMP_DISP_AUD_SOFT_RESET, 221 ZYNQMP_DISP_AUD_SOFT_RESET_AUD_SRST); 222 */ 223 224 clk_disable_unprepare(dpsub->aud_clk); 225 226 audio->current_rate = 0; 227 audio->enabled_streams--; 228 229 return 0; 230 } 231 232 static const struct snd_soc_dai_ops zynqmp_dp_dai_ops = { 233 .hw_params = dp_dai_hw_params, 234 .hw_free = dp_dai_hw_free, 235 }; 236 237 /* 238 * Min = 10 * log10(0x1 / 0x2000) = -39.13 239 * Max = 10 * log10(0xffffff / 0x2000) = 9.03 240 */ 241 static const DECLARE_TLV_DB_RANGE(zynqmp_dp_tlv, 242 0x0, 0x0, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, -3913, 1), 243 0x1, 0x2000, TLV_DB_LINEAR_ITEM(-3913, 0), 244 0x2000, 0xffff, TLV_DB_LINEAR_ITEM(0, 903), 245 ); 246 247 static const struct snd_kcontrol_new zynqmp_dp_snd_controls[] = { 248 SOC_SINGLE_TLV("Input0 Playback Volume", 0, 249 0, 0xffff, 0, zynqmp_dp_tlv), 250 SOC_SINGLE_TLV("Input1 Playback Volume", 1, 251 0, 0xffff, 0, zynqmp_dp_tlv), 252 }; 253 254 /* 255 * Note: these read & write functions only support two "registers", 0 and 1, 256 * for volume 0 and 1. In other words, these are not real register read/write 257 * functions. 258 * 259 * This is done to support caching the volume value for the case where the 260 * hardware is not enabled, and also to support locking as volumes 0 and 1 261 * are in the same register. 262 */ 263 static unsigned int zynqmp_dp_dai_read(struct snd_soc_component *component, 264 unsigned int reg) 265 { 266 struct zynqmp_dpsub *dpsub = dev_get_drvdata(component->dev); 267 struct zynqmp_dpsub_audio *audio = dpsub->audio; 268 269 return audio->volumes[reg]; 270 } 271 272 static int zynqmp_dp_dai_write(struct snd_soc_component *component, 273 unsigned int reg, unsigned int val) 274 { 275 struct zynqmp_dpsub *dpsub = dev_get_drvdata(component->dev); 276 struct zynqmp_dpsub_audio *audio = dpsub->audio; 277 278 guard(mutex)(&audio->enable_lock); 279 280 audio->volumes[reg] = val; 281 282 if (audio->enabled_streams) 283 zynqmp_dp_audio_write(audio, ZYNQMP_DISP_AUD_MIXER_VOLUME, 284 audio->volumes[0] | 285 (audio->volumes[1] << 16)); 286 287 return 0; 288 } 289 290 static const struct snd_soc_component_driver zynqmp_dp_component_driver = { 291 .idle_bias_on = 1, 292 .use_pmdown_time = 1, 293 .endianness = 1, 294 .controls = zynqmp_dp_snd_controls, 295 .num_controls = ARRAY_SIZE(zynqmp_dp_snd_controls), 296 .read = zynqmp_dp_dai_read, 297 .write = zynqmp_dp_dai_write, 298 }; 299 300 int zynqmp_audio_init(struct zynqmp_dpsub *dpsub) 301 { 302 struct platform_device *pdev = to_platform_device(dpsub->dev); 303 struct device *dev = dpsub->dev; 304 struct zynqmp_dpsub_audio *audio; 305 struct snd_soc_card *card; 306 void *dev_data; 307 int ret; 308 309 if (!dpsub->aud_clk) 310 return 0; 311 312 audio = devm_kzalloc(dev, sizeof(*audio), GFP_KERNEL); 313 if (!audio) 314 return -ENOMEM; 315 316 dpsub->audio = audio; 317 318 mutex_init(&audio->enable_lock); 319 320 /* 0x2000 is the zero level, no change */ 321 audio->volumes[0] = 0x2000; 322 audio->volumes[1] = 0x2000; 323 324 audio->dai_name = devm_kasprintf(dev, GFP_KERNEL, 325 "%s-dai", dev_name(dev)); 326 327 for (unsigned int i = 0; i < ZYNQMP_NUM_PCMS; ++i) { 328 audio->link_names[i] = devm_kasprintf(dev, GFP_KERNEL, 329 "%s-dp-%u", dev_name(dev), i); 330 audio->pcm_names[i] = devm_kasprintf(dev, GFP_KERNEL, 331 "%s-pcm-%u", dev_name(dev), i); 332 } 333 334 audio->base = devm_platform_ioremap_resource_byname(pdev, "aud"); 335 if (IS_ERR(audio->base)) 336 return PTR_ERR(audio->base); 337 338 /* Create CPU DAI */ 339 340 audio->dai_driver = (struct snd_soc_dai_driver) { 341 .name = audio->dai_name, 342 .ops = &zynqmp_dp_dai_ops, 343 .playback = { 344 .channels_min = 2, 345 .channels_max = 2, 346 .rates = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000, 347 .formats = SNDRV_PCM_FMTBIT_S16_LE, 348 }, 349 }; 350 351 ret = devm_snd_soc_register_component(dev, &zynqmp_dp_component_driver, 352 &audio->dai_driver, 1); 353 if (ret) { 354 dev_err(dev, "Failed to register CPU DAI\n"); 355 return ret; 356 } 357 358 /* Create PCMs */ 359 360 for (unsigned int i = 0; i < ZYNQMP_NUM_PCMS; ++i) { 361 struct snd_dmaengine_pcm_config *pcm_config = 362 &audio->pcm_configs[i]; 363 364 *pcm_config = (struct snd_dmaengine_pcm_config){ 365 .name = audio->pcm_names[i], 366 .pcm_hardware = &zynqmp_dp_pcm_hw, 367 .prealloc_buffer_size = 64 * 1024, 368 .chan_names[SNDRV_PCM_STREAM_PLAYBACK] = 369 i == 0 ? "aud0" : "aud1", 370 }; 371 372 ret = devm_snd_dmaengine_pcm_register(dev, pcm_config, 0); 373 if (ret) { 374 dev_err(dev, "Failed to register PCM %u\n", i); 375 return ret; 376 } 377 } 378 379 /* Create card */ 380 381 card = &audio->card; 382 card->name = "DisplayPort"; 383 card->long_name = "DisplayPort Monitor"; 384 card->driver_name = "zynqmp_dpsub"; 385 card->dev = dev; 386 card->owner = THIS_MODULE; 387 card->num_links = ZYNQMP_NUM_PCMS; 388 card->dai_link = audio->links; 389 390 for (unsigned int i = 0; i < ZYNQMP_NUM_PCMS; ++i) { 391 struct snd_soc_dai_link *link = &card->dai_link[i]; 392 393 link->ops = &zynqmp_dp_ops; 394 395 link->name = audio->link_names[i]; 396 link->stream_name = audio->link_names[i]; 397 398 link->cpus = &audio->components[i].cpu; 399 link->num_cpus = 1; 400 link->cpus[0].dai_name = audio->dai_name; 401 402 link->codecs = &audio->components[i].codec; 403 link->num_codecs = 1; 404 link->codecs[0].name = "snd-soc-dummy"; 405 link->codecs[0].dai_name = "snd-soc-dummy-dai"; 406 407 link->platforms = &audio->components[i].platform; 408 link->num_platforms = 1; 409 link->platforms[0].name = audio->pcm_names[i]; 410 } 411 412 /* 413 * HACK: devm_snd_soc_register_card() overwrites current drvdata 414 * so we need to hack it back. 415 */ 416 dev_data = dev_get_drvdata(dev); 417 ret = devm_snd_soc_register_card(dev, card); 418 dev_set_drvdata(dev, dev_data); 419 if (ret) { 420 /* 421 * As older dtbs may not have the audio channel dmas defined, 422 * instead of returning an error here we'll continue and just 423 * mark the audio as disabled. 424 */ 425 dev_err(dev, "Failed to register sound card, disabling audio support\n"); 426 427 devm_kfree(dev, audio); 428 dpsub->audio = NULL; 429 430 return 0; 431 } 432 433 return 0; 434 } 435 436 void zynqmp_audio_uninit(struct zynqmp_dpsub *dpsub) 437 { 438 struct zynqmp_dpsub_audio *audio = dpsub->audio; 439 440 if (!audio) 441 return; 442 443 if (!dpsub->aud_clk) 444 return; 445 446 mutex_destroy(&audio->enable_lock); 447 } 448