1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2022 Intel Corporation 4 */ 5 6 #include "xe_wa.h" 7 8 #include "xe_platform_types.h" 9 #include "xe_gt_types.h" 10 #include "xe_rtp.h" 11 12 #include "gt/intel_gt_regs.h" 13 14 #undef _MMIO 15 #undef MCR_REG 16 #define _MMIO(x) _XE_RTP_REG(x) 17 #define MCR_REG(x) _XE_RTP_MCR_REG(x) 18 19 static const struct xe_rtp_entry gt_tunings[] = { 20 { XE_RTP_NAME("Tuning: 32B Access Enable"), 21 XE_RTP_RULES(PLATFORM(DG2)), 22 XE_RTP_SET(XEHP_SQCM, EN_32B_ACCESS) 23 }, 24 {} 25 }; 26 27 static const struct xe_rtp_entry context_tunings[] = { 28 { XE_RTP_NAME("1604555607"), 29 XE_RTP_RULES(GRAPHICS_VERSION(1200)), 30 XE_RTP_FIELD_SET_NO_READ_MASK(XEHP_FF_MODE2, FF_MODE2_TDS_TIMER_MASK, 31 FF_MODE2_TDS_TIMER_128) 32 }, 33 {} 34 }; 35 36 void xe_tuning_process_gt(struct xe_gt *gt) 37 { 38 xe_rtp_process(gt_tunings, >->reg_sr, gt, NULL); 39 } 40