1*5ea3f0dcSAnoop Vijay // SPDX-License-Identifier: MIT 2*5ea3f0dcSAnoop Vijay /* 3*5ea3f0dcSAnoop Vijay * Copyright © 2026 Intel Corporation 4*5ea3f0dcSAnoop Vijay */ 5*5ea3f0dcSAnoop Vijay 6*5ea3f0dcSAnoop Vijay #include <linux/device.h> 7*5ea3f0dcSAnoop Vijay #include <linux/mutex.h> 8*5ea3f0dcSAnoop Vijay 9*5ea3f0dcSAnoop Vijay #include <drm/drm_managed.h> 10*5ea3f0dcSAnoop Vijay 11*5ea3f0dcSAnoop Vijay #include "regs/xe_sysctrl_regs.h" 12*5ea3f0dcSAnoop Vijay #include "xe_device.h" 13*5ea3f0dcSAnoop Vijay #include "xe_mmio.h" 14*5ea3f0dcSAnoop Vijay #include "xe_soc_remapper.h" 15*5ea3f0dcSAnoop Vijay #include "xe_sysctrl.h" 16*5ea3f0dcSAnoop Vijay #include "xe_sysctrl_mailbox.h" 17*5ea3f0dcSAnoop Vijay #include "xe_sysctrl_types.h" 18*5ea3f0dcSAnoop Vijay 19*5ea3f0dcSAnoop Vijay /** 20*5ea3f0dcSAnoop Vijay * DOC: System Controller (sysctrl) 21*5ea3f0dcSAnoop Vijay * 22*5ea3f0dcSAnoop Vijay * System Controller (sysctrl) is a firmware-managed entity on Intel dGPUs 23*5ea3f0dcSAnoop Vijay * responsible for selected low-level platform management functions. 24*5ea3f0dcSAnoop Vijay * Communication between driver and System Controller is performed 25*5ea3f0dcSAnoop Vijay * via a mailbox interface, enabling command and response exchange. 26*5ea3f0dcSAnoop Vijay * 27*5ea3f0dcSAnoop Vijay * This module provides initialization and support code for interacting 28*5ea3f0dcSAnoop Vijay * with System Controller through the mailbox interface. 29*5ea3f0dcSAnoop Vijay */ 30*5ea3f0dcSAnoop Vijay static void sysctrl_fini(void *arg) 31*5ea3f0dcSAnoop Vijay { 32*5ea3f0dcSAnoop Vijay struct xe_device *xe = arg; 33*5ea3f0dcSAnoop Vijay 34*5ea3f0dcSAnoop Vijay xe->soc_remapper.set_sysctrl_region(xe, 0); 35*5ea3f0dcSAnoop Vijay } 36*5ea3f0dcSAnoop Vijay 37*5ea3f0dcSAnoop Vijay /** 38*5ea3f0dcSAnoop Vijay * xe_sysctrl_init() - Initialize System Controller subsystem 39*5ea3f0dcSAnoop Vijay * @xe: xe device instance 40*5ea3f0dcSAnoop Vijay * 41*5ea3f0dcSAnoop Vijay * Entry point for System Controller initialization, called from xe_device_probe. 42*5ea3f0dcSAnoop Vijay * This function checks platform support and initializes the system controller. 43*5ea3f0dcSAnoop Vijay * 44*5ea3f0dcSAnoop Vijay * Return: 0 on success, error code on failure 45*5ea3f0dcSAnoop Vijay */ 46*5ea3f0dcSAnoop Vijay int xe_sysctrl_init(struct xe_device *xe) 47*5ea3f0dcSAnoop Vijay { 48*5ea3f0dcSAnoop Vijay struct xe_tile *tile = xe_device_get_root_tile(xe); 49*5ea3f0dcSAnoop Vijay struct xe_sysctrl *sc = &xe->sc; 50*5ea3f0dcSAnoop Vijay int ret; 51*5ea3f0dcSAnoop Vijay 52*5ea3f0dcSAnoop Vijay if (!xe->info.has_soc_remapper_sysctrl) 53*5ea3f0dcSAnoop Vijay return 0; 54*5ea3f0dcSAnoop Vijay 55*5ea3f0dcSAnoop Vijay if (!xe->info.has_sysctrl) 56*5ea3f0dcSAnoop Vijay return 0; 57*5ea3f0dcSAnoop Vijay 58*5ea3f0dcSAnoop Vijay xe->soc_remapper.set_sysctrl_region(xe, SYSCTRL_MAILBOX_INDEX); 59*5ea3f0dcSAnoop Vijay 60*5ea3f0dcSAnoop Vijay ret = devm_add_action_or_reset(xe->drm.dev, sysctrl_fini, xe); 61*5ea3f0dcSAnoop Vijay if (ret) 62*5ea3f0dcSAnoop Vijay return ret; 63*5ea3f0dcSAnoop Vijay 64*5ea3f0dcSAnoop Vijay sc->mmio = devm_kzalloc(xe->drm.dev, sizeof(*sc->mmio), GFP_KERNEL); 65*5ea3f0dcSAnoop Vijay if (!sc->mmio) 66*5ea3f0dcSAnoop Vijay return -ENOMEM; 67*5ea3f0dcSAnoop Vijay 68*5ea3f0dcSAnoop Vijay xe_mmio_init(sc->mmio, tile, tile->mmio.regs, tile->mmio.regs_size); 69*5ea3f0dcSAnoop Vijay sc->mmio->adj_offset = SYSCTRL_BASE; 70*5ea3f0dcSAnoop Vijay sc->mmio->adj_limit = U32_MAX; 71*5ea3f0dcSAnoop Vijay 72*5ea3f0dcSAnoop Vijay ret = devm_mutex_init(xe->drm.dev, &sc->cmd_lock); 73*5ea3f0dcSAnoop Vijay if (ret) 74*5ea3f0dcSAnoop Vijay return ret; 75*5ea3f0dcSAnoop Vijay 76*5ea3f0dcSAnoop Vijay return 0; 77*5ea3f0dcSAnoop Vijay } 78