xref: /linux/drivers/gpu/drm/xe/xe_soc_remapper.c (revision c17ee635fd3a482b2ad2bf5e269755c2eae5f25e)
1a9f88c68SUmesh Nerlige Ramappa // SPDX-License-Identifier: MIT
2a9f88c68SUmesh Nerlige Ramappa /*
3a9f88c68SUmesh Nerlige Ramappa  * Copyright © 2025 Intel Corporation
4a9f88c68SUmesh Nerlige Ramappa  */
5a9f88c68SUmesh Nerlige Ramappa 
632eab46aSUmesh Nerlige Ramappa #include "regs/xe_soc_remapper_regs.h"
732eab46aSUmesh Nerlige Ramappa #include "xe_mmio.h"
8a9f88c68SUmesh Nerlige Ramappa #include "xe_soc_remapper.h"
9a9f88c68SUmesh Nerlige Ramappa 
1032eab46aSUmesh Nerlige Ramappa static void xe_soc_remapper_set_region(struct xe_device *xe, struct xe_reg reg,
1132eab46aSUmesh Nerlige Ramappa 				       u32 mask, u32 val)
1232eab46aSUmesh Nerlige Ramappa {
1332eab46aSUmesh Nerlige Ramappa 	guard(spinlock_irqsave)(&xe->soc_remapper.lock);
1432eab46aSUmesh Nerlige Ramappa 	xe_mmio_rmw32(xe_root_tile_mmio(xe), reg, mask, val);
1532eab46aSUmesh Nerlige Ramappa }
1632eab46aSUmesh Nerlige Ramappa 
1732eab46aSUmesh Nerlige Ramappa static void xe_soc_remapper_set_telem_region(struct xe_device *xe, u32 index)
1832eab46aSUmesh Nerlige Ramappa {
1932eab46aSUmesh Nerlige Ramappa 	xe_soc_remapper_set_region(xe, SG_REMAP_INDEX1, SG_REMAP_TELEM_MASK,
2032eab46aSUmesh Nerlige Ramappa 				   REG_FIELD_PREP(SG_REMAP_TELEM_MASK, index));
2132eab46aSUmesh Nerlige Ramappa }
2232eab46aSUmesh Nerlige Ramappa 
23*c3a613a0SUmesh Nerlige Ramappa static void xe_soc_remapper_set_sysctrl_region(struct xe_device *xe, u32 index)
24*c3a613a0SUmesh Nerlige Ramappa {
25*c3a613a0SUmesh Nerlige Ramappa 	xe_soc_remapper_set_region(xe, SG_REMAP_INDEX1, SG_REMAP_SYSCTRL_MASK,
26*c3a613a0SUmesh Nerlige Ramappa 				   REG_FIELD_PREP(SG_REMAP_SYSCTRL_MASK, index));
27*c3a613a0SUmesh Nerlige Ramappa }
28*c3a613a0SUmesh Nerlige Ramappa 
29a9f88c68SUmesh Nerlige Ramappa /**
30a9f88c68SUmesh Nerlige Ramappa  * xe_soc_remapper_init() - Initialize SoC remapper
31a9f88c68SUmesh Nerlige Ramappa  * @xe: Pointer to xe device.
32a9f88c68SUmesh Nerlige Ramappa  *
33a9f88c68SUmesh Nerlige Ramappa  * Initialize SoC remapper.
34a9f88c68SUmesh Nerlige Ramappa  *
35a9f88c68SUmesh Nerlige Ramappa  * Return: 0 on success, error code on failure
36a9f88c68SUmesh Nerlige Ramappa  */
37a9f88c68SUmesh Nerlige Ramappa int xe_soc_remapper_init(struct xe_device *xe)
38a9f88c68SUmesh Nerlige Ramappa {
39*c3a613a0SUmesh Nerlige Ramappa 	bool has_soc_remapper = xe->info.has_soc_remapper_telem ||
40*c3a613a0SUmesh Nerlige Ramappa 				xe->info.has_soc_remapper_sysctrl;
41*c3a613a0SUmesh Nerlige Ramappa 
42*c3a613a0SUmesh Nerlige Ramappa 	if (has_soc_remapper)
43a9f88c68SUmesh Nerlige Ramappa 		spin_lock_init(&xe->soc_remapper.lock);
44*c3a613a0SUmesh Nerlige Ramappa 
45*c3a613a0SUmesh Nerlige Ramappa 	if (xe->info.has_soc_remapper_telem)
4632eab46aSUmesh Nerlige Ramappa 		xe->soc_remapper.set_telem_region = xe_soc_remapper_set_telem_region;
47*c3a613a0SUmesh Nerlige Ramappa 
48*c3a613a0SUmesh Nerlige Ramappa 	if (xe->info.has_soc_remapper_sysctrl)
49*c3a613a0SUmesh Nerlige Ramappa 		xe->soc_remapper.set_sysctrl_region = xe_soc_remapper_set_sysctrl_region;
50a9f88c68SUmesh Nerlige Ramappa 
51a9f88c68SUmesh Nerlige Ramappa 	return 0;
52a9f88c68SUmesh Nerlige Ramappa }
53