1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2022 Intel Corporation 4 */ 5 6 #include "xe_query.h" 7 8 #include <linux/nospec.h> 9 #include <linux/sched/clock.h> 10 11 #include <drm/ttm/ttm_placement.h> 12 #include <generated/xe_wa_oob.h> 13 #include <uapi/drm/xe_drm.h> 14 15 #include "regs/xe_engine_regs.h" 16 #include "regs/xe_gt_regs.h" 17 #include "xe_bo.h" 18 #include "xe_device.h" 19 #include "xe_eu_stall.h" 20 #include "xe_exec_queue.h" 21 #include "xe_force_wake.h" 22 #include "xe_ggtt.h" 23 #include "xe_gt.h" 24 #include "xe_gt_topology.h" 25 #include "xe_guc_hwconfig.h" 26 #include "xe_macros.h" 27 #include "xe_mmio.h" 28 #include "xe_oa.h" 29 #include "xe_pxp.h" 30 #include "xe_ttm_vram_mgr.h" 31 #include "xe_vram_types.h" 32 #include "xe_wa.h" 33 34 static const u16 xe_to_user_engine_class[] = { 35 [XE_ENGINE_CLASS_RENDER] = DRM_XE_ENGINE_CLASS_RENDER, 36 [XE_ENGINE_CLASS_COPY] = DRM_XE_ENGINE_CLASS_COPY, 37 [XE_ENGINE_CLASS_VIDEO_DECODE] = DRM_XE_ENGINE_CLASS_VIDEO_DECODE, 38 [XE_ENGINE_CLASS_VIDEO_ENHANCE] = DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE, 39 [XE_ENGINE_CLASS_COMPUTE] = DRM_XE_ENGINE_CLASS_COMPUTE, 40 }; 41 42 static const enum xe_engine_class user_to_xe_engine_class[] = { 43 [DRM_XE_ENGINE_CLASS_RENDER] = XE_ENGINE_CLASS_RENDER, 44 [DRM_XE_ENGINE_CLASS_COPY] = XE_ENGINE_CLASS_COPY, 45 [DRM_XE_ENGINE_CLASS_VIDEO_DECODE] = XE_ENGINE_CLASS_VIDEO_DECODE, 46 [DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE] = XE_ENGINE_CLASS_VIDEO_ENHANCE, 47 [DRM_XE_ENGINE_CLASS_COMPUTE] = XE_ENGINE_CLASS_COMPUTE, 48 }; 49 50 static size_t calc_hw_engine_info_size(struct xe_device *xe) 51 { 52 struct xe_hw_engine *hwe; 53 enum xe_hw_engine_id id; 54 struct xe_gt *gt; 55 u8 gt_id; 56 int i = 0; 57 58 for_each_gt(gt, xe, gt_id) 59 for_each_hw_engine(hwe, gt, id) { 60 if (xe_hw_engine_is_reserved(hwe)) 61 continue; 62 i++; 63 } 64 65 return sizeof(struct drm_xe_query_engines) + 66 i * sizeof(struct drm_xe_engine); 67 } 68 69 typedef u64 (*__ktime_func_t)(void); 70 static __ktime_func_t __clock_id_to_func(clockid_t clk_id) 71 { 72 /* 73 * Use logic same as the perf subsystem to allow user to select the 74 * reference clock id to be used for timestamps. 75 */ 76 switch (clk_id) { 77 case CLOCK_MONOTONIC: 78 return &ktime_get_ns; 79 case CLOCK_MONOTONIC_RAW: 80 return &ktime_get_raw_ns; 81 case CLOCK_REALTIME: 82 return &ktime_get_real_ns; 83 case CLOCK_BOOTTIME: 84 return &ktime_get_boottime_ns; 85 case CLOCK_TAI: 86 return &ktime_get_clocktai_ns; 87 default: 88 return NULL; 89 } 90 } 91 92 static void 93 hwe_read_timestamp(struct xe_hw_engine *hwe, u64 *engine_ts, u64 *cpu_ts, 94 u64 *cpu_delta, __ktime_func_t cpu_clock) 95 { 96 struct xe_mmio *mmio = &hwe->gt->mmio; 97 u32 upper, lower, old_upper, loop = 0; 98 struct xe_reg upper_reg = RING_TIMESTAMP_UDW(hwe->mmio_base), 99 lower_reg = RING_TIMESTAMP(hwe->mmio_base); 100 101 upper = xe_mmio_read32(mmio, upper_reg); 102 do { 103 *cpu_delta = local_clock(); 104 *cpu_ts = cpu_clock(); 105 lower = xe_mmio_read32(mmio, lower_reg); 106 *cpu_delta = local_clock() - *cpu_delta; 107 old_upper = upper; 108 upper = xe_mmio_read32(mmio, upper_reg); 109 } while (upper != old_upper && loop++ < 2); 110 111 *engine_ts = (u64)upper << 32 | lower; 112 } 113 114 static int 115 query_engine_cycles(struct xe_device *xe, 116 struct drm_xe_device_query *query) 117 { 118 struct drm_xe_query_engine_cycles __user *query_ptr; 119 struct drm_xe_engine_class_instance *eci; 120 struct drm_xe_query_engine_cycles resp; 121 size_t size = sizeof(resp); 122 __ktime_func_t cpu_clock; 123 struct xe_hw_engine *hwe; 124 struct xe_gt *gt; 125 126 if (IS_SRIOV_VF(xe)) 127 return -EOPNOTSUPP; 128 129 if (query->size == 0) { 130 query->size = size; 131 return 0; 132 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 133 return -EINVAL; 134 } 135 136 query_ptr = u64_to_user_ptr(query->data); 137 if (copy_from_user(&resp, query_ptr, size)) 138 return -EFAULT; 139 140 cpu_clock = __clock_id_to_func(resp.clockid); 141 if (!cpu_clock) 142 return -EINVAL; 143 144 eci = &resp.eci; 145 gt = xe_device_get_gt(xe, eci->gt_id); 146 if (!gt) 147 return -EINVAL; 148 149 if (eci->engine_class >= ARRAY_SIZE(user_to_xe_engine_class)) 150 return -EINVAL; 151 152 hwe = xe_gt_hw_engine(gt, user_to_xe_engine_class[eci->engine_class], 153 eci->engine_instance, true); 154 if (!hwe) 155 return -EINVAL; 156 157 xe_with_force_wake(fw_ref, gt_to_fw(gt), XE_FORCEWAKE_ALL) { 158 if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FORCEWAKE_ALL)) 159 return -EIO; 160 161 hwe_read_timestamp(hwe, &resp.engine_cycles, &resp.cpu_timestamp, 162 &resp.cpu_delta, cpu_clock); 163 } 164 165 if (GRAPHICS_VER(xe) >= 20) 166 resp.width = 64; 167 else 168 resp.width = 36; 169 170 /* Only write to the output fields of user query */ 171 if (put_user(resp.cpu_timestamp, &query_ptr->cpu_timestamp) || 172 put_user(resp.cpu_delta, &query_ptr->cpu_delta) || 173 put_user(resp.engine_cycles, &query_ptr->engine_cycles) || 174 put_user(resp.width, &query_ptr->width)) 175 return -EFAULT; 176 177 return 0; 178 } 179 180 static int query_engines(struct xe_device *xe, 181 struct drm_xe_device_query *query) 182 { 183 size_t size = calc_hw_engine_info_size(xe); 184 struct drm_xe_query_engines __user *query_ptr = 185 u64_to_user_ptr(query->data); 186 struct drm_xe_query_engines *engines; 187 struct xe_hw_engine *hwe; 188 enum xe_hw_engine_id id; 189 struct xe_gt *gt; 190 u8 gt_id; 191 int i = 0; 192 193 if (query->size == 0) { 194 query->size = size; 195 return 0; 196 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 197 return -EINVAL; 198 } 199 200 engines = kzalloc(size, GFP_KERNEL); 201 if (!engines) 202 return -ENOMEM; 203 204 for_each_gt(gt, xe, gt_id) 205 for_each_hw_engine(hwe, gt, id) { 206 if (xe_hw_engine_is_reserved(hwe)) 207 continue; 208 209 engines->engines[i].instance.engine_class = 210 xe_to_user_engine_class[hwe->class]; 211 engines->engines[i].instance.engine_instance = 212 hwe->logical_instance; 213 engines->engines[i].instance.gt_id = gt->info.id; 214 215 i++; 216 } 217 218 engines->num_engines = i; 219 220 if (copy_to_user(query_ptr, engines, size)) { 221 kfree(engines); 222 return -EFAULT; 223 } 224 kfree(engines); 225 226 return 0; 227 } 228 229 static size_t calc_mem_regions_size(struct xe_device *xe) 230 { 231 u32 num_managers = 1; 232 int i; 233 234 if (xe_device_is_admin_only(xe)) 235 return sizeof(struct drm_xe_query_mem_regions); 236 237 for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i) 238 if (ttm_manager_type(&xe->ttm, i)) 239 num_managers++; 240 241 return offsetof(struct drm_xe_query_mem_regions, mem_regions[num_managers]); 242 } 243 244 static int query_mem_regions(struct xe_device *xe, 245 struct drm_xe_device_query *query) 246 { 247 size_t size = calc_mem_regions_size(xe); 248 struct drm_xe_query_mem_regions *mem_regions; 249 struct drm_xe_query_mem_regions __user *query_ptr = 250 u64_to_user_ptr(query->data); 251 struct ttm_resource_manager *man; 252 int ret, i; 253 254 if (query->size == 0) { 255 query->size = size; 256 return 0; 257 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 258 return -EINVAL; 259 } 260 261 mem_regions = kzalloc(size, GFP_KERNEL); 262 if (XE_IOCTL_DBG(xe, !mem_regions)) 263 return -ENOMEM; 264 265 if (xe_device_is_admin_only(xe)) 266 goto user_copy; 267 268 man = ttm_manager_type(&xe->ttm, XE_PL_TT); 269 mem_regions->mem_regions[0].mem_class = DRM_XE_MEM_REGION_CLASS_SYSMEM; 270 /* 271 * The instance needs to be a unique number that represents the index 272 * in the placement mask used at xe_gem_create_ioctl() for the 273 * xe_bo_create() placement. 274 */ 275 mem_regions->mem_regions[0].instance = 0; 276 mem_regions->mem_regions[0].min_page_size = PAGE_SIZE; 277 mem_regions->mem_regions[0].total_size = man->size << PAGE_SHIFT; 278 mem_regions->mem_regions[0].used = ttm_resource_manager_usage(man); 279 mem_regions->num_mem_regions = 1; 280 281 for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i) { 282 man = ttm_manager_type(&xe->ttm, i); 283 if (man) { 284 mem_regions->mem_regions[mem_regions->num_mem_regions].mem_class = 285 DRM_XE_MEM_REGION_CLASS_VRAM; 286 mem_regions->mem_regions[mem_regions->num_mem_regions].instance = 287 mem_regions->num_mem_regions; 288 mem_regions->mem_regions[mem_regions->num_mem_regions].min_page_size = 289 xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? 290 SZ_64K : PAGE_SIZE; 291 mem_regions->mem_regions[mem_regions->num_mem_regions].total_size = 292 man->size; 293 294 xe_ttm_vram_get_used(man, 295 &mem_regions->mem_regions 296 [mem_regions->num_mem_regions].used, 297 &mem_regions->mem_regions 298 [mem_regions->num_mem_regions].cpu_visible_used); 299 300 mem_regions->mem_regions[mem_regions->num_mem_regions].cpu_visible_size = 301 xe_ttm_vram_get_cpu_visible_size(man); 302 mem_regions->num_mem_regions++; 303 } 304 } 305 306 user_copy: 307 if (!copy_to_user(query_ptr, mem_regions, size)) 308 ret = 0; 309 else 310 ret = -ENOSPC; 311 312 kfree(mem_regions); 313 return ret; 314 } 315 316 static int query_config(struct xe_device *xe, struct drm_xe_device_query *query) 317 { 318 const u32 num_params = DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1; 319 size_t size = 320 sizeof(struct drm_xe_query_config) + num_params * sizeof(u64); 321 struct drm_xe_query_config __user *query_ptr = 322 u64_to_user_ptr(query->data); 323 struct drm_xe_query_config *config; 324 325 if (query->size == 0) { 326 query->size = size; 327 return 0; 328 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 329 return -EINVAL; 330 } 331 332 config = kzalloc(size, GFP_KERNEL); 333 if (!config) 334 return -ENOMEM; 335 336 config->num_params = num_params; 337 config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] = 338 xe->info.devid | (xe->info.revid << 16); 339 if (xe->mem.vram) 340 config->info[DRM_XE_QUERY_CONFIG_FLAGS] |= 341 DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM; 342 if (xe->info.has_usm && IS_ENABLED(CONFIG_DRM_XE_GPUSVM)) 343 config->info[DRM_XE_QUERY_CONFIG_FLAGS] |= 344 DRM_XE_QUERY_CONFIG_FLAG_HAS_CPU_ADDR_MIRROR; 345 if (GRAPHICS_VER(xe) >= 20) 346 config->info[DRM_XE_QUERY_CONFIG_FLAGS] |= 347 DRM_XE_QUERY_CONFIG_FLAG_HAS_NO_COMPRESSION_HINT; 348 config->info[DRM_XE_QUERY_CONFIG_FLAGS] |= 349 DRM_XE_QUERY_CONFIG_FLAG_HAS_LOW_LATENCY; 350 config->info[DRM_XE_QUERY_CONFIG_FLAGS] |= 351 DRM_XE_QUERY_CONFIG_FLAG_HAS_DISABLE_STATE_CACHE_PERF_FIX; 352 config->info[DRM_XE_QUERY_CONFIG_FLAGS] |= 353 DRM_XE_QUERY_CONFIG_FLAG_HAS_PURGING_SUPPORT; 354 config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] = 355 xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K; 356 config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits; 357 config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] = 358 xe_exec_queue_device_get_max_priority(xe); 359 360 if (copy_to_user(query_ptr, config, size)) { 361 kfree(config); 362 return -EFAULT; 363 } 364 kfree(config); 365 366 return 0; 367 } 368 369 static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query) 370 { 371 struct xe_gt *gt; 372 size_t size = sizeof(struct drm_xe_query_gt_list) + 373 xe->info.gt_count * sizeof(struct drm_xe_gt); 374 struct drm_xe_query_gt_list __user *query_ptr = 375 u64_to_user_ptr(query->data); 376 struct drm_xe_query_gt_list *gt_list; 377 int iter = 0; 378 u8 id; 379 380 if (query->size == 0) { 381 query->size = size; 382 return 0; 383 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 384 return -EINVAL; 385 } 386 387 gt_list = kzalloc(size, GFP_KERNEL); 388 if (!gt_list) 389 return -ENOMEM; 390 391 gt_list->num_gt = xe->info.gt_count; 392 393 for_each_gt(gt, xe, id) { 394 if (xe_gt_is_media_type(gt)) 395 gt_list->gt_list[iter].type = DRM_XE_QUERY_GT_TYPE_MEDIA; 396 else 397 gt_list->gt_list[iter].type = DRM_XE_QUERY_GT_TYPE_MAIN; 398 gt_list->gt_list[iter].tile_id = gt_to_tile(gt)->id; 399 gt_list->gt_list[iter].gt_id = gt->info.id; 400 gt_list->gt_list[iter].reference_clock = gt->info.reference_clock; 401 /* 402 * The mem_regions indexes in the mask below need to 403 * directly identify the struct 404 * drm_xe_query_mem_regions' instance constructed at 405 * query_mem_regions() 406 * 407 * For our current platforms: 408 * Bit 0 -> System Memory 409 * Bit 1 -> VRAM0 on Tile0 410 * Bit 2 -> VRAM1 on Tile1 411 * However the uAPI is generic and it's userspace's 412 * responsibility to check the mem_class, without any 413 * assumption. 414 */ 415 if (!IS_DGFX(xe)) 416 gt_list->gt_list[iter].near_mem_regions = 0x1; 417 else 418 gt_list->gt_list[iter].near_mem_regions = 419 BIT(gt_to_tile(gt)->mem.vram->id) << 1; 420 gt_list->gt_list[iter].far_mem_regions = xe->info.mem_region_mask ^ 421 gt_list->gt_list[iter].near_mem_regions; 422 423 gt_list->gt_list[iter].ip_ver_major = 424 REG_FIELD_GET(GMD_ID_ARCH_MASK, gt->info.gmdid); 425 gt_list->gt_list[iter].ip_ver_minor = 426 REG_FIELD_GET(GMD_ID_RELEASE_MASK, gt->info.gmdid); 427 gt_list->gt_list[iter].ip_ver_rev = 428 REG_FIELD_GET(GMD_ID_REVID, gt->info.gmdid); 429 430 iter++; 431 } 432 433 if (copy_to_user(query_ptr, gt_list, size)) { 434 kfree(gt_list); 435 return -EFAULT; 436 } 437 kfree(gt_list); 438 439 return 0; 440 } 441 442 static int query_hwconfig(struct xe_device *xe, 443 struct drm_xe_device_query *query) 444 { 445 struct xe_gt *gt = xe_root_mmio_gt(xe); 446 size_t size = gt ? xe_guc_hwconfig_size(>->uc.guc) : 0; 447 void __user *query_ptr = u64_to_user_ptr(query->data); 448 void *hwconfig; 449 450 if (query->size == 0) { 451 query->size = size; 452 return 0; 453 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 454 return -EINVAL; 455 } 456 457 hwconfig = kzalloc(size, GFP_KERNEL); 458 if (!hwconfig) 459 return -ENOMEM; 460 461 xe_guc_hwconfig_copy(>->uc.guc, hwconfig); 462 463 if (copy_to_user(query_ptr, hwconfig, size)) { 464 kfree(hwconfig); 465 return -EFAULT; 466 } 467 kfree(hwconfig); 468 469 return 0; 470 } 471 472 static size_t calc_topo_query_size(struct xe_device *xe) 473 { 474 struct xe_gt *gt; 475 size_t query_size = 0; 476 int id; 477 478 for_each_gt(gt, xe, id) { 479 query_size += 3 * sizeof(struct drm_xe_query_topology_mask) + 480 sizeof_field(struct xe_gt, fuse_topo.g_dss_mask) + 481 sizeof_field(struct xe_gt, fuse_topo.c_dss_mask) + 482 sizeof_field(struct xe_gt, fuse_topo.eu_mask_per_dss); 483 484 /* L3bank mask may not be available for some GTs */ 485 if (xe_gt_topology_report_l3(gt)) 486 query_size += sizeof(struct drm_xe_query_topology_mask) + 487 sizeof_field(struct xe_gt, fuse_topo.l3_bank_mask); 488 } 489 490 return query_size; 491 } 492 493 static int copy_mask(void __user **ptr, 494 struct drm_xe_query_topology_mask *topo, 495 void *mask, size_t mask_size) 496 { 497 topo->num_bytes = mask_size; 498 499 if (copy_to_user(*ptr, topo, sizeof(*topo))) 500 return -EFAULT; 501 *ptr += sizeof(*topo); 502 503 if (copy_to_user(*ptr, mask, mask_size)) 504 return -EFAULT; 505 *ptr += mask_size; 506 507 return 0; 508 } 509 510 static int query_gt_topology(struct xe_device *xe, 511 struct drm_xe_device_query *query) 512 { 513 void __user *query_ptr = u64_to_user_ptr(query->data); 514 size_t size = calc_topo_query_size(xe); 515 struct drm_xe_query_topology_mask topo; 516 struct xe_gt *gt; 517 int id; 518 519 if (query->size == 0) { 520 query->size = size; 521 return 0; 522 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 523 return -EINVAL; 524 } 525 526 for_each_gt(gt, xe, id) { 527 int err; 528 529 topo.gt_id = id; 530 531 topo.type = DRM_XE_TOPO_DSS_GEOMETRY; 532 err = copy_mask(&query_ptr, &topo, gt->fuse_topo.g_dss_mask, 533 sizeof(gt->fuse_topo.g_dss_mask)); 534 if (err) 535 return err; 536 537 topo.type = DRM_XE_TOPO_DSS_COMPUTE; 538 err = copy_mask(&query_ptr, &topo, gt->fuse_topo.c_dss_mask, 539 sizeof(gt->fuse_topo.c_dss_mask)); 540 if (err) 541 return err; 542 543 /* 544 * If the kernel doesn't have a way to obtain a correct L3bank 545 * mask, then it's better to omit L3 from the query rather than 546 * reporting bogus or zeroed information to userspace. 547 */ 548 if (xe_gt_topology_report_l3(gt)) { 549 topo.type = DRM_XE_TOPO_L3_BANK; 550 err = copy_mask(&query_ptr, &topo, gt->fuse_topo.l3_bank_mask, 551 sizeof(gt->fuse_topo.l3_bank_mask)); 552 if (err) 553 return err; 554 } 555 556 topo.type = gt->fuse_topo.eu_type == XE_GT_EU_TYPE_SIMD16 ? 557 DRM_XE_TOPO_SIMD16_EU_PER_DSS : 558 DRM_XE_TOPO_EU_PER_DSS; 559 err = copy_mask(&query_ptr, &topo, 560 gt->fuse_topo.eu_mask_per_dss, 561 sizeof(gt->fuse_topo.eu_mask_per_dss)); 562 if (err) 563 return err; 564 } 565 566 return 0; 567 } 568 569 static int 570 query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query) 571 { 572 struct drm_xe_query_uc_fw_version __user *query_ptr = u64_to_user_ptr(query->data); 573 size_t size = sizeof(struct drm_xe_query_uc_fw_version); 574 struct drm_xe_query_uc_fw_version resp; 575 struct xe_uc_fw_version *version = NULL; 576 577 if (query->size == 0) { 578 query->size = size; 579 return 0; 580 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 581 return -EINVAL; 582 } 583 584 if (copy_from_user(&resp, query_ptr, size)) 585 return -EFAULT; 586 587 if (XE_IOCTL_DBG(xe, resp.pad || resp.pad2 || resp.reserved)) 588 return -EINVAL; 589 590 switch (resp.uc_type) { 591 case XE_QUERY_UC_TYPE_GUC_SUBMISSION: { 592 struct xe_guc *guc = &xe->tiles[0].primary_gt->uc.guc; 593 594 version = &guc->fw.versions.found[XE_UC_FW_VER_COMPATIBILITY]; 595 break; 596 } 597 case XE_QUERY_UC_TYPE_HUC: { 598 struct xe_gt *media_gt = NULL; 599 struct xe_huc *huc; 600 601 if (MEDIA_VER(xe) >= 13) { 602 struct xe_tile *tile; 603 u8 gt_id; 604 605 for_each_tile(tile, xe, gt_id) { 606 if (tile->media_gt) { 607 media_gt = tile->media_gt; 608 break; 609 } 610 } 611 } else { 612 media_gt = xe->tiles[0].primary_gt; 613 } 614 615 if (!media_gt) 616 break; 617 618 huc = &media_gt->uc.huc; 619 if (huc->fw.status == XE_UC_FIRMWARE_RUNNING) 620 version = &huc->fw.versions.found[XE_UC_FW_VER_RELEASE]; 621 break; 622 } 623 default: 624 return -EINVAL; 625 } 626 627 if (version) { 628 resp.branch_ver = 0; 629 resp.major_ver = version->major; 630 resp.minor_ver = version->minor; 631 resp.patch_ver = version->patch; 632 } else { 633 return -ENODEV; 634 } 635 636 if (copy_to_user(query_ptr, &resp, size)) 637 return -EFAULT; 638 639 return 0; 640 } 641 642 static size_t calc_oa_unit_query_size(struct xe_device *xe) 643 { 644 size_t size = sizeof(struct drm_xe_query_oa_units); 645 struct xe_gt *gt; 646 int i, id; 647 648 for_each_gt(gt, xe, id) { 649 for (i = 0; i < gt->oa.num_oa_units; i++) { 650 size += sizeof(struct drm_xe_oa_unit); 651 size += gt->oa.oa_unit[i].num_engines * 652 sizeof(struct drm_xe_engine_class_instance); 653 } 654 } 655 656 return size; 657 } 658 659 static int query_oa_units(struct xe_device *xe, 660 struct drm_xe_device_query *query) 661 { 662 void __user *query_ptr = u64_to_user_ptr(query->data); 663 size_t size = calc_oa_unit_query_size(xe); 664 struct drm_xe_query_oa_units *qoa; 665 enum xe_hw_engine_id hwe_id; 666 struct drm_xe_oa_unit *du; 667 struct xe_hw_engine *hwe; 668 struct xe_oa_unit *u; 669 int gt_id, i, j, ret; 670 struct xe_gt *gt; 671 u8 *pdu; 672 673 if (query->size == 0) { 674 query->size = size; 675 return 0; 676 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 677 return -EINVAL; 678 } 679 680 qoa = kzalloc(size, GFP_KERNEL); 681 if (!qoa) 682 return -ENOMEM; 683 684 pdu = (u8 *)&qoa->oa_units[0]; 685 for_each_gt(gt, xe, gt_id) { 686 for (i = 0; i < gt->oa.num_oa_units; i++) { 687 u = >->oa.oa_unit[i]; 688 du = (struct drm_xe_oa_unit *)pdu; 689 690 du->oa_unit_id = u->oa_unit_id; 691 du->oa_unit_type = u->type; 692 du->oa_timestamp_freq = xe_oa_timestamp_frequency(gt); 693 du->capabilities = DRM_XE_OA_CAPS_BASE | DRM_XE_OA_CAPS_SYNCS | 694 DRM_XE_OA_CAPS_OA_BUFFER_SIZE | 695 DRM_XE_OA_CAPS_WAIT_NUM_REPORTS | 696 DRM_XE_OA_CAPS_OAM | 697 DRM_XE_OA_CAPS_OA_UNIT_GT_ID; 698 du->gt_id = u->gt->info.id; 699 j = 0; 700 for_each_hw_engine(hwe, gt, hwe_id) { 701 if (!xe_hw_engine_is_reserved(hwe) && 702 xe_oa_unit_id(hwe) == u->oa_unit_id) { 703 du->eci[j].engine_class = 704 xe_to_user_engine_class[hwe->class]; 705 du->eci[j].engine_instance = hwe->logical_instance; 706 du->eci[j].gt_id = gt->info.id; 707 j++; 708 } 709 } 710 du->num_engines = j; 711 pdu += sizeof(*du) + j * sizeof(du->eci[0]); 712 qoa->num_oa_units++; 713 } 714 } 715 716 ret = copy_to_user(query_ptr, qoa, size); 717 kfree(qoa); 718 719 return ret ? -EFAULT : 0; 720 } 721 722 static int query_pxp_status(struct xe_device *xe, struct drm_xe_device_query *query) 723 { 724 struct drm_xe_query_pxp_status __user *query_ptr = u64_to_user_ptr(query->data); 725 size_t size = sizeof(struct drm_xe_query_pxp_status); 726 struct drm_xe_query_pxp_status resp = { 0 }; 727 int ret; 728 729 if (query->size == 0) { 730 query->size = size; 731 return 0; 732 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 733 return -EINVAL; 734 } 735 736 ret = xe_pxp_get_readiness_status(xe->pxp); 737 if (ret < 0) 738 return ret; 739 740 resp.status = ret; 741 resp.supported_session_types = BIT(DRM_XE_PXP_TYPE_HWDRM); 742 743 if (copy_to_user(query_ptr, &resp, size)) 744 return -EFAULT; 745 746 return 0; 747 } 748 749 static int query_eu_stall(struct xe_device *xe, 750 struct drm_xe_device_query *query) 751 { 752 void __user *query_ptr = u64_to_user_ptr(query->data); 753 struct drm_xe_query_eu_stall *info; 754 size_t size, array_size; 755 const u64 *rates; 756 u32 num_rates; 757 int ret; 758 759 if (!xe_eu_stall_supported_on_platform(xe)) 760 return -ENODEV; 761 762 array_size = xe_eu_stall_get_sampling_rates(&num_rates, &rates); 763 size = sizeof(struct drm_xe_query_eu_stall) + array_size; 764 765 if (query->size == 0) { 766 query->size = size; 767 return 0; 768 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 769 return -EINVAL; 770 } 771 772 info = kzalloc(size, GFP_KERNEL); 773 if (!info) 774 return -ENOMEM; 775 776 info->num_sampling_rates = num_rates; 777 info->capabilities = DRM_XE_EU_STALL_CAPS_BASE; 778 info->record_size = xe_eu_stall_data_record_size(xe); 779 info->per_xecore_buf_size = xe_eu_stall_get_per_xecore_buf_size(); 780 memcpy(info->sampling_rates, rates, array_size); 781 782 ret = copy_to_user(query_ptr, info, size); 783 kfree(info); 784 785 return ret ? -EFAULT : 0; 786 } 787 788 static int (* const xe_query_funcs[])(struct xe_device *xe, 789 struct drm_xe_device_query *query) = { 790 query_engines, 791 query_mem_regions, 792 query_config, 793 query_gt_list, 794 query_hwconfig, 795 query_gt_topology, 796 query_engine_cycles, 797 query_uc_fw_version, 798 query_oa_units, 799 query_pxp_status, 800 query_eu_stall, 801 }; 802 803 int xe_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file) 804 { 805 struct xe_device *xe = to_xe_device(dev); 806 struct drm_xe_device_query *query = data; 807 u32 idx; 808 809 if (XE_IOCTL_DBG(xe, query->extensions) || 810 XE_IOCTL_DBG(xe, query->reserved[0] || query->reserved[1])) 811 return -EINVAL; 812 813 if (XE_IOCTL_DBG(xe, query->query >= ARRAY_SIZE(xe_query_funcs))) 814 return -EINVAL; 815 816 idx = array_index_nospec(query->query, ARRAY_SIZE(xe_query_funcs)); 817 if (XE_IOCTL_DBG(xe, !xe_query_funcs[idx])) 818 return -EINVAL; 819 820 return xe_query_funcs[idx](xe, query); 821 } 822