1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2022 Intel Corporation 4 */ 5 6 #include "xe_query.h" 7 8 #include <linux/nospec.h> 9 #include <linux/sched/clock.h> 10 11 #include <drm/ttm/ttm_placement.h> 12 #include <drm/xe_drm.h> 13 14 #include "regs/xe_engine_regs.h" 15 #include "xe_bo.h" 16 #include "xe_device.h" 17 #include "xe_exec_queue.h" 18 #include "xe_ggtt.h" 19 #include "xe_gt.h" 20 #include "xe_guc_hwconfig.h" 21 #include "xe_macros.h" 22 #include "xe_mmio.h" 23 #include "xe_ttm_vram_mgr.h" 24 25 static const u16 xe_to_user_engine_class[] = { 26 [XE_ENGINE_CLASS_RENDER] = DRM_XE_ENGINE_CLASS_RENDER, 27 [XE_ENGINE_CLASS_COPY] = DRM_XE_ENGINE_CLASS_COPY, 28 [XE_ENGINE_CLASS_VIDEO_DECODE] = DRM_XE_ENGINE_CLASS_VIDEO_DECODE, 29 [XE_ENGINE_CLASS_VIDEO_ENHANCE] = DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE, 30 [XE_ENGINE_CLASS_COMPUTE] = DRM_XE_ENGINE_CLASS_COMPUTE, 31 }; 32 33 static const enum xe_engine_class user_to_xe_engine_class[] = { 34 [DRM_XE_ENGINE_CLASS_RENDER] = XE_ENGINE_CLASS_RENDER, 35 [DRM_XE_ENGINE_CLASS_COPY] = XE_ENGINE_CLASS_COPY, 36 [DRM_XE_ENGINE_CLASS_VIDEO_DECODE] = XE_ENGINE_CLASS_VIDEO_DECODE, 37 [DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE] = XE_ENGINE_CLASS_VIDEO_ENHANCE, 38 [DRM_XE_ENGINE_CLASS_COMPUTE] = XE_ENGINE_CLASS_COMPUTE, 39 }; 40 41 static size_t calc_hw_engine_info_size(struct xe_device *xe) 42 { 43 struct xe_hw_engine *hwe; 44 enum xe_hw_engine_id id; 45 struct xe_gt *gt; 46 u8 gt_id; 47 int i = 0; 48 49 for_each_gt(gt, xe, gt_id) 50 for_each_hw_engine(hwe, gt, id) { 51 if (xe_hw_engine_is_reserved(hwe)) 52 continue; 53 i++; 54 } 55 56 return sizeof(struct drm_xe_query_engines) + 57 i * sizeof(struct drm_xe_engine); 58 } 59 60 typedef u64 (*__ktime_func_t)(void); 61 static __ktime_func_t __clock_id_to_func(clockid_t clk_id) 62 { 63 /* 64 * Use logic same as the perf subsystem to allow user to select the 65 * reference clock id to be used for timestamps. 66 */ 67 switch (clk_id) { 68 case CLOCK_MONOTONIC: 69 return &ktime_get_ns; 70 case CLOCK_MONOTONIC_RAW: 71 return &ktime_get_raw_ns; 72 case CLOCK_REALTIME: 73 return &ktime_get_real_ns; 74 case CLOCK_BOOTTIME: 75 return &ktime_get_boottime_ns; 76 case CLOCK_TAI: 77 return &ktime_get_clocktai_ns; 78 default: 79 return NULL; 80 } 81 } 82 83 static void 84 __read_timestamps(struct xe_gt *gt, 85 struct xe_reg lower_reg, 86 struct xe_reg upper_reg, 87 u64 *engine_ts, 88 u64 *cpu_ts, 89 u64 *cpu_delta, 90 __ktime_func_t cpu_clock) 91 { 92 u32 upper, lower, old_upper, loop = 0; 93 94 upper = xe_mmio_read32(gt, upper_reg); 95 do { 96 *cpu_delta = local_clock(); 97 *cpu_ts = cpu_clock(); 98 lower = xe_mmio_read32(gt, lower_reg); 99 *cpu_delta = local_clock() - *cpu_delta; 100 old_upper = upper; 101 upper = xe_mmio_read32(gt, upper_reg); 102 } while (upper != old_upper && loop++ < 2); 103 104 *engine_ts = (u64)upper << 32 | lower; 105 } 106 107 static int 108 query_engine_cycles(struct xe_device *xe, 109 struct drm_xe_device_query *query) 110 { 111 struct drm_xe_query_engine_cycles __user *query_ptr; 112 struct drm_xe_engine_class_instance *eci; 113 struct drm_xe_query_engine_cycles resp; 114 size_t size = sizeof(resp); 115 __ktime_func_t cpu_clock; 116 struct xe_hw_engine *hwe; 117 struct xe_gt *gt; 118 119 if (query->size == 0) { 120 query->size = size; 121 return 0; 122 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 123 return -EINVAL; 124 } 125 126 query_ptr = u64_to_user_ptr(query->data); 127 if (copy_from_user(&resp, query_ptr, size)) 128 return -EFAULT; 129 130 cpu_clock = __clock_id_to_func(resp.clockid); 131 if (!cpu_clock) 132 return -EINVAL; 133 134 eci = &resp.eci; 135 if (eci->gt_id > XE_MAX_GT_PER_TILE) 136 return -EINVAL; 137 138 gt = xe_device_get_gt(xe, eci->gt_id); 139 if (!gt) 140 return -EINVAL; 141 142 if (eci->engine_class >= ARRAY_SIZE(user_to_xe_engine_class)) 143 return -EINVAL; 144 145 hwe = xe_gt_hw_engine(gt, user_to_xe_engine_class[eci->engine_class], 146 eci->engine_instance, true); 147 if (!hwe) 148 return -EINVAL; 149 150 xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL); 151 152 __read_timestamps(gt, 153 RING_TIMESTAMP(hwe->mmio_base), 154 RING_TIMESTAMP_UDW(hwe->mmio_base), 155 &resp.engine_cycles, 156 &resp.cpu_timestamp, 157 &resp.cpu_delta, 158 cpu_clock); 159 160 xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL); 161 resp.width = 36; 162 163 /* Only write to the output fields of user query */ 164 if (put_user(resp.cpu_timestamp, &query_ptr->cpu_timestamp)) 165 return -EFAULT; 166 167 if (put_user(resp.cpu_delta, &query_ptr->cpu_delta)) 168 return -EFAULT; 169 170 if (put_user(resp.engine_cycles, &query_ptr->engine_cycles)) 171 return -EFAULT; 172 173 if (put_user(resp.width, &query_ptr->width)) 174 return -EFAULT; 175 176 return 0; 177 } 178 179 static int query_engines(struct xe_device *xe, 180 struct drm_xe_device_query *query) 181 { 182 size_t size = calc_hw_engine_info_size(xe); 183 struct drm_xe_query_engines __user *query_ptr = 184 u64_to_user_ptr(query->data); 185 struct drm_xe_query_engines *engines; 186 struct xe_hw_engine *hwe; 187 enum xe_hw_engine_id id; 188 struct xe_gt *gt; 189 u8 gt_id; 190 int i = 0; 191 192 if (query->size == 0) { 193 query->size = size; 194 return 0; 195 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 196 return -EINVAL; 197 } 198 199 engines = kzalloc(size, GFP_KERNEL); 200 if (!engines) 201 return -ENOMEM; 202 203 for_each_gt(gt, xe, gt_id) 204 for_each_hw_engine(hwe, gt, id) { 205 if (xe_hw_engine_is_reserved(hwe)) 206 continue; 207 208 engines->engines[i].instance.engine_class = 209 xe_to_user_engine_class[hwe->class]; 210 engines->engines[i].instance.engine_instance = 211 hwe->logical_instance; 212 engines->engines[i].instance.gt_id = gt->info.id; 213 214 i++; 215 } 216 217 engines->num_engines = i; 218 219 if (copy_to_user(query_ptr, engines, size)) { 220 kfree(engines); 221 return -EFAULT; 222 } 223 kfree(engines); 224 225 return 0; 226 } 227 228 static size_t calc_mem_regions_size(struct xe_device *xe) 229 { 230 u32 num_managers = 1; 231 int i; 232 233 for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i) 234 if (ttm_manager_type(&xe->ttm, i)) 235 num_managers++; 236 237 return offsetof(struct drm_xe_query_mem_regions, mem_regions[num_managers]); 238 } 239 240 static int query_mem_regions(struct xe_device *xe, 241 struct drm_xe_device_query *query) 242 { 243 size_t size = calc_mem_regions_size(xe); 244 struct drm_xe_query_mem_regions *mem_regions; 245 struct drm_xe_query_mem_regions __user *query_ptr = 246 u64_to_user_ptr(query->data); 247 struct ttm_resource_manager *man; 248 int ret, i; 249 250 if (query->size == 0) { 251 query->size = size; 252 return 0; 253 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 254 return -EINVAL; 255 } 256 257 mem_regions = kzalloc(size, GFP_KERNEL); 258 if (XE_IOCTL_DBG(xe, !mem_regions)) 259 return -ENOMEM; 260 261 man = ttm_manager_type(&xe->ttm, XE_PL_TT); 262 mem_regions->mem_regions[0].mem_class = DRM_XE_MEM_REGION_CLASS_SYSMEM; 263 /* 264 * The instance needs to be a unique number that represents the index 265 * in the placement mask used at xe_gem_create_ioctl() for the 266 * xe_bo_create() placement. 267 */ 268 mem_regions->mem_regions[0].instance = 0; 269 mem_regions->mem_regions[0].min_page_size = PAGE_SIZE; 270 mem_regions->mem_regions[0].total_size = man->size << PAGE_SHIFT; 271 if (perfmon_capable()) 272 mem_regions->mem_regions[0].used = ttm_resource_manager_usage(man); 273 mem_regions->num_mem_regions = 1; 274 275 for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i) { 276 man = ttm_manager_type(&xe->ttm, i); 277 if (man) { 278 mem_regions->mem_regions[mem_regions->num_mem_regions].mem_class = 279 DRM_XE_MEM_REGION_CLASS_VRAM; 280 mem_regions->mem_regions[mem_regions->num_mem_regions].instance = 281 mem_regions->num_mem_regions; 282 mem_regions->mem_regions[mem_regions->num_mem_regions].min_page_size = 283 xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? 284 SZ_64K : PAGE_SIZE; 285 mem_regions->mem_regions[mem_regions->num_mem_regions].total_size = 286 man->size; 287 288 if (perfmon_capable()) { 289 xe_ttm_vram_get_used(man, 290 &mem_regions->mem_regions 291 [mem_regions->num_mem_regions].used, 292 &mem_regions->mem_regions 293 [mem_regions->num_mem_regions].cpu_visible_used); 294 } 295 296 mem_regions->mem_regions[mem_regions->num_mem_regions].cpu_visible_size = 297 xe_ttm_vram_get_cpu_visible_size(man); 298 mem_regions->num_mem_regions++; 299 } 300 } 301 302 if (!copy_to_user(query_ptr, mem_regions, size)) 303 ret = 0; 304 else 305 ret = -ENOSPC; 306 307 kfree(mem_regions); 308 return ret; 309 } 310 311 static int query_config(struct xe_device *xe, struct drm_xe_device_query *query) 312 { 313 const u32 num_params = DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1; 314 size_t size = 315 sizeof(struct drm_xe_query_config) + num_params * sizeof(u64); 316 struct drm_xe_query_config __user *query_ptr = 317 u64_to_user_ptr(query->data); 318 struct drm_xe_query_config *config; 319 320 if (query->size == 0) { 321 query->size = size; 322 return 0; 323 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 324 return -EINVAL; 325 } 326 327 config = kzalloc(size, GFP_KERNEL); 328 if (!config) 329 return -ENOMEM; 330 331 config->num_params = num_params; 332 config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] = 333 xe->info.devid | (xe->info.revid << 16); 334 if (xe_device_get_root_tile(xe)->mem.vram.usable_size) 335 config->info[DRM_XE_QUERY_CONFIG_FLAGS] = 336 DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM; 337 config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] = 338 xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K; 339 config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits; 340 config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] = 341 xe_exec_queue_device_get_max_priority(xe); 342 343 if (copy_to_user(query_ptr, config, size)) { 344 kfree(config); 345 return -EFAULT; 346 } 347 kfree(config); 348 349 return 0; 350 } 351 352 static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query) 353 { 354 struct xe_gt *gt; 355 size_t size = sizeof(struct drm_xe_query_gt_list) + 356 xe->info.gt_count * sizeof(struct drm_xe_gt); 357 struct drm_xe_query_gt_list __user *query_ptr = 358 u64_to_user_ptr(query->data); 359 struct drm_xe_query_gt_list *gt_list; 360 u8 id; 361 362 if (query->size == 0) { 363 query->size = size; 364 return 0; 365 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 366 return -EINVAL; 367 } 368 369 gt_list = kzalloc(size, GFP_KERNEL); 370 if (!gt_list) 371 return -ENOMEM; 372 373 gt_list->num_gt = xe->info.gt_count; 374 375 for_each_gt(gt, xe, id) { 376 if (xe_gt_is_media_type(gt)) 377 gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MEDIA; 378 else 379 gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN; 380 gt_list->gt_list[id].tile_id = gt_to_tile(gt)->id; 381 gt_list->gt_list[id].gt_id = gt->info.id; 382 gt_list->gt_list[id].reference_clock = gt->info.reference_clock; 383 /* 384 * The mem_regions indexes in the mask below need to 385 * directly identify the struct 386 * drm_xe_query_mem_regions' instance constructed at 387 * query_mem_regions() 388 * 389 * For our current platforms: 390 * Bit 0 -> System Memory 391 * Bit 1 -> VRAM0 on Tile0 392 * Bit 2 -> VRAM1 on Tile1 393 * However the uAPI is generic and it's userspace's 394 * responsibility to check the mem_class, without any 395 * assumption. 396 */ 397 if (!IS_DGFX(xe)) 398 gt_list->gt_list[id].near_mem_regions = 0x1; 399 else 400 gt_list->gt_list[id].near_mem_regions = 401 BIT(gt_to_tile(gt)->id) << 1; 402 gt_list->gt_list[id].far_mem_regions = xe->info.mem_region_mask ^ 403 gt_list->gt_list[id].near_mem_regions; 404 } 405 406 if (copy_to_user(query_ptr, gt_list, size)) { 407 kfree(gt_list); 408 return -EFAULT; 409 } 410 kfree(gt_list); 411 412 return 0; 413 } 414 415 static int query_hwconfig(struct xe_device *xe, 416 struct drm_xe_device_query *query) 417 { 418 struct xe_gt *gt = xe_root_mmio_gt(xe); 419 size_t size = xe_guc_hwconfig_size(>->uc.guc); 420 void __user *query_ptr = u64_to_user_ptr(query->data); 421 void *hwconfig; 422 423 if (query->size == 0) { 424 query->size = size; 425 return 0; 426 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 427 return -EINVAL; 428 } 429 430 hwconfig = kzalloc(size, GFP_KERNEL); 431 if (!hwconfig) 432 return -ENOMEM; 433 434 xe_guc_hwconfig_copy(>->uc.guc, hwconfig); 435 436 if (copy_to_user(query_ptr, hwconfig, size)) { 437 kfree(hwconfig); 438 return -EFAULT; 439 } 440 kfree(hwconfig); 441 442 return 0; 443 } 444 445 static size_t calc_topo_query_size(struct xe_device *xe) 446 { 447 return xe->info.gt_count * 448 (3 * sizeof(struct drm_xe_query_topology_mask) + 449 sizeof_field(struct xe_gt, fuse_topo.g_dss_mask) + 450 sizeof_field(struct xe_gt, fuse_topo.c_dss_mask) + 451 sizeof_field(struct xe_gt, fuse_topo.eu_mask_per_dss)); 452 } 453 454 static int copy_mask(void __user **ptr, 455 struct drm_xe_query_topology_mask *topo, 456 void *mask, size_t mask_size) 457 { 458 topo->num_bytes = mask_size; 459 460 if (copy_to_user(*ptr, topo, sizeof(*topo))) 461 return -EFAULT; 462 *ptr += sizeof(topo); 463 464 if (copy_to_user(*ptr, mask, mask_size)) 465 return -EFAULT; 466 *ptr += mask_size; 467 468 return 0; 469 } 470 471 static int query_gt_topology(struct xe_device *xe, 472 struct drm_xe_device_query *query) 473 { 474 void __user *query_ptr = u64_to_user_ptr(query->data); 475 size_t size = calc_topo_query_size(xe); 476 struct drm_xe_query_topology_mask topo; 477 struct xe_gt *gt; 478 int id; 479 480 if (query->size == 0) { 481 query->size = size; 482 return 0; 483 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 484 return -EINVAL; 485 } 486 487 for_each_gt(gt, xe, id) { 488 int err; 489 490 topo.gt_id = id; 491 492 topo.type = DRM_XE_TOPO_DSS_GEOMETRY; 493 err = copy_mask(&query_ptr, &topo, gt->fuse_topo.g_dss_mask, 494 sizeof(gt->fuse_topo.g_dss_mask)); 495 if (err) 496 return err; 497 498 topo.type = DRM_XE_TOPO_DSS_COMPUTE; 499 err = copy_mask(&query_ptr, &topo, gt->fuse_topo.c_dss_mask, 500 sizeof(gt->fuse_topo.c_dss_mask)); 501 if (err) 502 return err; 503 504 topo.type = DRM_XE_TOPO_EU_PER_DSS; 505 err = copy_mask(&query_ptr, &topo, 506 gt->fuse_topo.eu_mask_per_dss, 507 sizeof(gt->fuse_topo.eu_mask_per_dss)); 508 if (err) 509 return err; 510 } 511 512 return 0; 513 } 514 515 static int 516 query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query) 517 { 518 struct drm_xe_query_uc_fw_version __user *query_ptr = u64_to_user_ptr(query->data); 519 size_t size = sizeof(struct drm_xe_query_uc_fw_version); 520 struct drm_xe_query_uc_fw_version resp; 521 struct xe_uc_fw_version *version = NULL; 522 523 if (query->size == 0) { 524 query->size = size; 525 return 0; 526 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 527 return -EINVAL; 528 } 529 530 if (copy_from_user(&resp, query_ptr, size)) 531 return -EFAULT; 532 533 if (XE_IOCTL_DBG(xe, resp.pad || resp.pad2 || resp.reserved)) 534 return -EINVAL; 535 536 switch (resp.uc_type) { 537 case XE_QUERY_UC_TYPE_GUC_SUBMISSION: { 538 struct xe_guc *guc = &xe->tiles[0].primary_gt->uc.guc; 539 540 version = &guc->fw.versions.found[XE_UC_FW_VER_COMPATIBILITY]; 541 break; 542 } 543 case XE_QUERY_UC_TYPE_HUC: { 544 struct xe_gt *media_gt = NULL; 545 struct xe_huc *huc; 546 547 if (MEDIA_VER(xe) >= 13) { 548 struct xe_tile *tile; 549 u8 gt_id; 550 551 for_each_tile(tile, xe, gt_id) { 552 if (tile->media_gt) { 553 media_gt = tile->media_gt; 554 break; 555 } 556 } 557 } else { 558 media_gt = xe->tiles[0].primary_gt; 559 } 560 561 if (!media_gt) 562 break; 563 564 huc = &media_gt->uc.huc; 565 if (huc->fw.status == XE_UC_FIRMWARE_RUNNING) 566 version = &huc->fw.versions.found[XE_UC_FW_VER_RELEASE]; 567 break; 568 } 569 default: 570 return -EINVAL; 571 } 572 573 if (version) { 574 resp.branch_ver = 0; 575 resp.major_ver = version->major; 576 resp.minor_ver = version->minor; 577 resp.patch_ver = version->patch; 578 } else { 579 return -ENODEV; 580 } 581 582 if (copy_to_user(query_ptr, &resp, size)) 583 return -EFAULT; 584 585 return 0; 586 } 587 588 static int (* const xe_query_funcs[])(struct xe_device *xe, 589 struct drm_xe_device_query *query) = { 590 query_engines, 591 query_mem_regions, 592 query_config, 593 query_gt_list, 594 query_hwconfig, 595 query_gt_topology, 596 query_engine_cycles, 597 query_uc_fw_version, 598 }; 599 600 int xe_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file) 601 { 602 struct xe_device *xe = to_xe_device(dev); 603 struct drm_xe_device_query *query = data; 604 u32 idx; 605 606 if (XE_IOCTL_DBG(xe, query->extensions) || 607 XE_IOCTL_DBG(xe, query->reserved[0] || query->reserved[1])) 608 return -EINVAL; 609 610 if (XE_IOCTL_DBG(xe, query->query >= ARRAY_SIZE(xe_query_funcs))) 611 return -EINVAL; 612 613 idx = array_index_nospec(query->query, ARRAY_SIZE(xe_query_funcs)); 614 if (XE_IOCTL_DBG(xe, !xe_query_funcs[idx])) 615 return -EINVAL; 616 617 return xe_query_funcs[idx](xe, query); 618 } 619