xref: /linux/drivers/gpu/drm/xe/xe_query.c (revision 5488bec96bccbd87335921338f8dc38b87db7d2c)
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2022 Intel Corporation
4  */
5 
6 #include "xe_query.h"
7 
8 #include <linux/nospec.h>
9 #include <linux/sched/clock.h>
10 
11 #include <drm/ttm/ttm_placement.h>
12 #include <generated/xe_wa_oob.h>
13 #include <uapi/drm/xe_drm.h>
14 
15 #include "regs/xe_engine_regs.h"
16 #include "regs/xe_gt_regs.h"
17 #include "xe_bo.h"
18 #include "xe_device.h"
19 #include "xe_eu_stall.h"
20 #include "xe_exec_queue.h"
21 #include "xe_force_wake.h"
22 #include "xe_ggtt.h"
23 #include "xe_gt.h"
24 #include "xe_guc_hwconfig.h"
25 #include "xe_macros.h"
26 #include "xe_mmio.h"
27 #include "xe_oa.h"
28 #include "xe_pxp.h"
29 #include "xe_ttm_vram_mgr.h"
30 #include "xe_wa.h"
31 
32 static const u16 xe_to_user_engine_class[] = {
33 	[XE_ENGINE_CLASS_RENDER] = DRM_XE_ENGINE_CLASS_RENDER,
34 	[XE_ENGINE_CLASS_COPY] = DRM_XE_ENGINE_CLASS_COPY,
35 	[XE_ENGINE_CLASS_VIDEO_DECODE] = DRM_XE_ENGINE_CLASS_VIDEO_DECODE,
36 	[XE_ENGINE_CLASS_VIDEO_ENHANCE] = DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE,
37 	[XE_ENGINE_CLASS_COMPUTE] = DRM_XE_ENGINE_CLASS_COMPUTE,
38 };
39 
40 static const enum xe_engine_class user_to_xe_engine_class[] = {
41 	[DRM_XE_ENGINE_CLASS_RENDER] = XE_ENGINE_CLASS_RENDER,
42 	[DRM_XE_ENGINE_CLASS_COPY] = XE_ENGINE_CLASS_COPY,
43 	[DRM_XE_ENGINE_CLASS_VIDEO_DECODE] = XE_ENGINE_CLASS_VIDEO_DECODE,
44 	[DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE] = XE_ENGINE_CLASS_VIDEO_ENHANCE,
45 	[DRM_XE_ENGINE_CLASS_COMPUTE] = XE_ENGINE_CLASS_COMPUTE,
46 };
47 
48 static size_t calc_hw_engine_info_size(struct xe_device *xe)
49 {
50 	struct xe_hw_engine *hwe;
51 	enum xe_hw_engine_id id;
52 	struct xe_gt *gt;
53 	u8 gt_id;
54 	int i = 0;
55 
56 	for_each_gt(gt, xe, gt_id)
57 		for_each_hw_engine(hwe, gt, id) {
58 			if (xe_hw_engine_is_reserved(hwe))
59 				continue;
60 			i++;
61 		}
62 
63 	return sizeof(struct drm_xe_query_engines) +
64 		i * sizeof(struct drm_xe_engine);
65 }
66 
67 typedef u64 (*__ktime_func_t)(void);
68 static __ktime_func_t __clock_id_to_func(clockid_t clk_id)
69 {
70 	/*
71 	 * Use logic same as the perf subsystem to allow user to select the
72 	 * reference clock id to be used for timestamps.
73 	 */
74 	switch (clk_id) {
75 	case CLOCK_MONOTONIC:
76 		return &ktime_get_ns;
77 	case CLOCK_MONOTONIC_RAW:
78 		return &ktime_get_raw_ns;
79 	case CLOCK_REALTIME:
80 		return &ktime_get_real_ns;
81 	case CLOCK_BOOTTIME:
82 		return &ktime_get_boottime_ns;
83 	case CLOCK_TAI:
84 		return &ktime_get_clocktai_ns;
85 	default:
86 		return NULL;
87 	}
88 }
89 
90 static void
91 hwe_read_timestamp(struct xe_hw_engine *hwe, u64 *engine_ts, u64 *cpu_ts,
92 		   u64 *cpu_delta, __ktime_func_t cpu_clock)
93 {
94 	struct xe_mmio *mmio = &hwe->gt->mmio;
95 	u32 upper, lower, old_upper, loop = 0;
96 	struct xe_reg upper_reg = RING_TIMESTAMP_UDW(hwe->mmio_base),
97 		      lower_reg = RING_TIMESTAMP(hwe->mmio_base);
98 
99 	upper = xe_mmio_read32(mmio, upper_reg);
100 	do {
101 		*cpu_delta = local_clock();
102 		*cpu_ts = cpu_clock();
103 		lower = xe_mmio_read32(mmio, lower_reg);
104 		*cpu_delta = local_clock() - *cpu_delta;
105 		old_upper = upper;
106 		upper = xe_mmio_read32(mmio, upper_reg);
107 	} while (upper != old_upper && loop++ < 2);
108 
109 	*engine_ts = (u64)upper << 32 | lower;
110 }
111 
112 static int
113 query_engine_cycles(struct xe_device *xe,
114 		    struct drm_xe_device_query *query)
115 {
116 	struct drm_xe_query_engine_cycles __user *query_ptr;
117 	struct drm_xe_engine_class_instance *eci;
118 	struct drm_xe_query_engine_cycles resp;
119 	size_t size = sizeof(resp);
120 	__ktime_func_t cpu_clock;
121 	struct xe_hw_engine *hwe;
122 	struct xe_gt *gt;
123 	unsigned int fw_ref;
124 
125 	if (IS_SRIOV_VF(xe))
126 		return -EOPNOTSUPP;
127 
128 	if (query->size == 0) {
129 		query->size = size;
130 		return 0;
131 	} else if (XE_IOCTL_DBG(xe, query->size != size)) {
132 		return -EINVAL;
133 	}
134 
135 	query_ptr = u64_to_user_ptr(query->data);
136 	if (copy_from_user(&resp, query_ptr, size))
137 		return -EFAULT;
138 
139 	cpu_clock = __clock_id_to_func(resp.clockid);
140 	if (!cpu_clock)
141 		return -EINVAL;
142 
143 	eci = &resp.eci;
144 	if (eci->gt_id >= XE_MAX_GT_PER_TILE)
145 		return -EINVAL;
146 
147 	gt = xe_device_get_gt(xe, eci->gt_id);
148 	if (!gt)
149 		return -EINVAL;
150 
151 	if (eci->engine_class >= ARRAY_SIZE(user_to_xe_engine_class))
152 		return -EINVAL;
153 
154 	hwe = xe_gt_hw_engine(gt, user_to_xe_engine_class[eci->engine_class],
155 			      eci->engine_instance, true);
156 	if (!hwe)
157 		return -EINVAL;
158 
159 	fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
160 	if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL))  {
161 		xe_force_wake_put(gt_to_fw(gt), fw_ref);
162 		return -EIO;
163 	}
164 
165 	hwe_read_timestamp(hwe, &resp.engine_cycles, &resp.cpu_timestamp,
166 			   &resp.cpu_delta, cpu_clock);
167 
168 	xe_force_wake_put(gt_to_fw(gt), fw_ref);
169 
170 	if (GRAPHICS_VER(xe) >= 20)
171 		resp.width = 64;
172 	else
173 		resp.width = 36;
174 
175 	/* Only write to the output fields of user query */
176 	if (put_user(resp.cpu_timestamp, &query_ptr->cpu_timestamp) ||
177 	    put_user(resp.cpu_delta, &query_ptr->cpu_delta) ||
178 	    put_user(resp.engine_cycles, &query_ptr->engine_cycles) ||
179 	    put_user(resp.width, &query_ptr->width))
180 		return -EFAULT;
181 
182 	return 0;
183 }
184 
185 static int query_engines(struct xe_device *xe,
186 			 struct drm_xe_device_query *query)
187 {
188 	size_t size = calc_hw_engine_info_size(xe);
189 	struct drm_xe_query_engines __user *query_ptr =
190 		u64_to_user_ptr(query->data);
191 	struct drm_xe_query_engines *engines;
192 	struct xe_hw_engine *hwe;
193 	enum xe_hw_engine_id id;
194 	struct xe_gt *gt;
195 	u8 gt_id;
196 	int i = 0;
197 
198 	if (query->size == 0) {
199 		query->size = size;
200 		return 0;
201 	} else if (XE_IOCTL_DBG(xe, query->size != size)) {
202 		return -EINVAL;
203 	}
204 
205 	engines = kzalloc(size, GFP_KERNEL);
206 	if (!engines)
207 		return -ENOMEM;
208 
209 	for_each_gt(gt, xe, gt_id)
210 		for_each_hw_engine(hwe, gt, id) {
211 			if (xe_hw_engine_is_reserved(hwe))
212 				continue;
213 
214 			engines->engines[i].instance.engine_class =
215 				xe_to_user_engine_class[hwe->class];
216 			engines->engines[i].instance.engine_instance =
217 				hwe->logical_instance;
218 			engines->engines[i].instance.gt_id = gt->info.id;
219 
220 			i++;
221 		}
222 
223 	engines->num_engines = i;
224 
225 	if (copy_to_user(query_ptr, engines, size)) {
226 		kfree(engines);
227 		return -EFAULT;
228 	}
229 	kfree(engines);
230 
231 	return 0;
232 }
233 
234 static size_t calc_mem_regions_size(struct xe_device *xe)
235 {
236 	u32 num_managers = 1;
237 	int i;
238 
239 	for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i)
240 		if (ttm_manager_type(&xe->ttm, i))
241 			num_managers++;
242 
243 	return offsetof(struct drm_xe_query_mem_regions, mem_regions[num_managers]);
244 }
245 
246 static int query_mem_regions(struct xe_device *xe,
247 			    struct drm_xe_device_query *query)
248 {
249 	size_t size = calc_mem_regions_size(xe);
250 	struct drm_xe_query_mem_regions *mem_regions;
251 	struct drm_xe_query_mem_regions __user *query_ptr =
252 		u64_to_user_ptr(query->data);
253 	struct ttm_resource_manager *man;
254 	int ret, i;
255 
256 	if (query->size == 0) {
257 		query->size = size;
258 		return 0;
259 	} else if (XE_IOCTL_DBG(xe, query->size != size)) {
260 		return -EINVAL;
261 	}
262 
263 	mem_regions = kzalloc(size, GFP_KERNEL);
264 	if (XE_IOCTL_DBG(xe, !mem_regions))
265 		return -ENOMEM;
266 
267 	man = ttm_manager_type(&xe->ttm, XE_PL_TT);
268 	mem_regions->mem_regions[0].mem_class = DRM_XE_MEM_REGION_CLASS_SYSMEM;
269 	/*
270 	 * The instance needs to be a unique number that represents the index
271 	 * in the placement mask used at xe_gem_create_ioctl() for the
272 	 * xe_bo_create() placement.
273 	 */
274 	mem_regions->mem_regions[0].instance = 0;
275 	mem_regions->mem_regions[0].min_page_size = PAGE_SIZE;
276 	mem_regions->mem_regions[0].total_size = man->size << PAGE_SHIFT;
277 	if (perfmon_capable())
278 		mem_regions->mem_regions[0].used = ttm_resource_manager_usage(man);
279 	mem_regions->num_mem_regions = 1;
280 
281 	for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i) {
282 		man = ttm_manager_type(&xe->ttm, i);
283 		if (man) {
284 			mem_regions->mem_regions[mem_regions->num_mem_regions].mem_class =
285 				DRM_XE_MEM_REGION_CLASS_VRAM;
286 			mem_regions->mem_regions[mem_regions->num_mem_regions].instance =
287 				mem_regions->num_mem_regions;
288 			mem_regions->mem_regions[mem_regions->num_mem_regions].min_page_size =
289 				xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ?
290 				SZ_64K : PAGE_SIZE;
291 			mem_regions->mem_regions[mem_regions->num_mem_regions].total_size =
292 				man->size;
293 
294 			if (perfmon_capable()) {
295 				xe_ttm_vram_get_used(man,
296 					&mem_regions->mem_regions
297 					[mem_regions->num_mem_regions].used,
298 					&mem_regions->mem_regions
299 					[mem_regions->num_mem_regions].cpu_visible_used);
300 			}
301 
302 			mem_regions->mem_regions[mem_regions->num_mem_regions].cpu_visible_size =
303 				xe_ttm_vram_get_cpu_visible_size(man);
304 			mem_regions->num_mem_regions++;
305 		}
306 	}
307 
308 	if (!copy_to_user(query_ptr, mem_regions, size))
309 		ret = 0;
310 	else
311 		ret = -ENOSPC;
312 
313 	kfree(mem_regions);
314 	return ret;
315 }
316 
317 static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
318 {
319 	const u32 num_params = DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1;
320 	size_t size =
321 		sizeof(struct drm_xe_query_config) + num_params * sizeof(u64);
322 	struct drm_xe_query_config __user *query_ptr =
323 		u64_to_user_ptr(query->data);
324 	struct drm_xe_query_config *config;
325 
326 	if (query->size == 0) {
327 		query->size = size;
328 		return 0;
329 	} else if (XE_IOCTL_DBG(xe, query->size != size)) {
330 		return -EINVAL;
331 	}
332 
333 	config = kzalloc(size, GFP_KERNEL);
334 	if (!config)
335 		return -ENOMEM;
336 
337 	config->num_params = num_params;
338 	config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] =
339 		xe->info.devid | (xe->info.revid << 16);
340 	if (xe_device_get_root_tile(xe)->mem.vram.usable_size)
341 		config->info[DRM_XE_QUERY_CONFIG_FLAGS] =
342 			DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM;
343 	config->info[DRM_XE_QUERY_CONFIG_FLAGS] |=
344 			DRM_XE_QUERY_CONFIG_FLAG_HAS_LOW_LATENCY;
345 	config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] =
346 		xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
347 	config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
348 	config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] =
349 		xe_exec_queue_device_get_max_priority(xe);
350 
351 	if (copy_to_user(query_ptr, config, size)) {
352 		kfree(config);
353 		return -EFAULT;
354 	}
355 	kfree(config);
356 
357 	return 0;
358 }
359 
360 static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query)
361 {
362 	struct xe_gt *gt;
363 	size_t size = sizeof(struct drm_xe_query_gt_list) +
364 		xe->info.gt_count * sizeof(struct drm_xe_gt);
365 	struct drm_xe_query_gt_list __user *query_ptr =
366 		u64_to_user_ptr(query->data);
367 	struct drm_xe_query_gt_list *gt_list;
368 	u8 id;
369 
370 	if (query->size == 0) {
371 		query->size = size;
372 		return 0;
373 	} else if (XE_IOCTL_DBG(xe, query->size != size)) {
374 		return -EINVAL;
375 	}
376 
377 	gt_list = kzalloc(size, GFP_KERNEL);
378 	if (!gt_list)
379 		return -ENOMEM;
380 
381 	gt_list->num_gt = xe->info.gt_count;
382 
383 	for_each_gt(gt, xe, id) {
384 		if (xe_gt_is_media_type(gt))
385 			gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MEDIA;
386 		else
387 			gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN;
388 		gt_list->gt_list[id].tile_id = gt_to_tile(gt)->id;
389 		gt_list->gt_list[id].gt_id = gt->info.id;
390 		gt_list->gt_list[id].reference_clock = gt->info.reference_clock;
391 		/*
392 		 * The mem_regions indexes in the mask below need to
393 		 * directly identify the struct
394 		 * drm_xe_query_mem_regions' instance constructed at
395 		 * query_mem_regions()
396 		 *
397 		 * For our current platforms:
398 		 * Bit 0 -> System Memory
399 		 * Bit 1 -> VRAM0 on Tile0
400 		 * Bit 2 -> VRAM1 on Tile1
401 		 * However the uAPI is generic and it's userspace's
402 		 * responsibility to check the mem_class, without any
403 		 * assumption.
404 		 */
405 		if (!IS_DGFX(xe))
406 			gt_list->gt_list[id].near_mem_regions = 0x1;
407 		else
408 			gt_list->gt_list[id].near_mem_regions =
409 				BIT(gt_to_tile(gt)->id) << 1;
410 		gt_list->gt_list[id].far_mem_regions = xe->info.mem_region_mask ^
411 			gt_list->gt_list[id].near_mem_regions;
412 
413 		gt_list->gt_list[id].ip_ver_major =
414 			REG_FIELD_GET(GMD_ID_ARCH_MASK, gt->info.gmdid);
415 		gt_list->gt_list[id].ip_ver_minor =
416 			REG_FIELD_GET(GMD_ID_RELEASE_MASK, gt->info.gmdid);
417 		gt_list->gt_list[id].ip_ver_rev =
418 			REG_FIELD_GET(GMD_ID_REVID, gt->info.gmdid);
419 	}
420 
421 	if (copy_to_user(query_ptr, gt_list, size)) {
422 		kfree(gt_list);
423 		return -EFAULT;
424 	}
425 	kfree(gt_list);
426 
427 	return 0;
428 }
429 
430 static int query_hwconfig(struct xe_device *xe,
431 			  struct drm_xe_device_query *query)
432 {
433 	struct xe_gt *gt = xe_root_mmio_gt(xe);
434 	size_t size = xe_guc_hwconfig_size(&gt->uc.guc);
435 	void __user *query_ptr = u64_to_user_ptr(query->data);
436 	void *hwconfig;
437 
438 	if (query->size == 0) {
439 		query->size = size;
440 		return 0;
441 	} else if (XE_IOCTL_DBG(xe, query->size != size)) {
442 		return -EINVAL;
443 	}
444 
445 	hwconfig = kzalloc(size, GFP_KERNEL);
446 	if (!hwconfig)
447 		return -ENOMEM;
448 
449 	xe_guc_hwconfig_copy(&gt->uc.guc, hwconfig);
450 
451 	if (copy_to_user(query_ptr, hwconfig, size)) {
452 		kfree(hwconfig);
453 		return -EFAULT;
454 	}
455 	kfree(hwconfig);
456 
457 	return 0;
458 }
459 
460 static size_t calc_topo_query_size(struct xe_device *xe)
461 {
462 	struct xe_gt *gt;
463 	size_t query_size = 0;
464 	int id;
465 
466 	for_each_gt(gt, xe, id) {
467 		query_size += 3 * sizeof(struct drm_xe_query_topology_mask) +
468 			sizeof_field(struct xe_gt, fuse_topo.g_dss_mask) +
469 			sizeof_field(struct xe_gt, fuse_topo.c_dss_mask) +
470 			sizeof_field(struct xe_gt, fuse_topo.eu_mask_per_dss);
471 
472 		/* L3bank mask may not be available for some GTs */
473 		if (!XE_WA(gt, no_media_l3))
474 			query_size += sizeof(struct drm_xe_query_topology_mask) +
475 				sizeof_field(struct xe_gt, fuse_topo.l3_bank_mask);
476 	}
477 
478 	return query_size;
479 }
480 
481 static int copy_mask(void __user **ptr,
482 		     struct drm_xe_query_topology_mask *topo,
483 		     void *mask, size_t mask_size)
484 {
485 	topo->num_bytes = mask_size;
486 
487 	if (copy_to_user(*ptr, topo, sizeof(*topo)))
488 		return -EFAULT;
489 	*ptr += sizeof(topo);
490 
491 	if (copy_to_user(*ptr, mask, mask_size))
492 		return -EFAULT;
493 	*ptr += mask_size;
494 
495 	return 0;
496 }
497 
498 static int query_gt_topology(struct xe_device *xe,
499 			     struct drm_xe_device_query *query)
500 {
501 	void __user *query_ptr = u64_to_user_ptr(query->data);
502 	size_t size = calc_topo_query_size(xe);
503 	struct drm_xe_query_topology_mask topo;
504 	struct xe_gt *gt;
505 	int id;
506 
507 	if (query->size == 0) {
508 		query->size = size;
509 		return 0;
510 	} else if (XE_IOCTL_DBG(xe, query->size != size)) {
511 		return -EINVAL;
512 	}
513 
514 	for_each_gt(gt, xe, id) {
515 		int err;
516 
517 		topo.gt_id = id;
518 
519 		topo.type = DRM_XE_TOPO_DSS_GEOMETRY;
520 		err = copy_mask(&query_ptr, &topo, gt->fuse_topo.g_dss_mask,
521 				sizeof(gt->fuse_topo.g_dss_mask));
522 		if (err)
523 			return err;
524 
525 		topo.type = DRM_XE_TOPO_DSS_COMPUTE;
526 		err = copy_mask(&query_ptr, &topo, gt->fuse_topo.c_dss_mask,
527 				sizeof(gt->fuse_topo.c_dss_mask));
528 		if (err)
529 			return err;
530 
531 		/*
532 		 * If the kernel doesn't have a way to obtain a correct L3bank
533 		 * mask, then it's better to omit L3 from the query rather than
534 		 * reporting bogus or zeroed information to userspace.
535 		 */
536 		if (!XE_WA(gt, no_media_l3)) {
537 			topo.type = DRM_XE_TOPO_L3_BANK;
538 			err = copy_mask(&query_ptr, &topo, gt->fuse_topo.l3_bank_mask,
539 					sizeof(gt->fuse_topo.l3_bank_mask));
540 			if (err)
541 				return err;
542 		}
543 
544 		topo.type = gt->fuse_topo.eu_type == XE_GT_EU_TYPE_SIMD16 ?
545 			DRM_XE_TOPO_SIMD16_EU_PER_DSS :
546 			DRM_XE_TOPO_EU_PER_DSS;
547 		err = copy_mask(&query_ptr, &topo,
548 				gt->fuse_topo.eu_mask_per_dss,
549 				sizeof(gt->fuse_topo.eu_mask_per_dss));
550 		if (err)
551 			return err;
552 	}
553 
554 	return 0;
555 }
556 
557 static int
558 query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query)
559 {
560 	struct drm_xe_query_uc_fw_version __user *query_ptr = u64_to_user_ptr(query->data);
561 	size_t size = sizeof(struct drm_xe_query_uc_fw_version);
562 	struct drm_xe_query_uc_fw_version resp;
563 	struct xe_uc_fw_version *version = NULL;
564 
565 	if (query->size == 0) {
566 		query->size = size;
567 		return 0;
568 	} else if (XE_IOCTL_DBG(xe, query->size != size)) {
569 		return -EINVAL;
570 	}
571 
572 	if (copy_from_user(&resp, query_ptr, size))
573 		return -EFAULT;
574 
575 	if (XE_IOCTL_DBG(xe, resp.pad || resp.pad2 || resp.reserved))
576 		return -EINVAL;
577 
578 	switch (resp.uc_type) {
579 	case XE_QUERY_UC_TYPE_GUC_SUBMISSION: {
580 		struct xe_guc *guc = &xe->tiles[0].primary_gt->uc.guc;
581 
582 		version = &guc->fw.versions.found[XE_UC_FW_VER_COMPATIBILITY];
583 		break;
584 	}
585 	case XE_QUERY_UC_TYPE_HUC: {
586 		struct xe_gt *media_gt = NULL;
587 		struct xe_huc *huc;
588 
589 		if (MEDIA_VER(xe) >= 13) {
590 			struct xe_tile *tile;
591 			u8 gt_id;
592 
593 			for_each_tile(tile, xe, gt_id) {
594 				if (tile->media_gt) {
595 					media_gt = tile->media_gt;
596 					break;
597 				}
598 			}
599 		} else {
600 			media_gt = xe->tiles[0].primary_gt;
601 		}
602 
603 		if (!media_gt)
604 			break;
605 
606 		huc = &media_gt->uc.huc;
607 		if (huc->fw.status == XE_UC_FIRMWARE_RUNNING)
608 			version = &huc->fw.versions.found[XE_UC_FW_VER_RELEASE];
609 		break;
610 	}
611 	default:
612 		return -EINVAL;
613 	}
614 
615 	if (version) {
616 		resp.branch_ver = 0;
617 		resp.major_ver = version->major;
618 		resp.minor_ver = version->minor;
619 		resp.patch_ver = version->patch;
620 	} else {
621 		return -ENODEV;
622 	}
623 
624 	if (copy_to_user(query_ptr, &resp, size))
625 		return -EFAULT;
626 
627 	return 0;
628 }
629 
630 static size_t calc_oa_unit_query_size(struct xe_device *xe)
631 {
632 	size_t size = sizeof(struct drm_xe_query_oa_units);
633 	struct xe_gt *gt;
634 	int i, id;
635 
636 	for_each_gt(gt, xe, id) {
637 		for (i = 0; i < gt->oa.num_oa_units; i++) {
638 			size += sizeof(struct drm_xe_oa_unit);
639 			size += gt->oa.oa_unit[i].num_engines *
640 				sizeof(struct drm_xe_engine_class_instance);
641 		}
642 	}
643 
644 	return size;
645 }
646 
647 static int query_oa_units(struct xe_device *xe,
648 			  struct drm_xe_device_query *query)
649 {
650 	void __user *query_ptr = u64_to_user_ptr(query->data);
651 	size_t size = calc_oa_unit_query_size(xe);
652 	struct drm_xe_query_oa_units *qoa;
653 	enum xe_hw_engine_id hwe_id;
654 	struct drm_xe_oa_unit *du;
655 	struct xe_hw_engine *hwe;
656 	struct xe_oa_unit *u;
657 	int gt_id, i, j, ret;
658 	struct xe_gt *gt;
659 	u8 *pdu;
660 
661 	if (query->size == 0) {
662 		query->size = size;
663 		return 0;
664 	} else if (XE_IOCTL_DBG(xe, query->size != size)) {
665 		return -EINVAL;
666 	}
667 
668 	qoa = kzalloc(size, GFP_KERNEL);
669 	if (!qoa)
670 		return -ENOMEM;
671 
672 	pdu = (u8 *)&qoa->oa_units[0];
673 	for_each_gt(gt, xe, gt_id) {
674 		for (i = 0; i < gt->oa.num_oa_units; i++) {
675 			u = &gt->oa.oa_unit[i];
676 			du = (struct drm_xe_oa_unit *)pdu;
677 
678 			du->oa_unit_id = u->oa_unit_id;
679 			du->oa_unit_type = u->type;
680 			du->oa_timestamp_freq = xe_oa_timestamp_frequency(gt);
681 			du->capabilities = DRM_XE_OA_CAPS_BASE | DRM_XE_OA_CAPS_SYNCS |
682 					   DRM_XE_OA_CAPS_OA_BUFFER_SIZE |
683 					   DRM_XE_OA_CAPS_WAIT_NUM_REPORTS;
684 
685 			j = 0;
686 			for_each_hw_engine(hwe, gt, hwe_id) {
687 				if (!xe_hw_engine_is_reserved(hwe) &&
688 				    xe_oa_unit_id(hwe) == u->oa_unit_id) {
689 					du->eci[j].engine_class =
690 						xe_to_user_engine_class[hwe->class];
691 					du->eci[j].engine_instance = hwe->logical_instance;
692 					du->eci[j].gt_id = gt->info.id;
693 					j++;
694 				}
695 			}
696 			du->num_engines = j;
697 			pdu += sizeof(*du) + j * sizeof(du->eci[0]);
698 			qoa->num_oa_units++;
699 		}
700 	}
701 
702 	ret = copy_to_user(query_ptr, qoa, size);
703 	kfree(qoa);
704 
705 	return ret ? -EFAULT : 0;
706 }
707 
708 static int query_pxp_status(struct xe_device *xe, struct drm_xe_device_query *query)
709 {
710 	struct drm_xe_query_pxp_status __user *query_ptr = u64_to_user_ptr(query->data);
711 	size_t size = sizeof(struct drm_xe_query_pxp_status);
712 	struct drm_xe_query_pxp_status resp = { 0 };
713 	int ret;
714 
715 	if (query->size == 0) {
716 		query->size = size;
717 		return 0;
718 	} else if (XE_IOCTL_DBG(xe, query->size != size)) {
719 		return -EINVAL;
720 	}
721 
722 	ret = xe_pxp_get_readiness_status(xe->pxp);
723 	if (ret < 0)
724 		return ret;
725 
726 	resp.status = ret;
727 	resp.supported_session_types = BIT(DRM_XE_PXP_TYPE_HWDRM);
728 
729 	if (copy_to_user(query_ptr, &resp, size))
730 		return -EFAULT;
731 
732 	return 0;
733 }
734 
735 static int query_eu_stall(struct xe_device *xe,
736 			  struct drm_xe_device_query *query)
737 {
738 	void __user *query_ptr = u64_to_user_ptr(query->data);
739 	struct drm_xe_query_eu_stall *info;
740 	size_t size, array_size;
741 	const u64 *rates;
742 	u32 num_rates;
743 	int ret;
744 
745 	if (!xe_eu_stall_supported_on_platform(xe)) {
746 		drm_dbg(&xe->drm, "EU stall monitoring is not supported on this platform\n");
747 		return -ENODEV;
748 	}
749 
750 	array_size = xe_eu_stall_get_sampling_rates(&num_rates, &rates);
751 	size = sizeof(struct drm_xe_query_eu_stall) + array_size;
752 
753 	if (query->size == 0) {
754 		query->size = size;
755 		return 0;
756 	} else if (XE_IOCTL_DBG(xe, query->size != size)) {
757 		return -EINVAL;
758 	}
759 
760 	info = kzalloc(size, GFP_KERNEL);
761 	if (!info)
762 		return -ENOMEM;
763 
764 	info->num_sampling_rates = num_rates;
765 	info->capabilities = DRM_XE_EU_STALL_CAPS_BASE;
766 	info->record_size = xe_eu_stall_data_record_size(xe);
767 	info->per_xecore_buf_size = xe_eu_stall_get_per_xecore_buf_size();
768 	memcpy(info->sampling_rates, rates, array_size);
769 
770 	ret = copy_to_user(query_ptr, info, size);
771 	kfree(info);
772 
773 	return ret ? -EFAULT : 0;
774 }
775 
776 static int (* const xe_query_funcs[])(struct xe_device *xe,
777 				      struct drm_xe_device_query *query) = {
778 	query_engines,
779 	query_mem_regions,
780 	query_config,
781 	query_gt_list,
782 	query_hwconfig,
783 	query_gt_topology,
784 	query_engine_cycles,
785 	query_uc_fw_version,
786 	query_oa_units,
787 	query_pxp_status,
788 	query_eu_stall,
789 };
790 
791 int xe_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
792 {
793 	struct xe_device *xe = to_xe_device(dev);
794 	struct drm_xe_device_query *query = data;
795 	u32 idx;
796 
797 	if (XE_IOCTL_DBG(xe, query->extensions) ||
798 	    XE_IOCTL_DBG(xe, query->reserved[0] || query->reserved[1]))
799 		return -EINVAL;
800 
801 	if (XE_IOCTL_DBG(xe, query->query >= ARRAY_SIZE(xe_query_funcs)))
802 		return -EINVAL;
803 
804 	idx = array_index_nospec(query->query, ARRAY_SIZE(xe_query_funcs));
805 	if (XE_IOCTL_DBG(xe, !xe_query_funcs[idx]))
806 		return -EINVAL;
807 
808 	return xe_query_funcs[idx](xe, query);
809 }
810