xref: /linux/drivers/gpu/drm/xe/xe_query.c (revision 44343e8b250abb2f6bfd615493ca07a7f11f3cc2)
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2022 Intel Corporation
4  */
5 
6 #include "xe_query.h"
7 
8 #include <linux/nospec.h>
9 #include <linux/sched/clock.h>
10 
11 #include <drm/ttm/ttm_placement.h>
12 #include <generated/xe_wa_oob.h>
13 #include <uapi/drm/xe_drm.h>
14 
15 #include "regs/xe_engine_regs.h"
16 #include "regs/xe_gt_regs.h"
17 #include "xe_bo.h"
18 #include "xe_device.h"
19 #include "xe_eu_stall.h"
20 #include "xe_exec_queue.h"
21 #include "xe_force_wake.h"
22 #include "xe_ggtt.h"
23 #include "xe_gt.h"
24 #include "xe_guc_hwconfig.h"
25 #include "xe_macros.h"
26 #include "xe_mmio.h"
27 #include "xe_oa.h"
28 #include "xe_pxp.h"
29 #include "xe_ttm_vram_mgr.h"
30 #include "xe_vram_types.h"
31 #include "xe_wa.h"
32 
33 static const u16 xe_to_user_engine_class[] = {
34 	[XE_ENGINE_CLASS_RENDER] = DRM_XE_ENGINE_CLASS_RENDER,
35 	[XE_ENGINE_CLASS_COPY] = DRM_XE_ENGINE_CLASS_COPY,
36 	[XE_ENGINE_CLASS_VIDEO_DECODE] = DRM_XE_ENGINE_CLASS_VIDEO_DECODE,
37 	[XE_ENGINE_CLASS_VIDEO_ENHANCE] = DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE,
38 	[XE_ENGINE_CLASS_COMPUTE] = DRM_XE_ENGINE_CLASS_COMPUTE,
39 };
40 
41 static const enum xe_engine_class user_to_xe_engine_class[] = {
42 	[DRM_XE_ENGINE_CLASS_RENDER] = XE_ENGINE_CLASS_RENDER,
43 	[DRM_XE_ENGINE_CLASS_COPY] = XE_ENGINE_CLASS_COPY,
44 	[DRM_XE_ENGINE_CLASS_VIDEO_DECODE] = XE_ENGINE_CLASS_VIDEO_DECODE,
45 	[DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE] = XE_ENGINE_CLASS_VIDEO_ENHANCE,
46 	[DRM_XE_ENGINE_CLASS_COMPUTE] = XE_ENGINE_CLASS_COMPUTE,
47 };
48 
49 static size_t calc_hw_engine_info_size(struct xe_device *xe)
50 {
51 	struct xe_hw_engine *hwe;
52 	enum xe_hw_engine_id id;
53 	struct xe_gt *gt;
54 	u8 gt_id;
55 	int i = 0;
56 
57 	for_each_gt(gt, xe, gt_id)
58 		for_each_hw_engine(hwe, gt, id) {
59 			if (xe_hw_engine_is_reserved(hwe))
60 				continue;
61 			i++;
62 		}
63 
64 	return sizeof(struct drm_xe_query_engines) +
65 		i * sizeof(struct drm_xe_engine);
66 }
67 
68 typedef u64 (*__ktime_func_t)(void);
69 static __ktime_func_t __clock_id_to_func(clockid_t clk_id)
70 {
71 	/*
72 	 * Use logic same as the perf subsystem to allow user to select the
73 	 * reference clock id to be used for timestamps.
74 	 */
75 	switch (clk_id) {
76 	case CLOCK_MONOTONIC:
77 		return &ktime_get_ns;
78 	case CLOCK_MONOTONIC_RAW:
79 		return &ktime_get_raw_ns;
80 	case CLOCK_REALTIME:
81 		return &ktime_get_real_ns;
82 	case CLOCK_BOOTTIME:
83 		return &ktime_get_boottime_ns;
84 	case CLOCK_TAI:
85 		return &ktime_get_clocktai_ns;
86 	default:
87 		return NULL;
88 	}
89 }
90 
91 static void
92 hwe_read_timestamp(struct xe_hw_engine *hwe, u64 *engine_ts, u64 *cpu_ts,
93 		   u64 *cpu_delta, __ktime_func_t cpu_clock)
94 {
95 	struct xe_mmio *mmio = &hwe->gt->mmio;
96 	u32 upper, lower, old_upper, loop = 0;
97 	struct xe_reg upper_reg = RING_TIMESTAMP_UDW(hwe->mmio_base),
98 		      lower_reg = RING_TIMESTAMP(hwe->mmio_base);
99 
100 	upper = xe_mmio_read32(mmio, upper_reg);
101 	do {
102 		*cpu_delta = local_clock();
103 		*cpu_ts = cpu_clock();
104 		lower = xe_mmio_read32(mmio, lower_reg);
105 		*cpu_delta = local_clock() - *cpu_delta;
106 		old_upper = upper;
107 		upper = xe_mmio_read32(mmio, upper_reg);
108 	} while (upper != old_upper && loop++ < 2);
109 
110 	*engine_ts = (u64)upper << 32 | lower;
111 }
112 
113 static int
114 query_engine_cycles(struct xe_device *xe,
115 		    struct drm_xe_device_query *query)
116 {
117 	struct drm_xe_query_engine_cycles __user *query_ptr;
118 	struct drm_xe_engine_class_instance *eci;
119 	struct drm_xe_query_engine_cycles resp;
120 	size_t size = sizeof(resp);
121 	__ktime_func_t cpu_clock;
122 	struct xe_hw_engine *hwe;
123 	struct xe_gt *gt;
124 	unsigned int fw_ref;
125 
126 	if (IS_SRIOV_VF(xe))
127 		return -EOPNOTSUPP;
128 
129 	if (query->size == 0) {
130 		query->size = size;
131 		return 0;
132 	} else if (XE_IOCTL_DBG(xe, query->size != size)) {
133 		return -EINVAL;
134 	}
135 
136 	query_ptr = u64_to_user_ptr(query->data);
137 	if (copy_from_user(&resp, query_ptr, size))
138 		return -EFAULT;
139 
140 	cpu_clock = __clock_id_to_func(resp.clockid);
141 	if (!cpu_clock)
142 		return -EINVAL;
143 
144 	eci = &resp.eci;
145 	if (eci->gt_id >= xe->info.max_gt_per_tile)
146 		return -EINVAL;
147 
148 	gt = xe_device_get_gt(xe, eci->gt_id);
149 	if (!gt)
150 		return -EINVAL;
151 
152 	if (eci->engine_class >= ARRAY_SIZE(user_to_xe_engine_class))
153 		return -EINVAL;
154 
155 	hwe = xe_gt_hw_engine(gt, user_to_xe_engine_class[eci->engine_class],
156 			      eci->engine_instance, true);
157 	if (!hwe)
158 		return -EINVAL;
159 
160 	fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
161 	if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL))  {
162 		xe_force_wake_put(gt_to_fw(gt), fw_ref);
163 		return -EIO;
164 	}
165 
166 	hwe_read_timestamp(hwe, &resp.engine_cycles, &resp.cpu_timestamp,
167 			   &resp.cpu_delta, cpu_clock);
168 
169 	xe_force_wake_put(gt_to_fw(gt), fw_ref);
170 
171 	if (GRAPHICS_VER(xe) >= 20)
172 		resp.width = 64;
173 	else
174 		resp.width = 36;
175 
176 	/* Only write to the output fields of user query */
177 	if (put_user(resp.cpu_timestamp, &query_ptr->cpu_timestamp) ||
178 	    put_user(resp.cpu_delta, &query_ptr->cpu_delta) ||
179 	    put_user(resp.engine_cycles, &query_ptr->engine_cycles) ||
180 	    put_user(resp.width, &query_ptr->width))
181 		return -EFAULT;
182 
183 	return 0;
184 }
185 
186 static int query_engines(struct xe_device *xe,
187 			 struct drm_xe_device_query *query)
188 {
189 	size_t size = calc_hw_engine_info_size(xe);
190 	struct drm_xe_query_engines __user *query_ptr =
191 		u64_to_user_ptr(query->data);
192 	struct drm_xe_query_engines *engines;
193 	struct xe_hw_engine *hwe;
194 	enum xe_hw_engine_id id;
195 	struct xe_gt *gt;
196 	u8 gt_id;
197 	int i = 0;
198 
199 	if (query->size == 0) {
200 		query->size = size;
201 		return 0;
202 	} else if (XE_IOCTL_DBG(xe, query->size != size)) {
203 		return -EINVAL;
204 	}
205 
206 	engines = kzalloc(size, GFP_KERNEL);
207 	if (!engines)
208 		return -ENOMEM;
209 
210 	for_each_gt(gt, xe, gt_id)
211 		for_each_hw_engine(hwe, gt, id) {
212 			if (xe_hw_engine_is_reserved(hwe))
213 				continue;
214 
215 			engines->engines[i].instance.engine_class =
216 				xe_to_user_engine_class[hwe->class];
217 			engines->engines[i].instance.engine_instance =
218 				hwe->logical_instance;
219 			engines->engines[i].instance.gt_id = gt->info.id;
220 
221 			i++;
222 		}
223 
224 	engines->num_engines = i;
225 
226 	if (copy_to_user(query_ptr, engines, size)) {
227 		kfree(engines);
228 		return -EFAULT;
229 	}
230 	kfree(engines);
231 
232 	return 0;
233 }
234 
235 static size_t calc_mem_regions_size(struct xe_device *xe)
236 {
237 	u32 num_managers = 1;
238 	int i;
239 
240 	for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i)
241 		if (ttm_manager_type(&xe->ttm, i))
242 			num_managers++;
243 
244 	return offsetof(struct drm_xe_query_mem_regions, mem_regions[num_managers]);
245 }
246 
247 static int query_mem_regions(struct xe_device *xe,
248 			    struct drm_xe_device_query *query)
249 {
250 	size_t size = calc_mem_regions_size(xe);
251 	struct drm_xe_query_mem_regions *mem_regions;
252 	struct drm_xe_query_mem_regions __user *query_ptr =
253 		u64_to_user_ptr(query->data);
254 	struct ttm_resource_manager *man;
255 	int ret, i;
256 
257 	if (query->size == 0) {
258 		query->size = size;
259 		return 0;
260 	} else if (XE_IOCTL_DBG(xe, query->size != size)) {
261 		return -EINVAL;
262 	}
263 
264 	mem_regions = kzalloc(size, GFP_KERNEL);
265 	if (XE_IOCTL_DBG(xe, !mem_regions))
266 		return -ENOMEM;
267 
268 	man = ttm_manager_type(&xe->ttm, XE_PL_TT);
269 	mem_regions->mem_regions[0].mem_class = DRM_XE_MEM_REGION_CLASS_SYSMEM;
270 	/*
271 	 * The instance needs to be a unique number that represents the index
272 	 * in the placement mask used at xe_gem_create_ioctl() for the
273 	 * xe_bo_create() placement.
274 	 */
275 	mem_regions->mem_regions[0].instance = 0;
276 	mem_regions->mem_regions[0].min_page_size = PAGE_SIZE;
277 	mem_regions->mem_regions[0].total_size = man->size << PAGE_SHIFT;
278 	if (perfmon_capable())
279 		mem_regions->mem_regions[0].used = ttm_resource_manager_usage(man);
280 	mem_regions->num_mem_regions = 1;
281 
282 	for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i) {
283 		man = ttm_manager_type(&xe->ttm, i);
284 		if (man) {
285 			mem_regions->mem_regions[mem_regions->num_mem_regions].mem_class =
286 				DRM_XE_MEM_REGION_CLASS_VRAM;
287 			mem_regions->mem_regions[mem_regions->num_mem_regions].instance =
288 				mem_regions->num_mem_regions;
289 			mem_regions->mem_regions[mem_regions->num_mem_regions].min_page_size =
290 				xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ?
291 				SZ_64K : PAGE_SIZE;
292 			mem_regions->mem_regions[mem_regions->num_mem_regions].total_size =
293 				man->size;
294 
295 			if (perfmon_capable()) {
296 				xe_ttm_vram_get_used(man,
297 					&mem_regions->mem_regions
298 					[mem_regions->num_mem_regions].used,
299 					&mem_regions->mem_regions
300 					[mem_regions->num_mem_regions].cpu_visible_used);
301 			}
302 
303 			mem_regions->mem_regions[mem_regions->num_mem_regions].cpu_visible_size =
304 				xe_ttm_vram_get_cpu_visible_size(man);
305 			mem_regions->num_mem_regions++;
306 		}
307 	}
308 
309 	if (!copy_to_user(query_ptr, mem_regions, size))
310 		ret = 0;
311 	else
312 		ret = -ENOSPC;
313 
314 	kfree(mem_regions);
315 	return ret;
316 }
317 
318 static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
319 {
320 	const u32 num_params = DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1;
321 	size_t size =
322 		sizeof(struct drm_xe_query_config) + num_params * sizeof(u64);
323 	struct drm_xe_query_config __user *query_ptr =
324 		u64_to_user_ptr(query->data);
325 	struct drm_xe_query_config *config;
326 
327 	if (query->size == 0) {
328 		query->size = size;
329 		return 0;
330 	} else if (XE_IOCTL_DBG(xe, query->size != size)) {
331 		return -EINVAL;
332 	}
333 
334 	config = kzalloc(size, GFP_KERNEL);
335 	if (!config)
336 		return -ENOMEM;
337 
338 	config->num_params = num_params;
339 	config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] =
340 		xe->info.devid | (xe->info.revid << 16);
341 	if (xe->mem.vram)
342 		config->info[DRM_XE_QUERY_CONFIG_FLAGS] |=
343 			DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM;
344 	if (xe->info.has_usm && IS_ENABLED(CONFIG_DRM_XE_GPUSVM))
345 		config->info[DRM_XE_QUERY_CONFIG_FLAGS] |=
346 			DRM_XE_QUERY_CONFIG_FLAG_HAS_CPU_ADDR_MIRROR;
347 	config->info[DRM_XE_QUERY_CONFIG_FLAGS] |=
348 			DRM_XE_QUERY_CONFIG_FLAG_HAS_LOW_LATENCY;
349 	config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] =
350 		xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
351 	config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
352 	config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] =
353 		xe_exec_queue_device_get_max_priority(xe);
354 
355 	if (copy_to_user(query_ptr, config, size)) {
356 		kfree(config);
357 		return -EFAULT;
358 	}
359 	kfree(config);
360 
361 	return 0;
362 }
363 
364 static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query)
365 {
366 	struct xe_gt *gt;
367 	size_t size = sizeof(struct drm_xe_query_gt_list) +
368 		xe->info.gt_count * sizeof(struct drm_xe_gt);
369 	struct drm_xe_query_gt_list __user *query_ptr =
370 		u64_to_user_ptr(query->data);
371 	struct drm_xe_query_gt_list *gt_list;
372 	int iter = 0;
373 	u8 id;
374 
375 	if (query->size == 0) {
376 		query->size = size;
377 		return 0;
378 	} else if (XE_IOCTL_DBG(xe, query->size != size)) {
379 		return -EINVAL;
380 	}
381 
382 	gt_list = kzalloc(size, GFP_KERNEL);
383 	if (!gt_list)
384 		return -ENOMEM;
385 
386 	gt_list->num_gt = xe->info.gt_count;
387 
388 	for_each_gt(gt, xe, id) {
389 		if (xe_gt_is_media_type(gt))
390 			gt_list->gt_list[iter].type = DRM_XE_QUERY_GT_TYPE_MEDIA;
391 		else
392 			gt_list->gt_list[iter].type = DRM_XE_QUERY_GT_TYPE_MAIN;
393 		gt_list->gt_list[iter].tile_id = gt_to_tile(gt)->id;
394 		gt_list->gt_list[iter].gt_id = gt->info.id;
395 		gt_list->gt_list[iter].reference_clock = gt->info.reference_clock;
396 		/*
397 		 * The mem_regions indexes in the mask below need to
398 		 * directly identify the struct
399 		 * drm_xe_query_mem_regions' instance constructed at
400 		 * query_mem_regions()
401 		 *
402 		 * For our current platforms:
403 		 * Bit 0 -> System Memory
404 		 * Bit 1 -> VRAM0 on Tile0
405 		 * Bit 2 -> VRAM1 on Tile1
406 		 * However the uAPI is generic and it's userspace's
407 		 * responsibility to check the mem_class, without any
408 		 * assumption.
409 		 */
410 		if (!IS_DGFX(xe))
411 			gt_list->gt_list[iter].near_mem_regions = 0x1;
412 		else
413 			gt_list->gt_list[iter].near_mem_regions =
414 				BIT(gt_to_tile(gt)->mem.vram->id) << 1;
415 		gt_list->gt_list[iter].far_mem_regions = xe->info.mem_region_mask ^
416 			gt_list->gt_list[iter].near_mem_regions;
417 
418 		gt_list->gt_list[iter].ip_ver_major =
419 			REG_FIELD_GET(GMD_ID_ARCH_MASK, gt->info.gmdid);
420 		gt_list->gt_list[iter].ip_ver_minor =
421 			REG_FIELD_GET(GMD_ID_RELEASE_MASK, gt->info.gmdid);
422 		gt_list->gt_list[iter].ip_ver_rev =
423 			REG_FIELD_GET(GMD_ID_REVID, gt->info.gmdid);
424 
425 		iter++;
426 	}
427 
428 	if (copy_to_user(query_ptr, gt_list, size)) {
429 		kfree(gt_list);
430 		return -EFAULT;
431 	}
432 	kfree(gt_list);
433 
434 	return 0;
435 }
436 
437 static int query_hwconfig(struct xe_device *xe,
438 			  struct drm_xe_device_query *query)
439 {
440 	struct xe_gt *gt = xe_root_mmio_gt(xe);
441 	size_t size = xe_guc_hwconfig_size(&gt->uc.guc);
442 	void __user *query_ptr = u64_to_user_ptr(query->data);
443 	void *hwconfig;
444 
445 	if (query->size == 0) {
446 		query->size = size;
447 		return 0;
448 	} else if (XE_IOCTL_DBG(xe, query->size != size)) {
449 		return -EINVAL;
450 	}
451 
452 	hwconfig = kzalloc(size, GFP_KERNEL);
453 	if (!hwconfig)
454 		return -ENOMEM;
455 
456 	xe_guc_hwconfig_copy(&gt->uc.guc, hwconfig);
457 
458 	if (copy_to_user(query_ptr, hwconfig, size)) {
459 		kfree(hwconfig);
460 		return -EFAULT;
461 	}
462 	kfree(hwconfig);
463 
464 	return 0;
465 }
466 
467 static size_t calc_topo_query_size(struct xe_device *xe)
468 {
469 	struct xe_gt *gt;
470 	size_t query_size = 0;
471 	int id;
472 
473 	for_each_gt(gt, xe, id) {
474 		query_size += 3 * sizeof(struct drm_xe_query_topology_mask) +
475 			sizeof_field(struct xe_gt, fuse_topo.g_dss_mask) +
476 			sizeof_field(struct xe_gt, fuse_topo.c_dss_mask) +
477 			sizeof_field(struct xe_gt, fuse_topo.eu_mask_per_dss);
478 
479 		/* L3bank mask may not be available for some GTs */
480 		if (!XE_GT_WA(gt, no_media_l3))
481 			query_size += sizeof(struct drm_xe_query_topology_mask) +
482 				sizeof_field(struct xe_gt, fuse_topo.l3_bank_mask);
483 	}
484 
485 	return query_size;
486 }
487 
488 static int copy_mask(void __user **ptr,
489 		     struct drm_xe_query_topology_mask *topo,
490 		     void *mask, size_t mask_size)
491 {
492 	topo->num_bytes = mask_size;
493 
494 	if (copy_to_user(*ptr, topo, sizeof(*topo)))
495 		return -EFAULT;
496 	*ptr += sizeof(topo);
497 
498 	if (copy_to_user(*ptr, mask, mask_size))
499 		return -EFAULT;
500 	*ptr += mask_size;
501 
502 	return 0;
503 }
504 
505 static int query_gt_topology(struct xe_device *xe,
506 			     struct drm_xe_device_query *query)
507 {
508 	void __user *query_ptr = u64_to_user_ptr(query->data);
509 	size_t size = calc_topo_query_size(xe);
510 	struct drm_xe_query_topology_mask topo;
511 	struct xe_gt *gt;
512 	int id;
513 
514 	if (query->size == 0) {
515 		query->size = size;
516 		return 0;
517 	} else if (XE_IOCTL_DBG(xe, query->size != size)) {
518 		return -EINVAL;
519 	}
520 
521 	for_each_gt(gt, xe, id) {
522 		int err;
523 
524 		topo.gt_id = id;
525 
526 		topo.type = DRM_XE_TOPO_DSS_GEOMETRY;
527 		err = copy_mask(&query_ptr, &topo, gt->fuse_topo.g_dss_mask,
528 				sizeof(gt->fuse_topo.g_dss_mask));
529 		if (err)
530 			return err;
531 
532 		topo.type = DRM_XE_TOPO_DSS_COMPUTE;
533 		err = copy_mask(&query_ptr, &topo, gt->fuse_topo.c_dss_mask,
534 				sizeof(gt->fuse_topo.c_dss_mask));
535 		if (err)
536 			return err;
537 
538 		/*
539 		 * If the kernel doesn't have a way to obtain a correct L3bank
540 		 * mask, then it's better to omit L3 from the query rather than
541 		 * reporting bogus or zeroed information to userspace.
542 		 */
543 		if (!XE_GT_WA(gt, no_media_l3)) {
544 			topo.type = DRM_XE_TOPO_L3_BANK;
545 			err = copy_mask(&query_ptr, &topo, gt->fuse_topo.l3_bank_mask,
546 					sizeof(gt->fuse_topo.l3_bank_mask));
547 			if (err)
548 				return err;
549 		}
550 
551 		topo.type = gt->fuse_topo.eu_type == XE_GT_EU_TYPE_SIMD16 ?
552 			DRM_XE_TOPO_SIMD16_EU_PER_DSS :
553 			DRM_XE_TOPO_EU_PER_DSS;
554 		err = copy_mask(&query_ptr, &topo,
555 				gt->fuse_topo.eu_mask_per_dss,
556 				sizeof(gt->fuse_topo.eu_mask_per_dss));
557 		if (err)
558 			return err;
559 	}
560 
561 	return 0;
562 }
563 
564 static int
565 query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query)
566 {
567 	struct drm_xe_query_uc_fw_version __user *query_ptr = u64_to_user_ptr(query->data);
568 	size_t size = sizeof(struct drm_xe_query_uc_fw_version);
569 	struct drm_xe_query_uc_fw_version resp;
570 	struct xe_uc_fw_version *version = NULL;
571 
572 	if (query->size == 0) {
573 		query->size = size;
574 		return 0;
575 	} else if (XE_IOCTL_DBG(xe, query->size != size)) {
576 		return -EINVAL;
577 	}
578 
579 	if (copy_from_user(&resp, query_ptr, size))
580 		return -EFAULT;
581 
582 	if (XE_IOCTL_DBG(xe, resp.pad || resp.pad2 || resp.reserved))
583 		return -EINVAL;
584 
585 	switch (resp.uc_type) {
586 	case XE_QUERY_UC_TYPE_GUC_SUBMISSION: {
587 		struct xe_guc *guc = &xe->tiles[0].primary_gt->uc.guc;
588 
589 		version = &guc->fw.versions.found[XE_UC_FW_VER_COMPATIBILITY];
590 		break;
591 	}
592 	case XE_QUERY_UC_TYPE_HUC: {
593 		struct xe_gt *media_gt = NULL;
594 		struct xe_huc *huc;
595 
596 		if (MEDIA_VER(xe) >= 13) {
597 			struct xe_tile *tile;
598 			u8 gt_id;
599 
600 			for_each_tile(tile, xe, gt_id) {
601 				if (tile->media_gt) {
602 					media_gt = tile->media_gt;
603 					break;
604 				}
605 			}
606 		} else {
607 			media_gt = xe->tiles[0].primary_gt;
608 		}
609 
610 		if (!media_gt)
611 			break;
612 
613 		huc = &media_gt->uc.huc;
614 		if (huc->fw.status == XE_UC_FIRMWARE_RUNNING)
615 			version = &huc->fw.versions.found[XE_UC_FW_VER_RELEASE];
616 		break;
617 	}
618 	default:
619 		return -EINVAL;
620 	}
621 
622 	if (version) {
623 		resp.branch_ver = 0;
624 		resp.major_ver = version->major;
625 		resp.minor_ver = version->minor;
626 		resp.patch_ver = version->patch;
627 	} else {
628 		return -ENODEV;
629 	}
630 
631 	if (copy_to_user(query_ptr, &resp, size))
632 		return -EFAULT;
633 
634 	return 0;
635 }
636 
637 static size_t calc_oa_unit_query_size(struct xe_device *xe)
638 {
639 	size_t size = sizeof(struct drm_xe_query_oa_units);
640 	struct xe_gt *gt;
641 	int i, id;
642 
643 	for_each_gt(gt, xe, id) {
644 		for (i = 0; i < gt->oa.num_oa_units; i++) {
645 			size += sizeof(struct drm_xe_oa_unit);
646 			size += gt->oa.oa_unit[i].num_engines *
647 				sizeof(struct drm_xe_engine_class_instance);
648 		}
649 	}
650 
651 	return size;
652 }
653 
654 static int query_oa_units(struct xe_device *xe,
655 			  struct drm_xe_device_query *query)
656 {
657 	void __user *query_ptr = u64_to_user_ptr(query->data);
658 	size_t size = calc_oa_unit_query_size(xe);
659 	struct drm_xe_query_oa_units *qoa;
660 	enum xe_hw_engine_id hwe_id;
661 	struct drm_xe_oa_unit *du;
662 	struct xe_hw_engine *hwe;
663 	struct xe_oa_unit *u;
664 	int gt_id, i, j, ret;
665 	struct xe_gt *gt;
666 	u8 *pdu;
667 
668 	if (query->size == 0) {
669 		query->size = size;
670 		return 0;
671 	} else if (XE_IOCTL_DBG(xe, query->size != size)) {
672 		return -EINVAL;
673 	}
674 
675 	qoa = kzalloc(size, GFP_KERNEL);
676 	if (!qoa)
677 		return -ENOMEM;
678 
679 	pdu = (u8 *)&qoa->oa_units[0];
680 	for_each_gt(gt, xe, gt_id) {
681 		for (i = 0; i < gt->oa.num_oa_units; i++) {
682 			u = &gt->oa.oa_unit[i];
683 			du = (struct drm_xe_oa_unit *)pdu;
684 
685 			du->oa_unit_id = u->oa_unit_id;
686 			du->oa_unit_type = u->type;
687 			du->oa_timestamp_freq = xe_oa_timestamp_frequency(gt);
688 			du->capabilities = DRM_XE_OA_CAPS_BASE | DRM_XE_OA_CAPS_SYNCS |
689 					   DRM_XE_OA_CAPS_OA_BUFFER_SIZE |
690 					   DRM_XE_OA_CAPS_WAIT_NUM_REPORTS |
691 					   DRM_XE_OA_CAPS_OAM;
692 			j = 0;
693 			for_each_hw_engine(hwe, gt, hwe_id) {
694 				if (!xe_hw_engine_is_reserved(hwe) &&
695 				    xe_oa_unit_id(hwe) == u->oa_unit_id) {
696 					du->eci[j].engine_class =
697 						xe_to_user_engine_class[hwe->class];
698 					du->eci[j].engine_instance = hwe->logical_instance;
699 					du->eci[j].gt_id = gt->info.id;
700 					j++;
701 				}
702 			}
703 			du->num_engines = j;
704 			pdu += sizeof(*du) + j * sizeof(du->eci[0]);
705 			qoa->num_oa_units++;
706 		}
707 	}
708 
709 	ret = copy_to_user(query_ptr, qoa, size);
710 	kfree(qoa);
711 
712 	return ret ? -EFAULT : 0;
713 }
714 
715 static int query_pxp_status(struct xe_device *xe, struct drm_xe_device_query *query)
716 {
717 	struct drm_xe_query_pxp_status __user *query_ptr = u64_to_user_ptr(query->data);
718 	size_t size = sizeof(struct drm_xe_query_pxp_status);
719 	struct drm_xe_query_pxp_status resp = { 0 };
720 	int ret;
721 
722 	if (query->size == 0) {
723 		query->size = size;
724 		return 0;
725 	} else if (XE_IOCTL_DBG(xe, query->size != size)) {
726 		return -EINVAL;
727 	}
728 
729 	ret = xe_pxp_get_readiness_status(xe->pxp);
730 	if (ret < 0)
731 		return ret;
732 
733 	resp.status = ret;
734 	resp.supported_session_types = BIT(DRM_XE_PXP_TYPE_HWDRM);
735 
736 	if (copy_to_user(query_ptr, &resp, size))
737 		return -EFAULT;
738 
739 	return 0;
740 }
741 
742 static int query_eu_stall(struct xe_device *xe,
743 			  struct drm_xe_device_query *query)
744 {
745 	void __user *query_ptr = u64_to_user_ptr(query->data);
746 	struct drm_xe_query_eu_stall *info;
747 	size_t size, array_size;
748 	const u64 *rates;
749 	u32 num_rates;
750 	int ret;
751 
752 	if (!xe_eu_stall_supported_on_platform(xe))
753 		return -ENODEV;
754 
755 	array_size = xe_eu_stall_get_sampling_rates(&num_rates, &rates);
756 	size = sizeof(struct drm_xe_query_eu_stall) + array_size;
757 
758 	if (query->size == 0) {
759 		query->size = size;
760 		return 0;
761 	} else if (XE_IOCTL_DBG(xe, query->size != size)) {
762 		return -EINVAL;
763 	}
764 
765 	info = kzalloc(size, GFP_KERNEL);
766 	if (!info)
767 		return -ENOMEM;
768 
769 	info->num_sampling_rates = num_rates;
770 	info->capabilities = DRM_XE_EU_STALL_CAPS_BASE;
771 	info->record_size = xe_eu_stall_data_record_size(xe);
772 	info->per_xecore_buf_size = xe_eu_stall_get_per_xecore_buf_size();
773 	memcpy(info->sampling_rates, rates, array_size);
774 
775 	ret = copy_to_user(query_ptr, info, size);
776 	kfree(info);
777 
778 	return ret ? -EFAULT : 0;
779 }
780 
781 static int (* const xe_query_funcs[])(struct xe_device *xe,
782 				      struct drm_xe_device_query *query) = {
783 	query_engines,
784 	query_mem_regions,
785 	query_config,
786 	query_gt_list,
787 	query_hwconfig,
788 	query_gt_topology,
789 	query_engine_cycles,
790 	query_uc_fw_version,
791 	query_oa_units,
792 	query_pxp_status,
793 	query_eu_stall,
794 };
795 
796 int xe_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
797 {
798 	struct xe_device *xe = to_xe_device(dev);
799 	struct drm_xe_device_query *query = data;
800 	u32 idx;
801 
802 	if (XE_IOCTL_DBG(xe, query->extensions) ||
803 	    XE_IOCTL_DBG(xe, query->reserved[0] || query->reserved[1]))
804 		return -EINVAL;
805 
806 	if (XE_IOCTL_DBG(xe, query->query >= ARRAY_SIZE(xe_query_funcs)))
807 		return -EINVAL;
808 
809 	idx = array_index_nospec(query->query, ARRAY_SIZE(xe_query_funcs));
810 	if (XE_IOCTL_DBG(xe, !xe_query_funcs[idx]))
811 		return -EINVAL;
812 
813 	return xe_query_funcs[idx](xe, query);
814 }
815