1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2022 Intel Corporation 4 */ 5 6 #include "xe_query.h" 7 8 #include <linux/nospec.h> 9 #include <linux/sched/clock.h> 10 11 #include <drm/ttm/ttm_placement.h> 12 #include <generated/xe_wa_oob.h> 13 #include <uapi/drm/xe_drm.h> 14 15 #include "regs/xe_engine_regs.h" 16 #include "regs/xe_gt_regs.h" 17 #include "xe_bo.h" 18 #include "xe_device.h" 19 #include "xe_exec_queue.h" 20 #include "xe_force_wake.h" 21 #include "xe_ggtt.h" 22 #include "xe_gt.h" 23 #include "xe_guc_hwconfig.h" 24 #include "xe_macros.h" 25 #include "xe_mmio.h" 26 #include "xe_oa.h" 27 #include "xe_pxp.h" 28 #include "xe_ttm_vram_mgr.h" 29 #include "xe_wa.h" 30 31 static const u16 xe_to_user_engine_class[] = { 32 [XE_ENGINE_CLASS_RENDER] = DRM_XE_ENGINE_CLASS_RENDER, 33 [XE_ENGINE_CLASS_COPY] = DRM_XE_ENGINE_CLASS_COPY, 34 [XE_ENGINE_CLASS_VIDEO_DECODE] = DRM_XE_ENGINE_CLASS_VIDEO_DECODE, 35 [XE_ENGINE_CLASS_VIDEO_ENHANCE] = DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE, 36 [XE_ENGINE_CLASS_COMPUTE] = DRM_XE_ENGINE_CLASS_COMPUTE, 37 }; 38 39 static const enum xe_engine_class user_to_xe_engine_class[] = { 40 [DRM_XE_ENGINE_CLASS_RENDER] = XE_ENGINE_CLASS_RENDER, 41 [DRM_XE_ENGINE_CLASS_COPY] = XE_ENGINE_CLASS_COPY, 42 [DRM_XE_ENGINE_CLASS_VIDEO_DECODE] = XE_ENGINE_CLASS_VIDEO_DECODE, 43 [DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE] = XE_ENGINE_CLASS_VIDEO_ENHANCE, 44 [DRM_XE_ENGINE_CLASS_COMPUTE] = XE_ENGINE_CLASS_COMPUTE, 45 }; 46 47 static size_t calc_hw_engine_info_size(struct xe_device *xe) 48 { 49 struct xe_hw_engine *hwe; 50 enum xe_hw_engine_id id; 51 struct xe_gt *gt; 52 u8 gt_id; 53 int i = 0; 54 55 for_each_gt(gt, xe, gt_id) 56 for_each_hw_engine(hwe, gt, id) { 57 if (xe_hw_engine_is_reserved(hwe)) 58 continue; 59 i++; 60 } 61 62 return sizeof(struct drm_xe_query_engines) + 63 i * sizeof(struct drm_xe_engine); 64 } 65 66 typedef u64 (*__ktime_func_t)(void); 67 static __ktime_func_t __clock_id_to_func(clockid_t clk_id) 68 { 69 /* 70 * Use logic same as the perf subsystem to allow user to select the 71 * reference clock id to be used for timestamps. 72 */ 73 switch (clk_id) { 74 case CLOCK_MONOTONIC: 75 return &ktime_get_ns; 76 case CLOCK_MONOTONIC_RAW: 77 return &ktime_get_raw_ns; 78 case CLOCK_REALTIME: 79 return &ktime_get_real_ns; 80 case CLOCK_BOOTTIME: 81 return &ktime_get_boottime_ns; 82 case CLOCK_TAI: 83 return &ktime_get_clocktai_ns; 84 default: 85 return NULL; 86 } 87 } 88 89 static void 90 hwe_read_timestamp(struct xe_hw_engine *hwe, u64 *engine_ts, u64 *cpu_ts, 91 u64 *cpu_delta, __ktime_func_t cpu_clock) 92 { 93 struct xe_mmio *mmio = &hwe->gt->mmio; 94 u32 upper, lower, old_upper, loop = 0; 95 struct xe_reg upper_reg = RING_TIMESTAMP_UDW(hwe->mmio_base), 96 lower_reg = RING_TIMESTAMP(hwe->mmio_base); 97 98 upper = xe_mmio_read32(mmio, upper_reg); 99 do { 100 *cpu_delta = local_clock(); 101 *cpu_ts = cpu_clock(); 102 lower = xe_mmio_read32(mmio, lower_reg); 103 *cpu_delta = local_clock() - *cpu_delta; 104 old_upper = upper; 105 upper = xe_mmio_read32(mmio, upper_reg); 106 } while (upper != old_upper && loop++ < 2); 107 108 *engine_ts = (u64)upper << 32 | lower; 109 } 110 111 static int 112 query_engine_cycles(struct xe_device *xe, 113 struct drm_xe_device_query *query) 114 { 115 struct drm_xe_query_engine_cycles __user *query_ptr; 116 struct drm_xe_engine_class_instance *eci; 117 struct drm_xe_query_engine_cycles resp; 118 size_t size = sizeof(resp); 119 __ktime_func_t cpu_clock; 120 struct xe_hw_engine *hwe; 121 struct xe_gt *gt; 122 unsigned int fw_ref; 123 124 if (query->size == 0) { 125 query->size = size; 126 return 0; 127 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 128 return -EINVAL; 129 } 130 131 query_ptr = u64_to_user_ptr(query->data); 132 if (copy_from_user(&resp, query_ptr, size)) 133 return -EFAULT; 134 135 cpu_clock = __clock_id_to_func(resp.clockid); 136 if (!cpu_clock) 137 return -EINVAL; 138 139 eci = &resp.eci; 140 if (eci->gt_id >= XE_MAX_GT_PER_TILE) 141 return -EINVAL; 142 143 gt = xe_device_get_gt(xe, eci->gt_id); 144 if (!gt) 145 return -EINVAL; 146 147 if (eci->engine_class >= ARRAY_SIZE(user_to_xe_engine_class)) 148 return -EINVAL; 149 150 hwe = xe_gt_hw_engine(gt, user_to_xe_engine_class[eci->engine_class], 151 eci->engine_instance, true); 152 if (!hwe) 153 return -EINVAL; 154 155 fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL); 156 if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL)) { 157 xe_force_wake_put(gt_to_fw(gt), fw_ref); 158 return -EIO; 159 } 160 161 hwe_read_timestamp(hwe, &resp.engine_cycles, &resp.cpu_timestamp, 162 &resp.cpu_delta, cpu_clock); 163 164 xe_force_wake_put(gt_to_fw(gt), fw_ref); 165 166 if (GRAPHICS_VER(xe) >= 20) 167 resp.width = 64; 168 else 169 resp.width = 36; 170 171 /* Only write to the output fields of user query */ 172 if (put_user(resp.cpu_timestamp, &query_ptr->cpu_timestamp) || 173 put_user(resp.cpu_delta, &query_ptr->cpu_delta) || 174 put_user(resp.engine_cycles, &query_ptr->engine_cycles) || 175 put_user(resp.width, &query_ptr->width)) 176 return -EFAULT; 177 178 return 0; 179 } 180 181 static int query_engines(struct xe_device *xe, 182 struct drm_xe_device_query *query) 183 { 184 size_t size = calc_hw_engine_info_size(xe); 185 struct drm_xe_query_engines __user *query_ptr = 186 u64_to_user_ptr(query->data); 187 struct drm_xe_query_engines *engines; 188 struct xe_hw_engine *hwe; 189 enum xe_hw_engine_id id; 190 struct xe_gt *gt; 191 u8 gt_id; 192 int i = 0; 193 194 if (query->size == 0) { 195 query->size = size; 196 return 0; 197 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 198 return -EINVAL; 199 } 200 201 engines = kzalloc(size, GFP_KERNEL); 202 if (!engines) 203 return -ENOMEM; 204 205 for_each_gt(gt, xe, gt_id) 206 for_each_hw_engine(hwe, gt, id) { 207 if (xe_hw_engine_is_reserved(hwe)) 208 continue; 209 210 engines->engines[i].instance.engine_class = 211 xe_to_user_engine_class[hwe->class]; 212 engines->engines[i].instance.engine_instance = 213 hwe->logical_instance; 214 engines->engines[i].instance.gt_id = gt->info.id; 215 216 i++; 217 } 218 219 engines->num_engines = i; 220 221 if (copy_to_user(query_ptr, engines, size)) { 222 kfree(engines); 223 return -EFAULT; 224 } 225 kfree(engines); 226 227 return 0; 228 } 229 230 static size_t calc_mem_regions_size(struct xe_device *xe) 231 { 232 u32 num_managers = 1; 233 int i; 234 235 for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i) 236 if (ttm_manager_type(&xe->ttm, i)) 237 num_managers++; 238 239 return offsetof(struct drm_xe_query_mem_regions, mem_regions[num_managers]); 240 } 241 242 static int query_mem_regions(struct xe_device *xe, 243 struct drm_xe_device_query *query) 244 { 245 size_t size = calc_mem_regions_size(xe); 246 struct drm_xe_query_mem_regions *mem_regions; 247 struct drm_xe_query_mem_regions __user *query_ptr = 248 u64_to_user_ptr(query->data); 249 struct ttm_resource_manager *man; 250 int ret, i; 251 252 if (query->size == 0) { 253 query->size = size; 254 return 0; 255 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 256 return -EINVAL; 257 } 258 259 mem_regions = kzalloc(size, GFP_KERNEL); 260 if (XE_IOCTL_DBG(xe, !mem_regions)) 261 return -ENOMEM; 262 263 man = ttm_manager_type(&xe->ttm, XE_PL_TT); 264 mem_regions->mem_regions[0].mem_class = DRM_XE_MEM_REGION_CLASS_SYSMEM; 265 /* 266 * The instance needs to be a unique number that represents the index 267 * in the placement mask used at xe_gem_create_ioctl() for the 268 * xe_bo_create() placement. 269 */ 270 mem_regions->mem_regions[0].instance = 0; 271 mem_regions->mem_regions[0].min_page_size = PAGE_SIZE; 272 mem_regions->mem_regions[0].total_size = man->size << PAGE_SHIFT; 273 if (perfmon_capable()) 274 mem_regions->mem_regions[0].used = ttm_resource_manager_usage(man); 275 mem_regions->num_mem_regions = 1; 276 277 for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i) { 278 man = ttm_manager_type(&xe->ttm, i); 279 if (man) { 280 mem_regions->mem_regions[mem_regions->num_mem_regions].mem_class = 281 DRM_XE_MEM_REGION_CLASS_VRAM; 282 mem_regions->mem_regions[mem_regions->num_mem_regions].instance = 283 mem_regions->num_mem_regions; 284 mem_regions->mem_regions[mem_regions->num_mem_regions].min_page_size = 285 xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? 286 SZ_64K : PAGE_SIZE; 287 mem_regions->mem_regions[mem_regions->num_mem_regions].total_size = 288 man->size; 289 290 if (perfmon_capable()) { 291 xe_ttm_vram_get_used(man, 292 &mem_regions->mem_regions 293 [mem_regions->num_mem_regions].used, 294 &mem_regions->mem_regions 295 [mem_regions->num_mem_regions].cpu_visible_used); 296 } 297 298 mem_regions->mem_regions[mem_regions->num_mem_regions].cpu_visible_size = 299 xe_ttm_vram_get_cpu_visible_size(man); 300 mem_regions->num_mem_regions++; 301 } 302 } 303 304 if (!copy_to_user(query_ptr, mem_regions, size)) 305 ret = 0; 306 else 307 ret = -ENOSPC; 308 309 kfree(mem_regions); 310 return ret; 311 } 312 313 static int query_config(struct xe_device *xe, struct drm_xe_device_query *query) 314 { 315 const u32 num_params = DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1; 316 size_t size = 317 sizeof(struct drm_xe_query_config) + num_params * sizeof(u64); 318 struct drm_xe_query_config __user *query_ptr = 319 u64_to_user_ptr(query->data); 320 struct drm_xe_query_config *config; 321 322 if (query->size == 0) { 323 query->size = size; 324 return 0; 325 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 326 return -EINVAL; 327 } 328 329 config = kzalloc(size, GFP_KERNEL); 330 if (!config) 331 return -ENOMEM; 332 333 config->num_params = num_params; 334 config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] = 335 xe->info.devid | (xe->info.revid << 16); 336 if (xe_device_get_root_tile(xe)->mem.vram.usable_size) 337 config->info[DRM_XE_QUERY_CONFIG_FLAGS] = 338 DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM; 339 config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] = 340 xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K; 341 config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits; 342 config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] = 343 xe_exec_queue_device_get_max_priority(xe); 344 345 if (copy_to_user(query_ptr, config, size)) { 346 kfree(config); 347 return -EFAULT; 348 } 349 kfree(config); 350 351 return 0; 352 } 353 354 static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query) 355 { 356 struct xe_gt *gt; 357 size_t size = sizeof(struct drm_xe_query_gt_list) + 358 xe->info.gt_count * sizeof(struct drm_xe_gt); 359 struct drm_xe_query_gt_list __user *query_ptr = 360 u64_to_user_ptr(query->data); 361 struct drm_xe_query_gt_list *gt_list; 362 u8 id; 363 364 if (query->size == 0) { 365 query->size = size; 366 return 0; 367 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 368 return -EINVAL; 369 } 370 371 gt_list = kzalloc(size, GFP_KERNEL); 372 if (!gt_list) 373 return -ENOMEM; 374 375 gt_list->num_gt = xe->info.gt_count; 376 377 for_each_gt(gt, xe, id) { 378 if (xe_gt_is_media_type(gt)) 379 gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MEDIA; 380 else 381 gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN; 382 gt_list->gt_list[id].tile_id = gt_to_tile(gt)->id; 383 gt_list->gt_list[id].gt_id = gt->info.id; 384 gt_list->gt_list[id].reference_clock = gt->info.reference_clock; 385 /* 386 * The mem_regions indexes in the mask below need to 387 * directly identify the struct 388 * drm_xe_query_mem_regions' instance constructed at 389 * query_mem_regions() 390 * 391 * For our current platforms: 392 * Bit 0 -> System Memory 393 * Bit 1 -> VRAM0 on Tile0 394 * Bit 2 -> VRAM1 on Tile1 395 * However the uAPI is generic and it's userspace's 396 * responsibility to check the mem_class, without any 397 * assumption. 398 */ 399 if (!IS_DGFX(xe)) 400 gt_list->gt_list[id].near_mem_regions = 0x1; 401 else 402 gt_list->gt_list[id].near_mem_regions = 403 BIT(gt_to_tile(gt)->id) << 1; 404 gt_list->gt_list[id].far_mem_regions = xe->info.mem_region_mask ^ 405 gt_list->gt_list[id].near_mem_regions; 406 407 gt_list->gt_list[id].ip_ver_major = 408 REG_FIELD_GET(GMD_ID_ARCH_MASK, gt->info.gmdid); 409 gt_list->gt_list[id].ip_ver_minor = 410 REG_FIELD_GET(GMD_ID_RELEASE_MASK, gt->info.gmdid); 411 gt_list->gt_list[id].ip_ver_rev = 412 REG_FIELD_GET(GMD_ID_REVID, gt->info.gmdid); 413 } 414 415 if (copy_to_user(query_ptr, gt_list, size)) { 416 kfree(gt_list); 417 return -EFAULT; 418 } 419 kfree(gt_list); 420 421 return 0; 422 } 423 424 static int query_hwconfig(struct xe_device *xe, 425 struct drm_xe_device_query *query) 426 { 427 struct xe_gt *gt = xe_root_mmio_gt(xe); 428 size_t size = xe_guc_hwconfig_size(>->uc.guc); 429 void __user *query_ptr = u64_to_user_ptr(query->data); 430 void *hwconfig; 431 432 if (query->size == 0) { 433 query->size = size; 434 return 0; 435 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 436 return -EINVAL; 437 } 438 439 hwconfig = kzalloc(size, GFP_KERNEL); 440 if (!hwconfig) 441 return -ENOMEM; 442 443 xe_guc_hwconfig_copy(>->uc.guc, hwconfig); 444 445 if (copy_to_user(query_ptr, hwconfig, size)) { 446 kfree(hwconfig); 447 return -EFAULT; 448 } 449 kfree(hwconfig); 450 451 return 0; 452 } 453 454 static size_t calc_topo_query_size(struct xe_device *xe) 455 { 456 struct xe_gt *gt; 457 size_t query_size = 0; 458 int id; 459 460 for_each_gt(gt, xe, id) { 461 query_size += 3 * sizeof(struct drm_xe_query_topology_mask) + 462 sizeof_field(struct xe_gt, fuse_topo.g_dss_mask) + 463 sizeof_field(struct xe_gt, fuse_topo.c_dss_mask) + 464 sizeof_field(struct xe_gt, fuse_topo.eu_mask_per_dss); 465 466 /* L3bank mask may not be available for some GTs */ 467 if (!XE_WA(gt, no_media_l3)) 468 query_size += sizeof(struct drm_xe_query_topology_mask) + 469 sizeof_field(struct xe_gt, fuse_topo.l3_bank_mask); 470 } 471 472 return query_size; 473 } 474 475 static int copy_mask(void __user **ptr, 476 struct drm_xe_query_topology_mask *topo, 477 void *mask, size_t mask_size) 478 { 479 topo->num_bytes = mask_size; 480 481 if (copy_to_user(*ptr, topo, sizeof(*topo))) 482 return -EFAULT; 483 *ptr += sizeof(topo); 484 485 if (copy_to_user(*ptr, mask, mask_size)) 486 return -EFAULT; 487 *ptr += mask_size; 488 489 return 0; 490 } 491 492 static int query_gt_topology(struct xe_device *xe, 493 struct drm_xe_device_query *query) 494 { 495 void __user *query_ptr = u64_to_user_ptr(query->data); 496 size_t size = calc_topo_query_size(xe); 497 struct drm_xe_query_topology_mask topo; 498 struct xe_gt *gt; 499 int id; 500 501 if (query->size == 0) { 502 query->size = size; 503 return 0; 504 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 505 return -EINVAL; 506 } 507 508 for_each_gt(gt, xe, id) { 509 int err; 510 511 topo.gt_id = id; 512 513 topo.type = DRM_XE_TOPO_DSS_GEOMETRY; 514 err = copy_mask(&query_ptr, &topo, gt->fuse_topo.g_dss_mask, 515 sizeof(gt->fuse_topo.g_dss_mask)); 516 if (err) 517 return err; 518 519 topo.type = DRM_XE_TOPO_DSS_COMPUTE; 520 err = copy_mask(&query_ptr, &topo, gt->fuse_topo.c_dss_mask, 521 sizeof(gt->fuse_topo.c_dss_mask)); 522 if (err) 523 return err; 524 525 /* 526 * If the kernel doesn't have a way to obtain a correct L3bank 527 * mask, then it's better to omit L3 from the query rather than 528 * reporting bogus or zeroed information to userspace. 529 */ 530 if (!XE_WA(gt, no_media_l3)) { 531 topo.type = DRM_XE_TOPO_L3_BANK; 532 err = copy_mask(&query_ptr, &topo, gt->fuse_topo.l3_bank_mask, 533 sizeof(gt->fuse_topo.l3_bank_mask)); 534 if (err) 535 return err; 536 } 537 538 topo.type = gt->fuse_topo.eu_type == XE_GT_EU_TYPE_SIMD16 ? 539 DRM_XE_TOPO_SIMD16_EU_PER_DSS : 540 DRM_XE_TOPO_EU_PER_DSS; 541 err = copy_mask(&query_ptr, &topo, 542 gt->fuse_topo.eu_mask_per_dss, 543 sizeof(gt->fuse_topo.eu_mask_per_dss)); 544 if (err) 545 return err; 546 } 547 548 return 0; 549 } 550 551 static int 552 query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query) 553 { 554 struct drm_xe_query_uc_fw_version __user *query_ptr = u64_to_user_ptr(query->data); 555 size_t size = sizeof(struct drm_xe_query_uc_fw_version); 556 struct drm_xe_query_uc_fw_version resp; 557 struct xe_uc_fw_version *version = NULL; 558 559 if (query->size == 0) { 560 query->size = size; 561 return 0; 562 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 563 return -EINVAL; 564 } 565 566 if (copy_from_user(&resp, query_ptr, size)) 567 return -EFAULT; 568 569 if (XE_IOCTL_DBG(xe, resp.pad || resp.pad2 || resp.reserved)) 570 return -EINVAL; 571 572 switch (resp.uc_type) { 573 case XE_QUERY_UC_TYPE_GUC_SUBMISSION: { 574 struct xe_guc *guc = &xe->tiles[0].primary_gt->uc.guc; 575 576 version = &guc->fw.versions.found[XE_UC_FW_VER_COMPATIBILITY]; 577 break; 578 } 579 case XE_QUERY_UC_TYPE_HUC: { 580 struct xe_gt *media_gt = NULL; 581 struct xe_huc *huc; 582 583 if (MEDIA_VER(xe) >= 13) { 584 struct xe_tile *tile; 585 u8 gt_id; 586 587 for_each_tile(tile, xe, gt_id) { 588 if (tile->media_gt) { 589 media_gt = tile->media_gt; 590 break; 591 } 592 } 593 } else { 594 media_gt = xe->tiles[0].primary_gt; 595 } 596 597 if (!media_gt) 598 break; 599 600 huc = &media_gt->uc.huc; 601 if (huc->fw.status == XE_UC_FIRMWARE_RUNNING) 602 version = &huc->fw.versions.found[XE_UC_FW_VER_RELEASE]; 603 break; 604 } 605 default: 606 return -EINVAL; 607 } 608 609 if (version) { 610 resp.branch_ver = 0; 611 resp.major_ver = version->major; 612 resp.minor_ver = version->minor; 613 resp.patch_ver = version->patch; 614 } else { 615 return -ENODEV; 616 } 617 618 if (copy_to_user(query_ptr, &resp, size)) 619 return -EFAULT; 620 621 return 0; 622 } 623 624 static size_t calc_oa_unit_query_size(struct xe_device *xe) 625 { 626 size_t size = sizeof(struct drm_xe_query_oa_units); 627 struct xe_gt *gt; 628 int i, id; 629 630 for_each_gt(gt, xe, id) { 631 for (i = 0; i < gt->oa.num_oa_units; i++) { 632 size += sizeof(struct drm_xe_oa_unit); 633 size += gt->oa.oa_unit[i].num_engines * 634 sizeof(struct drm_xe_engine_class_instance); 635 } 636 } 637 638 return size; 639 } 640 641 static int query_oa_units(struct xe_device *xe, 642 struct drm_xe_device_query *query) 643 { 644 void __user *query_ptr = u64_to_user_ptr(query->data); 645 size_t size = calc_oa_unit_query_size(xe); 646 struct drm_xe_query_oa_units *qoa; 647 enum xe_hw_engine_id hwe_id; 648 struct drm_xe_oa_unit *du; 649 struct xe_hw_engine *hwe; 650 struct xe_oa_unit *u; 651 int gt_id, i, j, ret; 652 struct xe_gt *gt; 653 u8 *pdu; 654 655 if (query->size == 0) { 656 query->size = size; 657 return 0; 658 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 659 return -EINVAL; 660 } 661 662 qoa = kzalloc(size, GFP_KERNEL); 663 if (!qoa) 664 return -ENOMEM; 665 666 pdu = (u8 *)&qoa->oa_units[0]; 667 for_each_gt(gt, xe, gt_id) { 668 for (i = 0; i < gt->oa.num_oa_units; i++) { 669 u = >->oa.oa_unit[i]; 670 du = (struct drm_xe_oa_unit *)pdu; 671 672 du->oa_unit_id = u->oa_unit_id; 673 du->oa_unit_type = u->type; 674 du->oa_timestamp_freq = xe_oa_timestamp_frequency(gt); 675 du->capabilities = DRM_XE_OA_CAPS_BASE | DRM_XE_OA_CAPS_SYNCS | 676 DRM_XE_OA_CAPS_OA_BUFFER_SIZE | 677 DRM_XE_OA_CAPS_WAIT_NUM_REPORTS; 678 679 j = 0; 680 for_each_hw_engine(hwe, gt, hwe_id) { 681 if (!xe_hw_engine_is_reserved(hwe) && 682 xe_oa_unit_id(hwe) == u->oa_unit_id) { 683 du->eci[j].engine_class = 684 xe_to_user_engine_class[hwe->class]; 685 du->eci[j].engine_instance = hwe->logical_instance; 686 du->eci[j].gt_id = gt->info.id; 687 j++; 688 } 689 } 690 du->num_engines = j; 691 pdu += sizeof(*du) + j * sizeof(du->eci[0]); 692 qoa->num_oa_units++; 693 } 694 } 695 696 ret = copy_to_user(query_ptr, qoa, size); 697 kfree(qoa); 698 699 return ret ? -EFAULT : 0; 700 } 701 702 static int query_pxp_status(struct xe_device *xe, struct drm_xe_device_query *query) 703 { 704 struct drm_xe_query_pxp_status __user *query_ptr = u64_to_user_ptr(query->data); 705 size_t size = sizeof(struct drm_xe_query_pxp_status); 706 struct drm_xe_query_pxp_status resp = { 0 }; 707 int ret; 708 709 if (query->size == 0) { 710 query->size = size; 711 return 0; 712 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 713 return -EINVAL; 714 } 715 716 ret = xe_pxp_get_readiness_status(xe->pxp); 717 if (ret < 0) 718 return ret; 719 720 resp.status = ret; 721 resp.supported_session_types = BIT(DRM_XE_PXP_TYPE_HWDRM); 722 723 if (copy_to_user(query_ptr, &resp, size)) 724 return -EFAULT; 725 726 return 0; 727 } 728 729 static int (* const xe_query_funcs[])(struct xe_device *xe, 730 struct drm_xe_device_query *query) = { 731 query_engines, 732 query_mem_regions, 733 query_config, 734 query_gt_list, 735 query_hwconfig, 736 query_gt_topology, 737 query_engine_cycles, 738 query_uc_fw_version, 739 query_oa_units, 740 query_pxp_status, 741 }; 742 743 int xe_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file) 744 { 745 struct xe_device *xe = to_xe_device(dev); 746 struct drm_xe_device_query *query = data; 747 u32 idx; 748 749 if (XE_IOCTL_DBG(xe, query->extensions) || 750 XE_IOCTL_DBG(xe, query->reserved[0] || query->reserved[1])) 751 return -EINVAL; 752 753 if (XE_IOCTL_DBG(xe, query->query >= ARRAY_SIZE(xe_query_funcs))) 754 return -EINVAL; 755 756 idx = array_index_nospec(query->query, ARRAY_SIZE(xe_query_funcs)); 757 if (XE_IOCTL_DBG(xe, !xe_query_funcs[idx])) 758 return -EINVAL; 759 760 return xe_query_funcs[idx](xe, query); 761 } 762