1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2022 Intel Corporation 4 */ 5 6 #include "xe_query.h" 7 8 #include <linux/nospec.h> 9 #include <linux/sched/clock.h> 10 11 #include <drm/ttm/ttm_placement.h> 12 #include <drm/xe_drm.h> 13 14 #include "regs/xe_engine_regs.h" 15 #include "regs/xe_gt_regs.h" 16 #include "xe_bo.h" 17 #include "xe_device.h" 18 #include "xe_exec_queue.h" 19 #include "xe_force_wake.h" 20 #include "xe_ggtt.h" 21 #include "xe_gt.h" 22 #include "xe_guc_hwconfig.h" 23 #include "xe_macros.h" 24 #include "xe_mmio.h" 25 #include "xe_ttm_vram_mgr.h" 26 27 static const u16 xe_to_user_engine_class[] = { 28 [XE_ENGINE_CLASS_RENDER] = DRM_XE_ENGINE_CLASS_RENDER, 29 [XE_ENGINE_CLASS_COPY] = DRM_XE_ENGINE_CLASS_COPY, 30 [XE_ENGINE_CLASS_VIDEO_DECODE] = DRM_XE_ENGINE_CLASS_VIDEO_DECODE, 31 [XE_ENGINE_CLASS_VIDEO_ENHANCE] = DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE, 32 [XE_ENGINE_CLASS_COMPUTE] = DRM_XE_ENGINE_CLASS_COMPUTE, 33 }; 34 35 static const enum xe_engine_class user_to_xe_engine_class[] = { 36 [DRM_XE_ENGINE_CLASS_RENDER] = XE_ENGINE_CLASS_RENDER, 37 [DRM_XE_ENGINE_CLASS_COPY] = XE_ENGINE_CLASS_COPY, 38 [DRM_XE_ENGINE_CLASS_VIDEO_DECODE] = XE_ENGINE_CLASS_VIDEO_DECODE, 39 [DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE] = XE_ENGINE_CLASS_VIDEO_ENHANCE, 40 [DRM_XE_ENGINE_CLASS_COMPUTE] = XE_ENGINE_CLASS_COMPUTE, 41 }; 42 43 static size_t calc_hw_engine_info_size(struct xe_device *xe) 44 { 45 struct xe_hw_engine *hwe; 46 enum xe_hw_engine_id id; 47 struct xe_gt *gt; 48 u8 gt_id; 49 int i = 0; 50 51 for_each_gt(gt, xe, gt_id) 52 for_each_hw_engine(hwe, gt, id) { 53 if (xe_hw_engine_is_reserved(hwe)) 54 continue; 55 i++; 56 } 57 58 return sizeof(struct drm_xe_query_engines) + 59 i * sizeof(struct drm_xe_engine); 60 } 61 62 typedef u64 (*__ktime_func_t)(void); 63 static __ktime_func_t __clock_id_to_func(clockid_t clk_id) 64 { 65 /* 66 * Use logic same as the perf subsystem to allow user to select the 67 * reference clock id to be used for timestamps. 68 */ 69 switch (clk_id) { 70 case CLOCK_MONOTONIC: 71 return &ktime_get_ns; 72 case CLOCK_MONOTONIC_RAW: 73 return &ktime_get_raw_ns; 74 case CLOCK_REALTIME: 75 return &ktime_get_real_ns; 76 case CLOCK_BOOTTIME: 77 return &ktime_get_boottime_ns; 78 case CLOCK_TAI: 79 return &ktime_get_clocktai_ns; 80 default: 81 return NULL; 82 } 83 } 84 85 static void 86 __read_timestamps(struct xe_gt *gt, 87 struct xe_reg lower_reg, 88 struct xe_reg upper_reg, 89 u64 *engine_ts, 90 u64 *cpu_ts, 91 u64 *cpu_delta, 92 __ktime_func_t cpu_clock) 93 { 94 u32 upper, lower, old_upper, loop = 0; 95 96 upper = xe_mmio_read32(gt, upper_reg); 97 do { 98 *cpu_delta = local_clock(); 99 *cpu_ts = cpu_clock(); 100 lower = xe_mmio_read32(gt, lower_reg); 101 *cpu_delta = local_clock() - *cpu_delta; 102 old_upper = upper; 103 upper = xe_mmio_read32(gt, upper_reg); 104 } while (upper != old_upper && loop++ < 2); 105 106 *engine_ts = (u64)upper << 32 | lower; 107 } 108 109 static int 110 query_engine_cycles(struct xe_device *xe, 111 struct drm_xe_device_query *query) 112 { 113 struct drm_xe_query_engine_cycles __user *query_ptr; 114 struct drm_xe_engine_class_instance *eci; 115 struct drm_xe_query_engine_cycles resp; 116 size_t size = sizeof(resp); 117 __ktime_func_t cpu_clock; 118 struct xe_hw_engine *hwe; 119 struct xe_gt *gt; 120 121 if (query->size == 0) { 122 query->size = size; 123 return 0; 124 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 125 return -EINVAL; 126 } 127 128 query_ptr = u64_to_user_ptr(query->data); 129 if (copy_from_user(&resp, query_ptr, size)) 130 return -EFAULT; 131 132 cpu_clock = __clock_id_to_func(resp.clockid); 133 if (!cpu_clock) 134 return -EINVAL; 135 136 eci = &resp.eci; 137 if (eci->gt_id >= XE_MAX_GT_PER_TILE) 138 return -EINVAL; 139 140 gt = xe_device_get_gt(xe, eci->gt_id); 141 if (!gt) 142 return -EINVAL; 143 144 if (eci->engine_class >= ARRAY_SIZE(user_to_xe_engine_class)) 145 return -EINVAL; 146 147 hwe = xe_gt_hw_engine(gt, user_to_xe_engine_class[eci->engine_class], 148 eci->engine_instance, true); 149 if (!hwe) 150 return -EINVAL; 151 152 if (xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL)) 153 return -EIO; 154 155 __read_timestamps(gt, 156 RING_TIMESTAMP(hwe->mmio_base), 157 RING_TIMESTAMP_UDW(hwe->mmio_base), 158 &resp.engine_cycles, 159 &resp.cpu_timestamp, 160 &resp.cpu_delta, 161 cpu_clock); 162 163 xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL); 164 resp.width = 36; 165 166 /* Only write to the output fields of user query */ 167 if (put_user(resp.cpu_timestamp, &query_ptr->cpu_timestamp)) 168 return -EFAULT; 169 170 if (put_user(resp.cpu_delta, &query_ptr->cpu_delta)) 171 return -EFAULT; 172 173 if (put_user(resp.engine_cycles, &query_ptr->engine_cycles)) 174 return -EFAULT; 175 176 if (put_user(resp.width, &query_ptr->width)) 177 return -EFAULT; 178 179 return 0; 180 } 181 182 static int query_engines(struct xe_device *xe, 183 struct drm_xe_device_query *query) 184 { 185 size_t size = calc_hw_engine_info_size(xe); 186 struct drm_xe_query_engines __user *query_ptr = 187 u64_to_user_ptr(query->data); 188 struct drm_xe_query_engines *engines; 189 struct xe_hw_engine *hwe; 190 enum xe_hw_engine_id id; 191 struct xe_gt *gt; 192 u8 gt_id; 193 int i = 0; 194 195 if (query->size == 0) { 196 query->size = size; 197 return 0; 198 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 199 return -EINVAL; 200 } 201 202 engines = kzalloc(size, GFP_KERNEL); 203 if (!engines) 204 return -ENOMEM; 205 206 for_each_gt(gt, xe, gt_id) 207 for_each_hw_engine(hwe, gt, id) { 208 if (xe_hw_engine_is_reserved(hwe)) 209 continue; 210 211 engines->engines[i].instance.engine_class = 212 xe_to_user_engine_class[hwe->class]; 213 engines->engines[i].instance.engine_instance = 214 hwe->logical_instance; 215 engines->engines[i].instance.gt_id = gt->info.id; 216 217 i++; 218 } 219 220 engines->num_engines = i; 221 222 if (copy_to_user(query_ptr, engines, size)) { 223 kfree(engines); 224 return -EFAULT; 225 } 226 kfree(engines); 227 228 return 0; 229 } 230 231 static size_t calc_mem_regions_size(struct xe_device *xe) 232 { 233 u32 num_managers = 1; 234 int i; 235 236 for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i) 237 if (ttm_manager_type(&xe->ttm, i)) 238 num_managers++; 239 240 return offsetof(struct drm_xe_query_mem_regions, mem_regions[num_managers]); 241 } 242 243 static int query_mem_regions(struct xe_device *xe, 244 struct drm_xe_device_query *query) 245 { 246 size_t size = calc_mem_regions_size(xe); 247 struct drm_xe_query_mem_regions *mem_regions; 248 struct drm_xe_query_mem_regions __user *query_ptr = 249 u64_to_user_ptr(query->data); 250 struct ttm_resource_manager *man; 251 int ret, i; 252 253 if (query->size == 0) { 254 query->size = size; 255 return 0; 256 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 257 return -EINVAL; 258 } 259 260 mem_regions = kzalloc(size, GFP_KERNEL); 261 if (XE_IOCTL_DBG(xe, !mem_regions)) 262 return -ENOMEM; 263 264 man = ttm_manager_type(&xe->ttm, XE_PL_TT); 265 mem_regions->mem_regions[0].mem_class = DRM_XE_MEM_REGION_CLASS_SYSMEM; 266 /* 267 * The instance needs to be a unique number that represents the index 268 * in the placement mask used at xe_gem_create_ioctl() for the 269 * xe_bo_create() placement. 270 */ 271 mem_regions->mem_regions[0].instance = 0; 272 mem_regions->mem_regions[0].min_page_size = PAGE_SIZE; 273 mem_regions->mem_regions[0].total_size = man->size << PAGE_SHIFT; 274 if (perfmon_capable()) 275 mem_regions->mem_regions[0].used = ttm_resource_manager_usage(man); 276 mem_regions->num_mem_regions = 1; 277 278 for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i) { 279 man = ttm_manager_type(&xe->ttm, i); 280 if (man) { 281 mem_regions->mem_regions[mem_regions->num_mem_regions].mem_class = 282 DRM_XE_MEM_REGION_CLASS_VRAM; 283 mem_regions->mem_regions[mem_regions->num_mem_regions].instance = 284 mem_regions->num_mem_regions; 285 mem_regions->mem_regions[mem_regions->num_mem_regions].min_page_size = 286 xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? 287 SZ_64K : PAGE_SIZE; 288 mem_regions->mem_regions[mem_regions->num_mem_regions].total_size = 289 man->size; 290 291 if (perfmon_capable()) { 292 xe_ttm_vram_get_used(man, 293 &mem_regions->mem_regions 294 [mem_regions->num_mem_regions].used, 295 &mem_regions->mem_regions 296 [mem_regions->num_mem_regions].cpu_visible_used); 297 } 298 299 mem_regions->mem_regions[mem_regions->num_mem_regions].cpu_visible_size = 300 xe_ttm_vram_get_cpu_visible_size(man); 301 mem_regions->num_mem_regions++; 302 } 303 } 304 305 if (!copy_to_user(query_ptr, mem_regions, size)) 306 ret = 0; 307 else 308 ret = -ENOSPC; 309 310 kfree(mem_regions); 311 return ret; 312 } 313 314 static int query_config(struct xe_device *xe, struct drm_xe_device_query *query) 315 { 316 const u32 num_params = DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1; 317 size_t size = 318 sizeof(struct drm_xe_query_config) + num_params * sizeof(u64); 319 struct drm_xe_query_config __user *query_ptr = 320 u64_to_user_ptr(query->data); 321 struct drm_xe_query_config *config; 322 323 if (query->size == 0) { 324 query->size = size; 325 return 0; 326 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 327 return -EINVAL; 328 } 329 330 config = kzalloc(size, GFP_KERNEL); 331 if (!config) 332 return -ENOMEM; 333 334 config->num_params = num_params; 335 config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] = 336 xe->info.devid | (xe->info.revid << 16); 337 if (xe_device_get_root_tile(xe)->mem.vram.usable_size) 338 config->info[DRM_XE_QUERY_CONFIG_FLAGS] = 339 DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM; 340 config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] = 341 xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K; 342 config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits; 343 config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] = 344 xe_exec_queue_device_get_max_priority(xe); 345 346 if (copy_to_user(query_ptr, config, size)) { 347 kfree(config); 348 return -EFAULT; 349 } 350 kfree(config); 351 352 return 0; 353 } 354 355 static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query) 356 { 357 struct xe_gt *gt; 358 size_t size = sizeof(struct drm_xe_query_gt_list) + 359 xe->info.gt_count * sizeof(struct drm_xe_gt); 360 struct drm_xe_query_gt_list __user *query_ptr = 361 u64_to_user_ptr(query->data); 362 struct drm_xe_query_gt_list *gt_list; 363 u8 id; 364 365 if (query->size == 0) { 366 query->size = size; 367 return 0; 368 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 369 return -EINVAL; 370 } 371 372 gt_list = kzalloc(size, GFP_KERNEL); 373 if (!gt_list) 374 return -ENOMEM; 375 376 gt_list->num_gt = xe->info.gt_count; 377 378 for_each_gt(gt, xe, id) { 379 if (xe_gt_is_media_type(gt)) 380 gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MEDIA; 381 else 382 gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN; 383 gt_list->gt_list[id].tile_id = gt_to_tile(gt)->id; 384 gt_list->gt_list[id].gt_id = gt->info.id; 385 gt_list->gt_list[id].reference_clock = gt->info.reference_clock; 386 /* 387 * The mem_regions indexes in the mask below need to 388 * directly identify the struct 389 * drm_xe_query_mem_regions' instance constructed at 390 * query_mem_regions() 391 * 392 * For our current platforms: 393 * Bit 0 -> System Memory 394 * Bit 1 -> VRAM0 on Tile0 395 * Bit 2 -> VRAM1 on Tile1 396 * However the uAPI is generic and it's userspace's 397 * responsibility to check the mem_class, without any 398 * assumption. 399 */ 400 if (!IS_DGFX(xe)) 401 gt_list->gt_list[id].near_mem_regions = 0x1; 402 else 403 gt_list->gt_list[id].near_mem_regions = 404 BIT(gt_to_tile(gt)->id) << 1; 405 gt_list->gt_list[id].far_mem_regions = xe->info.mem_region_mask ^ 406 gt_list->gt_list[id].near_mem_regions; 407 408 gt_list->gt_list[id].ip_ver_major = 409 REG_FIELD_GET(GMD_ID_ARCH_MASK, gt->info.gmdid); 410 gt_list->gt_list[id].ip_ver_minor = 411 REG_FIELD_GET(GMD_ID_RELEASE_MASK, gt->info.gmdid); 412 gt_list->gt_list[id].ip_ver_rev = 413 REG_FIELD_GET(GMD_ID_REVID, gt->info.gmdid); 414 } 415 416 if (copy_to_user(query_ptr, gt_list, size)) { 417 kfree(gt_list); 418 return -EFAULT; 419 } 420 kfree(gt_list); 421 422 return 0; 423 } 424 425 static int query_hwconfig(struct xe_device *xe, 426 struct drm_xe_device_query *query) 427 { 428 struct xe_gt *gt = xe_root_mmio_gt(xe); 429 size_t size = xe_guc_hwconfig_size(>->uc.guc); 430 void __user *query_ptr = u64_to_user_ptr(query->data); 431 void *hwconfig; 432 433 if (query->size == 0) { 434 query->size = size; 435 return 0; 436 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 437 return -EINVAL; 438 } 439 440 hwconfig = kzalloc(size, GFP_KERNEL); 441 if (!hwconfig) 442 return -ENOMEM; 443 444 xe_guc_hwconfig_copy(>->uc.guc, hwconfig); 445 446 if (copy_to_user(query_ptr, hwconfig, size)) { 447 kfree(hwconfig); 448 return -EFAULT; 449 } 450 kfree(hwconfig); 451 452 return 0; 453 } 454 455 static size_t calc_topo_query_size(struct xe_device *xe) 456 { 457 return xe->info.gt_count * 458 (4 * sizeof(struct drm_xe_query_topology_mask) + 459 sizeof_field(struct xe_gt, fuse_topo.g_dss_mask) + 460 sizeof_field(struct xe_gt, fuse_topo.c_dss_mask) + 461 sizeof_field(struct xe_gt, fuse_topo.l3_bank_mask) + 462 sizeof_field(struct xe_gt, fuse_topo.eu_mask_per_dss)); 463 } 464 465 static int copy_mask(void __user **ptr, 466 struct drm_xe_query_topology_mask *topo, 467 void *mask, size_t mask_size) 468 { 469 topo->num_bytes = mask_size; 470 471 if (copy_to_user(*ptr, topo, sizeof(*topo))) 472 return -EFAULT; 473 *ptr += sizeof(topo); 474 475 if (copy_to_user(*ptr, mask, mask_size)) 476 return -EFAULT; 477 *ptr += mask_size; 478 479 return 0; 480 } 481 482 static int query_gt_topology(struct xe_device *xe, 483 struct drm_xe_device_query *query) 484 { 485 void __user *query_ptr = u64_to_user_ptr(query->data); 486 size_t size = calc_topo_query_size(xe); 487 struct drm_xe_query_topology_mask topo; 488 struct xe_gt *gt; 489 int id; 490 491 if (query->size == 0) { 492 query->size = size; 493 return 0; 494 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 495 return -EINVAL; 496 } 497 498 for_each_gt(gt, xe, id) { 499 int err; 500 501 topo.gt_id = id; 502 503 topo.type = DRM_XE_TOPO_DSS_GEOMETRY; 504 err = copy_mask(&query_ptr, &topo, gt->fuse_topo.g_dss_mask, 505 sizeof(gt->fuse_topo.g_dss_mask)); 506 if (err) 507 return err; 508 509 topo.type = DRM_XE_TOPO_DSS_COMPUTE; 510 err = copy_mask(&query_ptr, &topo, gt->fuse_topo.c_dss_mask, 511 sizeof(gt->fuse_topo.c_dss_mask)); 512 if (err) 513 return err; 514 515 topo.type = DRM_XE_TOPO_L3_BANK; 516 err = copy_mask(&query_ptr, &topo, gt->fuse_topo.l3_bank_mask, 517 sizeof(gt->fuse_topo.l3_bank_mask)); 518 if (err) 519 return err; 520 521 topo.type = gt->fuse_topo.eu_type == XE_GT_EU_TYPE_SIMD16 ? 522 DRM_XE_TOPO_SIMD16_EU_PER_DSS : 523 DRM_XE_TOPO_EU_PER_DSS; 524 err = copy_mask(&query_ptr, &topo, 525 gt->fuse_topo.eu_mask_per_dss, 526 sizeof(gt->fuse_topo.eu_mask_per_dss)); 527 if (err) 528 return err; 529 } 530 531 return 0; 532 } 533 534 static int 535 query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query) 536 { 537 struct drm_xe_query_uc_fw_version __user *query_ptr = u64_to_user_ptr(query->data); 538 size_t size = sizeof(struct drm_xe_query_uc_fw_version); 539 struct drm_xe_query_uc_fw_version resp; 540 struct xe_uc_fw_version *version = NULL; 541 542 if (query->size == 0) { 543 query->size = size; 544 return 0; 545 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 546 return -EINVAL; 547 } 548 549 if (copy_from_user(&resp, query_ptr, size)) 550 return -EFAULT; 551 552 if (XE_IOCTL_DBG(xe, resp.pad || resp.pad2 || resp.reserved)) 553 return -EINVAL; 554 555 switch (resp.uc_type) { 556 case XE_QUERY_UC_TYPE_GUC_SUBMISSION: { 557 struct xe_guc *guc = &xe->tiles[0].primary_gt->uc.guc; 558 559 version = &guc->fw.versions.found[XE_UC_FW_VER_COMPATIBILITY]; 560 break; 561 } 562 case XE_QUERY_UC_TYPE_HUC: { 563 struct xe_gt *media_gt = NULL; 564 struct xe_huc *huc; 565 566 if (MEDIA_VER(xe) >= 13) { 567 struct xe_tile *tile; 568 u8 gt_id; 569 570 for_each_tile(tile, xe, gt_id) { 571 if (tile->media_gt) { 572 media_gt = tile->media_gt; 573 break; 574 } 575 } 576 } else { 577 media_gt = xe->tiles[0].primary_gt; 578 } 579 580 if (!media_gt) 581 break; 582 583 huc = &media_gt->uc.huc; 584 if (huc->fw.status == XE_UC_FIRMWARE_RUNNING) 585 version = &huc->fw.versions.found[XE_UC_FW_VER_RELEASE]; 586 break; 587 } 588 default: 589 return -EINVAL; 590 } 591 592 if (version) { 593 resp.branch_ver = 0; 594 resp.major_ver = version->major; 595 resp.minor_ver = version->minor; 596 resp.patch_ver = version->patch; 597 } else { 598 return -ENODEV; 599 } 600 601 if (copy_to_user(query_ptr, &resp, size)) 602 return -EFAULT; 603 604 return 0; 605 } 606 607 static size_t calc_oa_unit_query_size(struct xe_device *xe) 608 { 609 size_t size = sizeof(struct drm_xe_query_oa_units); 610 struct xe_gt *gt; 611 int i, id; 612 613 for_each_gt(gt, xe, id) { 614 for (i = 0; i < gt->oa.num_oa_units; i++) { 615 size += sizeof(struct drm_xe_oa_unit); 616 size += gt->oa.oa_unit[i].num_engines * 617 sizeof(struct drm_xe_engine_class_instance); 618 } 619 } 620 621 return size; 622 } 623 624 static int query_oa_units(struct xe_device *xe, 625 struct drm_xe_device_query *query) 626 { 627 void __user *query_ptr = u64_to_user_ptr(query->data); 628 size_t size = calc_oa_unit_query_size(xe); 629 struct drm_xe_query_oa_units *qoa; 630 enum xe_hw_engine_id hwe_id; 631 struct drm_xe_oa_unit *du; 632 struct xe_hw_engine *hwe; 633 struct xe_oa_unit *u; 634 int gt_id, i, j, ret; 635 struct xe_gt *gt; 636 u8 *pdu; 637 638 if (query->size == 0) { 639 query->size = size; 640 return 0; 641 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 642 return -EINVAL; 643 } 644 645 qoa = kzalloc(size, GFP_KERNEL); 646 if (!qoa) 647 return -ENOMEM; 648 649 pdu = (u8 *)&qoa->oa_units[0]; 650 for_each_gt(gt, xe, gt_id) { 651 for (i = 0; i < gt->oa.num_oa_units; i++) { 652 u = >->oa.oa_unit[i]; 653 du = (struct drm_xe_oa_unit *)pdu; 654 655 du->oa_unit_id = u->oa_unit_id; 656 du->oa_unit_type = u->type; 657 du->oa_timestamp_freq = xe_oa_timestamp_frequency(gt); 658 du->capabilities = DRM_XE_OA_CAPS_BASE; 659 660 j = 0; 661 for_each_hw_engine(hwe, gt, hwe_id) { 662 if (!xe_hw_engine_is_reserved(hwe) && 663 xe_oa_unit_id(hwe) == u->oa_unit_id) { 664 du->eci[j].engine_class = 665 xe_to_user_engine_class[hwe->class]; 666 du->eci[j].engine_instance = hwe->logical_instance; 667 du->eci[j].gt_id = gt->info.id; 668 j++; 669 } 670 } 671 du->num_engines = j; 672 pdu += sizeof(*du) + j * sizeof(du->eci[0]); 673 qoa->num_oa_units++; 674 } 675 } 676 677 ret = copy_to_user(query_ptr, qoa, size); 678 kfree(qoa); 679 680 return ret ? -EFAULT : 0; 681 } 682 683 static int (* const xe_query_funcs[])(struct xe_device *xe, 684 struct drm_xe_device_query *query) = { 685 query_engines, 686 query_mem_regions, 687 query_config, 688 query_gt_list, 689 query_hwconfig, 690 query_gt_topology, 691 query_engine_cycles, 692 query_uc_fw_version, 693 query_oa_units, 694 }; 695 696 int xe_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file) 697 { 698 struct xe_device *xe = to_xe_device(dev); 699 struct drm_xe_device_query *query = data; 700 u32 idx; 701 702 if (XE_IOCTL_DBG(xe, query->extensions) || 703 XE_IOCTL_DBG(xe, query->reserved[0] || query->reserved[1])) 704 return -EINVAL; 705 706 if (XE_IOCTL_DBG(xe, query->query >= ARRAY_SIZE(xe_query_funcs))) 707 return -EINVAL; 708 709 idx = array_index_nospec(query->query, ARRAY_SIZE(xe_query_funcs)); 710 if (XE_IOCTL_DBG(xe, !xe_query_funcs[idx])) 711 return -EINVAL; 712 713 return xe_query_funcs[idx](xe, query); 714 } 715