1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2022 Intel Corporation 4 */ 5 6 /* Internal to xe_pcode */ 7 8 #define PCODE_MAILBOX _MMIO(0x138124) 9 #define PCODE_READY REG_BIT(31) 10 #define PCODE_MB_PARAM2 REG_GENMASK(23, 16) 11 #define PCODE_MB_PARAM1 REG_GENMASK(15, 8) 12 #define PCODE_MB_COMMAND REG_GENMASK(7, 0) 13 #define PCODE_ERROR_MASK 0xFF 14 #define PCODE_SUCCESS 0x0 15 #define PCODE_ILLEGAL_CMD 0x1 16 #define PCODE_TIMEOUT 0x2 17 #define PCODE_ILLEGAL_DATA 0x3 18 #define PCODE_ILLEGAL_SUBCOMMAND 0x4 19 #define PCODE_LOCKED 0x6 20 #define PCODE_GT_RATIO_OUT_OF_RANGE 0x10 21 #define PCODE_REJECTED 0x11 22 23 #define PCODE_DATA0 _MMIO(0x138128) 24 #define PCODE_DATA1 _MMIO(0x13812C) 25 26 /* Min Freq QOS Table */ 27 #define PCODE_WRITE_MIN_FREQ_TABLE 0x8 28 #define PCODE_READ_MIN_FREQ_TABLE 0x9 29 #define PCODE_FREQ_RING_RATIO_SHIFT 16 30 31 /* PCODE Init */ 32 #define DGFX_PCODE_STATUS 0x7E 33 #define DGFX_GET_INIT_STATUS 0x0 34 #define DGFX_INIT_STATUS_COMPLETE 0x1 35 36 struct pcode_err_decode { 37 int errno; 38 const char *str; 39 }; 40 41