xref: /linux/drivers/gpu/drm/xe/xe_pcode.c (revision 257ca10c7317d4a424e48bb95d14ca53a1f1dd6f)
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2022 Intel Corporation
4  */
5 
6 #include "xe_pcode.h"
7 
8 #include <linux/delay.h>
9 #include <linux/errno.h>
10 
11 #include <drm/drm_managed.h>
12 
13 #include "xe_gt.h"
14 #include "xe_mmio.h"
15 #include "xe_pcode_api.h"
16 
17 /**
18  * DOC: PCODE
19  *
20  * Xe PCODE is the component responsible for interfacing with the PCODE
21  * firmware.
22  * It shall provide a very simple ABI to other Xe components, but be the
23  * single and consolidated place that will communicate with PCODE. All read
24  * and write operations to PCODE will be internal and private to this component.
25  *
26  * What's next:
27  * - PCODE hw metrics
28  * - PCODE for display operations
29  */
30 
31 static int pcode_mailbox_status(struct xe_gt *gt)
32 {
33 	u32 err;
34 	static const struct pcode_err_decode err_decode[] = {
35 		[PCODE_ILLEGAL_CMD] = {-ENXIO, "Illegal Command"},
36 		[PCODE_TIMEOUT] = {-ETIMEDOUT, "Timed out"},
37 		[PCODE_ILLEGAL_DATA] = {-EINVAL, "Illegal Data"},
38 		[PCODE_ILLEGAL_SUBCOMMAND] = {-ENXIO, "Illegal Subcommand"},
39 		[PCODE_LOCKED] = {-EBUSY, "PCODE Locked"},
40 		[PCODE_GT_RATIO_OUT_OF_RANGE] = {-EOVERFLOW,
41 			"GT ratio out of range"},
42 		[PCODE_REJECTED] = {-EACCES, "PCODE Rejected"},
43 		[PCODE_ERROR_MASK] = {-EPROTO, "Unknown"},
44 	};
45 
46 	lockdep_assert_held(&gt->pcode.lock);
47 
48 	err = xe_mmio_read32(gt, PCODE_MAILBOX) & PCODE_ERROR_MASK;
49 	if (err) {
50 		drm_err(&gt_to_xe(gt)->drm, "PCODE Mailbox failed: %d %s", err,
51 			err_decode[err].str ?: "Unknown");
52 		return err_decode[err].errno ?: -EPROTO;
53 	}
54 
55 	return 0;
56 }
57 
58 static int pcode_mailbox_rw(struct xe_gt *gt, u32 mbox, u32 *data0, u32 *data1,
59 			    unsigned int timeout_ms, bool return_data,
60 			    bool atomic)
61 {
62 	int err;
63 
64 	if (gt_to_xe(gt)->info.skip_pcode)
65 		return 0;
66 
67 	lockdep_assert_held(&gt->pcode.lock);
68 
69 	if ((xe_mmio_read32(gt, PCODE_MAILBOX) & PCODE_READY) != 0)
70 		return -EAGAIN;
71 
72 	xe_mmio_write32(gt, PCODE_DATA0, *data0);
73 	xe_mmio_write32(gt, PCODE_DATA1, data1 ? *data1 : 0);
74 	xe_mmio_write32(gt, PCODE_MAILBOX, PCODE_READY | mbox);
75 
76 	err = xe_mmio_wait32(gt, PCODE_MAILBOX, PCODE_READY, 0,
77 			     timeout_ms * 1000, NULL, atomic);
78 	if (err)
79 		return err;
80 
81 	if (return_data) {
82 		*data0 = xe_mmio_read32(gt, PCODE_DATA0);
83 		if (data1)
84 			*data1 = xe_mmio_read32(gt, PCODE_DATA1);
85 	}
86 
87 	return pcode_mailbox_status(gt);
88 }
89 
90 int xe_pcode_write_timeout(struct xe_gt *gt, u32 mbox, u32 data, int timeout)
91 {
92 	int err;
93 
94 	mutex_lock(&gt->pcode.lock);
95 	err = pcode_mailbox_rw(gt, mbox, &data, NULL, timeout, false, false);
96 	mutex_unlock(&gt->pcode.lock);
97 
98 	return err;
99 }
100 
101 int xe_pcode_read(struct xe_gt *gt, u32 mbox, u32 *val, u32 *val1)
102 {
103 	int err;
104 
105 	mutex_lock(&gt->pcode.lock);
106 	err = pcode_mailbox_rw(gt, mbox, val, val1, 1, true, false);
107 	mutex_unlock(&gt->pcode.lock);
108 
109 	return err;
110 }
111 
112 static int xe_pcode_try_request(struct xe_gt *gt, u32 mbox,
113 				u32 request, u32 reply_mask, u32 reply,
114 				u32 *status, bool atomic, int timeout_us)
115 {
116 	int slept, wait = 10;
117 
118 	for (slept = 0; slept < timeout_us; slept += wait) {
119 		*status = pcode_mailbox_rw(gt, mbox, &request, NULL, 1, true,
120 					   atomic);
121 		if ((*status == 0) && ((request & reply_mask) == reply))
122 			return 0;
123 
124 		if (atomic)
125 			udelay(wait);
126 		else
127 			usleep_range(wait, wait << 1);
128 		wait <<= 1;
129 	}
130 
131 	return -ETIMEDOUT;
132 }
133 
134 /**
135  * xe_pcode_request - send PCODE request until acknowledgment
136  * @gt: gt
137  * @mbox: PCODE mailbox ID the request is targeted for
138  * @request: request ID
139  * @reply_mask: mask used to check for request acknowledgment
140  * @reply: value used to check for request acknowledgment
141  * @timeout_base_ms: timeout for polling with preemption enabled
142  *
143  * Keep resending the @request to @mbox until PCODE acknowledges it, PCODE
144  * reports an error or an overall timeout of @timeout_base_ms+50 ms expires.
145  * The request is acknowledged once the PCODE reply dword equals @reply after
146  * applying @reply_mask. Polling is first attempted with preemption enabled
147  * for @timeout_base_ms and if this times out for another 50 ms with
148  * preemption disabled.
149  *
150  * Returns 0 on success, %-ETIMEDOUT in case of a timeout, <0 in case of some
151  * other error as reported by PCODE.
152  */
153 int xe_pcode_request(struct xe_gt *gt, u32 mbox, u32 request,
154 		      u32 reply_mask, u32 reply, int timeout_base_ms)
155 {
156 	u32 status;
157 	int ret;
158 
159 	mutex_lock(&gt->pcode.lock);
160 
161 	ret = xe_pcode_try_request(gt, mbox, request, reply_mask, reply, &status,
162 				   false, timeout_base_ms * 1000);
163 	if (!ret)
164 		goto out;
165 
166 	/*
167 	 * The above can time out if the number of requests was low (2 in the
168 	 * worst case) _and_ PCODE was busy for some reason even after a
169 	 * (queued) request and @timeout_base_ms delay. As a workaround retry
170 	 * the poll with preemption disabled to maximize the number of
171 	 * requests. Increase the timeout from @timeout_base_ms to 50ms to
172 	 * account for interrupts that could reduce the number of these
173 	 * requests, and for any quirks of the PCODE firmware that delays
174 	 * the request completion.
175 	 */
176 	drm_err(&gt_to_xe(gt)->drm,
177 		"PCODE timeout, retrying with preemption disabled\n");
178 	drm_WARN_ON_ONCE(&gt_to_xe(gt)->drm, timeout_base_ms > 1);
179 	preempt_disable();
180 	ret = xe_pcode_try_request(gt, mbox, request, reply_mask, reply, &status,
181 				   true, timeout_base_ms * 1000);
182 	preempt_enable();
183 
184 out:
185 	mutex_unlock(&gt->pcode.lock);
186 	return status ? status : ret;
187 }
188 /**
189  * xe_pcode_init_min_freq_table - Initialize PCODE's QOS frequency table
190  * @gt: gt instance
191  * @min_gt_freq: Minimal (RPn) GT frequency in units of 50MHz.
192  * @max_gt_freq: Maximal (RP0) GT frequency in units of 50MHz.
193  *
194  * This function initialize PCODE's QOS frequency table for a proper minimal
195  * frequency/power steering decision, depending on the current requested GT
196  * frequency. For older platforms this was a more complete table including
197  * the IA freq. However for the latest platforms this table become a simple
198  * 1-1 Ring vs GT frequency. Even though, without setting it, PCODE might
199  * not take the right decisions for some memory frequencies and affect latency.
200  *
201  * It returns 0 on success, and -ERROR number on failure, -EINVAL if max
202  * frequency is higher then the minimal, and other errors directly translated
203  * from the PCODE Error returs:
204  * - -ENXIO: "Illegal Command"
205  * - -ETIMEDOUT: "Timed out"
206  * - -EINVAL: "Illegal Data"
207  * - -ENXIO, "Illegal Subcommand"
208  * - -EBUSY: "PCODE Locked"
209  * - -EOVERFLOW, "GT ratio out of range"
210  * - -EACCES, "PCODE Rejected"
211  * - -EPROTO, "Unknown"
212  */
213 int xe_pcode_init_min_freq_table(struct xe_gt *gt, u32 min_gt_freq,
214 				 u32 max_gt_freq)
215 {
216 	int ret;
217 	u32 freq;
218 
219 	if (!gt_to_xe(gt)->info.has_llc)
220 		return 0;
221 
222 	if (max_gt_freq <= min_gt_freq)
223 		return -EINVAL;
224 
225 	mutex_lock(&gt->pcode.lock);
226 	for (freq = min_gt_freq; freq <= max_gt_freq; freq++) {
227 		u32 data = freq << PCODE_FREQ_RING_RATIO_SHIFT | freq;
228 
229 		ret = pcode_mailbox_rw(gt, PCODE_WRITE_MIN_FREQ_TABLE,
230 				       &data, NULL, 1, false, false);
231 		if (ret)
232 			goto unlock;
233 	}
234 
235 unlock:
236 	mutex_unlock(&gt->pcode.lock);
237 	return ret;
238 }
239 
240 /**
241  * xe_pcode_init - Ensure PCODE is initialized
242  * @gt: gt instance
243  *
244  * This function ensures that PCODE is properly initialized. To be called during
245  * probe and resume paths.
246  *
247  * It returns 0 on success, and -error number on failure.
248  */
249 int xe_pcode_init(struct xe_gt *gt)
250 {
251 	u32 status, request = DGFX_GET_INIT_STATUS;
252 	int timeout_us = 180000000; /* 3 min */
253 	int ret;
254 
255 	if (gt_to_xe(gt)->info.skip_pcode)
256 		return 0;
257 
258 	if (!IS_DGFX(gt_to_xe(gt)))
259 		return 0;
260 
261 	mutex_lock(&gt->pcode.lock);
262 	ret = xe_pcode_try_request(gt, DGFX_PCODE_STATUS, request,
263 				   DGFX_INIT_STATUS_COMPLETE,
264 				   DGFX_INIT_STATUS_COMPLETE,
265 				   &status, false, timeout_us);
266 	mutex_unlock(&gt->pcode.lock);
267 
268 	if (ret)
269 		drm_err(&gt_to_xe(gt)->drm,
270 			"PCODE initialization timedout after: 3 min\n");
271 
272 	return ret;
273 }
274 
275 /**
276  * xe_pcode_probe - Prepare xe_pcode and also ensure PCODE is initialized.
277  * @gt: gt instance
278  *
279  * This function initializes the xe_pcode component, and when needed, it ensures
280  * that PCODE has properly performed its initialization and it is really ready
281  * to go. To be called once only during probe.
282  *
283  * It returns 0 on success, and -error number on failure.
284  */
285 int xe_pcode_probe(struct xe_gt *gt)
286 {
287 	drmm_mutex_init(&gt_to_xe(gt)->drm, &gt->pcode.lock);
288 
289 	if (gt_to_xe(gt)->info.skip_pcode)
290 		return 0;
291 
292 	if (!IS_DGFX(gt_to_xe(gt)))
293 		return 0;
294 
295 	return xe_pcode_init(gt);
296 }
297