xref: /linux/drivers/gpu/drm/xe/xe_mem_pool.h (revision f1a5e78a55ebf2b05777fd5eb738038ddae609d6)
1*36c6bac1SSatyanarayana K V P /* SPDX-License-Identifier: MIT */
2*36c6bac1SSatyanarayana K V P /*
3*36c6bac1SSatyanarayana K V P  * Copyright © 2026 Intel Corporation
4*36c6bac1SSatyanarayana K V P  */
5*36c6bac1SSatyanarayana K V P #ifndef _XE_MEM_POOL_H_
6*36c6bac1SSatyanarayana K V P #define _XE_MEM_POOL_H_
7*36c6bac1SSatyanarayana K V P 
8*36c6bac1SSatyanarayana K V P #include <linux/sizes.h>
9*36c6bac1SSatyanarayana K V P #include <linux/types.h>
10*36c6bac1SSatyanarayana K V P 
11*36c6bac1SSatyanarayana K V P #include <drm/drm_mm.h>
12*36c6bac1SSatyanarayana K V P #include "xe_mem_pool_types.h"
13*36c6bac1SSatyanarayana K V P 
14*36c6bac1SSatyanarayana K V P struct drm_printer;
15*36c6bac1SSatyanarayana K V P struct xe_mem_pool;
16*36c6bac1SSatyanarayana K V P struct xe_tile;
17*36c6bac1SSatyanarayana K V P 
18*36c6bac1SSatyanarayana K V P struct xe_mem_pool *xe_mem_pool_init(struct xe_tile *tile, u32 size,
19*36c6bac1SSatyanarayana K V P 				     u32 guard, int flags);
20*36c6bac1SSatyanarayana K V P void xe_mem_pool_sync(struct xe_mem_pool *pool);
21*36c6bac1SSatyanarayana K V P void xe_mem_pool_swap_shadow_locked(struct xe_mem_pool *pool);
22*36c6bac1SSatyanarayana K V P void xe_mem_pool_sync_shadow_locked(struct xe_mem_pool_node *node);
23*36c6bac1SSatyanarayana K V P u64 xe_mem_pool_gpu_addr(struct xe_mem_pool *pool);
24*36c6bac1SSatyanarayana K V P void *xe_mem_pool_cpu_addr(struct xe_mem_pool *pool);
25*36c6bac1SSatyanarayana K V P struct mutex *xe_mem_pool_bo_swap_guard(struct xe_mem_pool *pool);
26*36c6bac1SSatyanarayana K V P void xe_mem_pool_bo_flush_write(struct xe_mem_pool_node *node);
27*36c6bac1SSatyanarayana K V P void xe_mem_pool_bo_sync_read(struct xe_mem_pool_node *node);
28*36c6bac1SSatyanarayana K V P struct xe_mem_pool_node *xe_mem_pool_alloc_node(void);
29*36c6bac1SSatyanarayana K V P int xe_mem_pool_insert_node(struct xe_mem_pool *pool,
30*36c6bac1SSatyanarayana K V P 			    struct xe_mem_pool_node *node, u32 size);
31*36c6bac1SSatyanarayana K V P void xe_mem_pool_free_node(struct xe_mem_pool_node *node);
32*36c6bac1SSatyanarayana K V P void *xe_mem_pool_node_cpu_addr(struct xe_mem_pool_node *node);
33*36c6bac1SSatyanarayana K V P void xe_mem_pool_dump(struct xe_mem_pool *pool, struct drm_printer *p);
34*36c6bac1SSatyanarayana K V P 
35*36c6bac1SSatyanarayana K V P #endif
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