xref: /linux/drivers/gpu/drm/xe/xe_i2c.c (revision f4cdf7ca9a1fdcca413157df19753f388a5a224e)
1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /*
3  * Intel Xe I2C attached Microcontroller Units (MCU)
4  *
5  * Copyright (C) 2025 Intel Corporation.
6  */
7 
8 #include <drm/drm_print.h>
9 #include <linux/array_size.h>
10 #include <linux/container_of.h>
11 #include <linux/device.h>
12 #include <linux/err.h>
13 #include <linux/i2c.h>
14 #include <linux/ioport.h>
15 #include <linux/irq.h>
16 #include <linux/irqdomain.h>
17 #include <linux/notifier.h>
18 #include <linux/pci.h>
19 #include <linux/platform_device.h>
20 #include <linux/property.h>
21 #include <linux/regmap.h>
22 #include <linux/sprintf.h>
23 #include <linux/string.h>
24 #include <linux/types.h>
25 #include <linux/workqueue.h>
26 
27 #include "regs/xe_i2c_regs.h"
28 #include "regs/xe_irq_regs.h"
29 
30 #include "xe_device.h"
31 #include "xe_i2c.h"
32 #include "xe_mmio.h"
33 #include "xe_sriov.h"
34 #include "xe_survivability_mode.h"
35 
36 /**
37  * DOC: Xe I2C devices
38  *
39  * Register a platform device for the I2C host controller (Synpsys DesignWare
40  * I2C) if the registers of that controller are mapped to the MMIO, and also the
41  * I2C client device for the Add-In Management Controller (the MCU) attached to
42  * the host controller.
43  *
44  * See drivers/i2c/busses/i2c-designware-* for more information on the I2C host
45  * controller.
46  */
47 
48 static const char adapter_name[] = "i2c_designware";
49 
50 static const struct property_entry xe_i2c_adapter_properties[] = {
51 	PROPERTY_ENTRY_STRING("compatible", "intel,xe-i2c"),
52 	PROPERTY_ENTRY_U32("clock-frequency", I2C_MAX_FAST_MODE_PLUS_FREQ),
53 	{ }
54 };
55 
56 static inline void xe_i2c_read_endpoint(struct xe_mmio *mmio, void *ep)
57 {
58 	u32 *val = ep;
59 
60 	val[0] = xe_mmio_read32(mmio, REG_SG_REMAP_ADDR_PREFIX);
61 	val[1] = xe_mmio_read32(mmio, REG_SG_REMAP_ADDR_POSTFIX);
62 }
63 
64 static void xe_i2c_client_work(struct work_struct *work)
65 {
66 	struct xe_i2c *i2c = container_of(work, struct xe_i2c, work);
67 	struct i2c_board_info info = {
68 		.type	= "amc",
69 		.flags	= I2C_CLIENT_HOST_NOTIFY,
70 		.addr	= i2c->ep.addr[1],
71 	};
72 
73 	i2c->client[0] = i2c_new_client_device(i2c->adapter, &info);
74 }
75 
76 static int xe_i2c_notifier(struct notifier_block *nb, unsigned long action, void *data)
77 {
78 	struct xe_i2c *i2c = container_of(nb, struct xe_i2c, bus_notifier);
79 	struct i2c_adapter *adapter = i2c_verify_adapter(data);
80 	struct device *dev = data;
81 
82 	if (action == BUS_NOTIFY_ADD_DEVICE &&
83 	    adapter && dev->parent == &i2c->pdev->dev) {
84 		i2c->adapter = adapter;
85 		schedule_work(&i2c->work);
86 		return NOTIFY_OK;
87 	}
88 
89 	return NOTIFY_DONE;
90 }
91 
92 static int xe_i2c_register_adapter(struct xe_i2c *i2c)
93 {
94 	struct pci_dev *pci = to_pci_dev(i2c->drm_dev);
95 	struct platform_device *pdev;
96 	struct fwnode_handle *fwnode;
97 	int ret;
98 	u32 id;
99 
100 	fwnode = fwnode_create_software_node(xe_i2c_adapter_properties, NULL);
101 	if (IS_ERR(fwnode))
102 		return PTR_ERR(fwnode);
103 
104 	id = (pci_domain_nr(pci->bus) << 16) | pci_dev_id(pci);
105 
106 	/*
107 	 * Not using platform_device_register_full() here because we don't have
108 	 * a handle to the platform_device before it returns. xe_i2c_notifier()
109 	 * uses that handle, but it may be called before
110 	 * platform_device_register_full() is done.
111 	 */
112 	pdev = platform_device_alloc(adapter_name, id);
113 	if (!pdev) {
114 		ret = -ENOMEM;
115 		goto err_fwnode_remove;
116 	}
117 
118 	if (i2c->adapter_irq) {
119 		struct resource res;
120 
121 		res = DEFINE_RES_IRQ_NAMED(i2c->adapter_irq, "xe_i2c");
122 
123 		ret = platform_device_add_resources(pdev, &res, 1);
124 		if (ret)
125 			goto err_pdev_put;
126 	}
127 
128 	pdev->dev.parent = i2c->drm_dev;
129 	pdev->dev.fwnode = fwnode;
130 	i2c->adapter_node = fwnode;
131 	i2c->pdev = pdev;
132 
133 	ret = platform_device_add(pdev);
134 	if (ret)
135 		goto err_pdev_put;
136 
137 	return 0;
138 
139 err_pdev_put:
140 	platform_device_put(pdev);
141 err_fwnode_remove:
142 	fwnode_remove_software_node(fwnode);
143 
144 	return ret;
145 }
146 
147 static void xe_i2c_unregister_adapter(struct xe_i2c *i2c)
148 {
149 	platform_device_unregister(i2c->pdev);
150 	fwnode_remove_software_node(i2c->adapter_node);
151 }
152 
153 /**
154  * xe_i2c_present - I2C controller is present and functional
155  * @xe: xe device instance
156  *
157  * Check whether the I2C controller is present and functioning with valid
158  * endpoint cookie.
159  *
160  * Return: %true if present, %false otherwise.
161  */
162 bool xe_i2c_present(struct xe_device *xe)
163 {
164 	return xe->i2c && xe->i2c->ep.cookie == XE_I2C_EP_COOKIE_DEVICE;
165 }
166 
167 static bool xe_i2c_irq_present(struct xe_device *xe)
168 {
169 	return xe->i2c && xe->i2c->adapter_irq;
170 }
171 
172 /**
173  * xe_i2c_irq_handler: Handler for I2C interrupts
174  * @xe: xe device instance
175  * @master_ctl: interrupt register
176  *
177  * Forward interrupts generated by the I2C host adapter to the I2C host adapter
178  * driver.
179  */
180 void xe_i2c_irq_handler(struct xe_device *xe, u32 master_ctl)
181 {
182 	struct xe_mmio *mmio = xe_root_tile_mmio(xe);
183 
184 	if (!(master_ctl & I2C_IRQ) || !xe_i2c_irq_present(xe))
185 		return;
186 
187 	/* Forward interrupt to I2C adapter */
188 	generic_handle_irq_safe(xe->i2c->adapter_irq);
189 
190 	/* Deassert after I2C adapter clears the interrupt */
191 	xe_mmio_rmw32(mmio, I2C_CONFIG_CMD, 0, PCI_COMMAND_INTX_DISABLE);
192 	/* Reassert to allow subsequent interrupt generation */
193 	xe_mmio_rmw32(mmio, I2C_CONFIG_CMD, PCI_COMMAND_INTX_DISABLE, 0);
194 }
195 
196 void xe_i2c_irq_reset(struct xe_device *xe)
197 {
198 	struct xe_mmio *mmio = xe_root_tile_mmio(xe);
199 
200 	if (!xe_i2c_irq_present(xe))
201 		return;
202 
203 	xe_mmio_rmw32(mmio, I2C_CONFIG_CMD, 0, PCI_COMMAND_INTX_DISABLE);
204 	xe_mmio_rmw32(mmio, I2C_BRIDGE_PCICFGCTL, ACPI_INTR_EN, 0);
205 }
206 
207 void xe_i2c_irq_postinstall(struct xe_device *xe)
208 {
209 	struct xe_mmio *mmio = xe_root_tile_mmio(xe);
210 
211 	if (!xe_i2c_irq_present(xe))
212 		return;
213 
214 	xe_mmio_rmw32(mmio, I2C_BRIDGE_PCICFGCTL, 0, ACPI_INTR_EN);
215 	xe_mmio_rmw32(mmio, I2C_CONFIG_CMD, PCI_COMMAND_INTX_DISABLE, 0);
216 }
217 
218 static int xe_i2c_irq_map(struct irq_domain *h, unsigned int virq,
219 			  irq_hw_number_t hw_irq_num)
220 {
221 	irq_set_chip_and_handler(virq, &dummy_irq_chip, handle_simple_irq);
222 	return 0;
223 }
224 
225 static const struct irq_domain_ops xe_i2c_irq_ops = {
226 	.map = xe_i2c_irq_map,
227 };
228 
229 static int xe_i2c_create_irq(struct xe_device *xe)
230 {
231 	struct xe_i2c *i2c = xe->i2c;
232 	struct irq_domain *domain;
233 
234 	if (!(i2c->ep.capabilities & XE_I2C_EP_CAP_IRQ) ||
235 	    xe_survivability_mode_is_boot_enabled(xe))
236 		return 0;
237 
238 	domain = irq_domain_create_linear(dev_fwnode(i2c->drm_dev), 1, &xe_i2c_irq_ops, NULL);
239 	if (!domain)
240 		return -ENOMEM;
241 
242 	i2c->adapter_irq = irq_create_mapping(domain, 0);
243 	i2c->irqdomain = domain;
244 
245 	return 0;
246 }
247 
248 static void xe_i2c_remove_irq(struct xe_i2c *i2c)
249 {
250 	if (!i2c->irqdomain)
251 		return;
252 
253 	irq_dispose_mapping(i2c->adapter_irq);
254 	irq_domain_remove(i2c->irqdomain);
255 }
256 
257 static int xe_i2c_read(void *context, unsigned int reg, unsigned int *val)
258 {
259 	struct xe_i2c *i2c = context;
260 
261 	*val = xe_mmio_read32(i2c->mmio, XE_REG(reg + I2C_MEM_SPACE_OFFSET));
262 
263 	return 0;
264 }
265 
266 static int xe_i2c_write(void *context, unsigned int reg, unsigned int val)
267 {
268 	struct xe_i2c *i2c = context;
269 
270 	xe_mmio_write32(i2c->mmio, XE_REG(reg + I2C_MEM_SPACE_OFFSET), val);
271 
272 	return 0;
273 }
274 
275 static const struct regmap_config i2c_regmap_config = {
276 	.reg_bits = 32,
277 	.val_bits = 32,
278 	.reg_read = xe_i2c_read,
279 	.reg_write = xe_i2c_write,
280 	.fast_io = true,
281 };
282 
283 void xe_i2c_pm_suspend(struct xe_device *xe)
284 {
285 	struct xe_mmio *mmio = xe_root_tile_mmio(xe);
286 
287 	if (!xe_i2c_present(xe))
288 		return;
289 
290 	xe_mmio_rmw32(mmio, I2C_CONFIG_PMCSR, PCI_PM_CTRL_STATE_MASK, (__force u32)PCI_D3hot);
291 	drm_dbg(&xe->drm, "pmcsr: 0x%08x\n", xe_mmio_read32(mmio, I2C_CONFIG_PMCSR));
292 }
293 
294 void xe_i2c_pm_resume(struct xe_device *xe, bool d3cold)
295 {
296 	struct xe_mmio *mmio = xe_root_tile_mmio(xe);
297 
298 	if (!xe_i2c_present(xe))
299 		return;
300 
301 	if (d3cold)
302 		xe_mmio_rmw32(mmio, I2C_CONFIG_CMD, 0, PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
303 
304 	xe_mmio_rmw32(mmio, I2C_CONFIG_PMCSR, PCI_PM_CTRL_STATE_MASK, (__force u32)PCI_D0);
305 	drm_dbg(&xe->drm, "pmcsr: 0x%08x\n", xe_mmio_read32(mmio, I2C_CONFIG_PMCSR));
306 }
307 
308 static void xe_i2c_remove(void *data)
309 {
310 	struct xe_i2c *i2c = data;
311 	unsigned int i;
312 
313 	for (i = 0; i < XE_I2C_MAX_CLIENTS; i++)
314 		i2c_unregister_device(i2c->client[i]);
315 
316 	bus_unregister_notifier(&i2c_bus_type, &i2c->bus_notifier);
317 	xe_i2c_unregister_adapter(i2c);
318 	xe_i2c_remove_irq(i2c);
319 }
320 
321 /**
322  * xe_i2c_probe: Probe the I2C host adapter and the I2C clients attached to it
323  * @xe: xe device instance
324  *
325  * Register all the I2C devices described in the I2C Endpoint data structure.
326  *
327  * Return: 0 on success, error code on failure
328  */
329 int xe_i2c_probe(struct xe_device *xe)
330 {
331 	struct device *drm_dev = xe->drm.dev;
332 	struct xe_i2c_endpoint ep;
333 	struct regmap *regmap;
334 	struct xe_i2c *i2c;
335 	int ret;
336 
337 	if (!xe->info.has_i2c)
338 		return 0;
339 
340 	if (IS_SRIOV_VF(xe))
341 		return 0;
342 
343 	xe_i2c_read_endpoint(xe_root_tile_mmio(xe), &ep);
344 	if (ep.cookie != XE_I2C_EP_COOKIE_DEVICE)
345 		return 0;
346 
347 	i2c = devm_kzalloc(drm_dev, sizeof(*i2c), GFP_KERNEL);
348 	if (!i2c)
349 		return -ENOMEM;
350 
351 	INIT_WORK(&i2c->work, xe_i2c_client_work);
352 	i2c->mmio = xe_root_tile_mmio(xe);
353 	i2c->drm_dev = drm_dev;
354 	i2c->ep = ep;
355 	xe->i2c = i2c;
356 
357 	/* PCI PM isn't aware of this device, bring it up and match it with SGUnit state. */
358 	xe_i2c_pm_resume(xe, true);
359 
360 	regmap = devm_regmap_init(drm_dev, NULL, i2c, &i2c_regmap_config);
361 	if (IS_ERR(regmap))
362 		return PTR_ERR(regmap);
363 
364 	i2c->bus_notifier.notifier_call = xe_i2c_notifier;
365 	ret = bus_register_notifier(&i2c_bus_type, &i2c->bus_notifier);
366 	if (ret)
367 		return ret;
368 
369 	ret = xe_i2c_create_irq(xe);
370 	if (ret)
371 		goto err_unregister_notifier;
372 
373 	ret = xe_i2c_register_adapter(i2c);
374 	if (ret)
375 		goto err_remove_irq;
376 
377 	xe_i2c_irq_postinstall(xe);
378 	return devm_add_action_or_reset(drm_dev, xe_i2c_remove, i2c);
379 
380 err_remove_irq:
381 	xe_i2c_remove_irq(i2c);
382 
383 err_unregister_notifier:
384 	bus_unregister_notifier(&i2c_bus_type, &i2c->bus_notifier);
385 
386 	return ret;
387 }
388