xref: /linux/drivers/gpu/drm/xe/xe_heci_gsc.h (revision 24168c5e6dfbdd5b414f048f47f75d64533296ca)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright(c) 2023, Intel Corporation. All rights reserved.
4  */
5 #ifndef __XE_HECI_GSC_DEV_H__
6 #define __XE_HECI_GSC_DEV_H__
7 
8 #include <linux/types.h>
9 
10 struct xe_device;
11 struct mei_aux_device;
12 
13 /*
14  * The HECI1 bit corresponds to bit15 and HECI2 to bit14.
15  * The reason for this is to allow growth for more interfaces in the future.
16  */
17 #define GSC_IRQ_INTF(_x)  BIT(15 - (_x))
18 
19 /**
20  * struct xe_heci_gsc - graphics security controller for xe, HECI interface
21  *
22  * @adev : pointer to mei auxiliary device structure
23  * @irq : irq number
24  *
25  */
26 struct xe_heci_gsc {
27 	struct mei_aux_device *adev;
28 	int irq;
29 };
30 
31 void xe_heci_gsc_init(struct xe_device *xe);
32 void xe_heci_gsc_fini(struct xe_device *xe);
33 void xe_heci_gsc_irq_handler(struct xe_device *xe, u32 iir);
34 
35 #endif /* __XE_HECI_GSC_DEV_H__ */
36