1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright(c) 2023, Intel Corporation. All rights reserved. 4 */ 5 6 #include <linux/irq.h> 7 #include <linux/mei_aux.h> 8 #include <linux/pci.h> 9 #include <linux/sizes.h> 10 11 #include <drm/drm_print.h> 12 13 #include "xe_device_types.h" 14 #include "xe_heci_gsc.h" 15 #include "regs/xe_gsc_regs.h" 16 #include "xe_platform_types.h" 17 #include "xe_survivability_mode.h" 18 19 #define GSC_BAR_LENGTH 0x00000FFC 20 21 static void heci_gsc_irq_mask(struct irq_data *d) 22 { 23 /* generic irq handling */ 24 } 25 26 static void heci_gsc_irq_unmask(struct irq_data *d) 27 { 28 /* generic irq handling */ 29 } 30 31 static const struct irq_chip heci_gsc_irq_chip = { 32 .name = "gsc_irq_chip", 33 .irq_mask = heci_gsc_irq_mask, 34 .irq_unmask = heci_gsc_irq_unmask, 35 }; 36 37 static int heci_gsc_irq_init(int irq) 38 { 39 irq_set_chip_and_handler_name(irq, &heci_gsc_irq_chip, 40 handle_simple_irq, "heci_gsc_irq_handler"); 41 42 return irq_set_chip_data(irq, NULL); 43 } 44 45 /** 46 * struct heci_gsc_def - graphics security controller heci interface definitions 47 * 48 * @name: name of the heci device 49 * @bar: address of the mmio bar 50 * @bar_size: size of the mmio bar 51 * @use_polling: indication of using polling mode for the device 52 * @slow_firmware: indication of whether the device is slow (needs longer timeouts) 53 */ 54 struct heci_gsc_def { 55 const char *name; 56 unsigned long bar; 57 size_t bar_size; 58 bool use_polling; 59 bool slow_firmware; 60 }; 61 62 /* gsc resources and definitions */ 63 static const struct heci_gsc_def heci_gsc_def_dg1 = { 64 .name = "mei-gscfi", 65 .bar = DG1_GSC_HECI2_BASE, 66 .bar_size = GSC_BAR_LENGTH, 67 }; 68 69 static const struct heci_gsc_def heci_gsc_def_dg2 = { 70 .name = "mei-gscfi", 71 .bar = DG2_GSC_HECI2_BASE, 72 .bar_size = GSC_BAR_LENGTH, 73 }; 74 75 static const struct heci_gsc_def heci_gsc_def_pvc = { 76 .name = "mei-gscfi", 77 .bar = PVC_GSC_HECI2_BASE, 78 .bar_size = GSC_BAR_LENGTH, 79 .slow_firmware = true, 80 }; 81 82 static void heci_gsc_release_dev(struct device *dev) 83 { 84 struct auxiliary_device *aux_dev = to_auxiliary_dev(dev); 85 struct mei_aux_device *adev = auxiliary_dev_to_mei_aux_dev(aux_dev); 86 87 kfree(adev); 88 } 89 90 static void xe_heci_gsc_fini(void *arg) 91 { 92 struct xe_heci_gsc *heci_gsc = arg; 93 94 if (heci_gsc->adev) { 95 struct auxiliary_device *aux_dev = &heci_gsc->adev->aux_dev; 96 97 auxiliary_device_delete(aux_dev); 98 auxiliary_device_uninit(aux_dev); 99 heci_gsc->adev = NULL; 100 } 101 102 if (heci_gsc->irq >= 0) 103 irq_free_desc(heci_gsc->irq); 104 105 heci_gsc->irq = -1; 106 } 107 108 static int heci_gsc_irq_setup(struct xe_device *xe) 109 { 110 struct xe_heci_gsc *heci_gsc = &xe->heci_gsc; 111 int ret; 112 113 heci_gsc->irq = irq_alloc_desc(0); 114 if (heci_gsc->irq < 0) { 115 drm_err(&xe->drm, "gsc irq error %d\n", heci_gsc->irq); 116 return heci_gsc->irq; 117 } 118 119 ret = heci_gsc_irq_init(heci_gsc->irq); 120 if (ret < 0) 121 drm_err(&xe->drm, "gsc irq init failed %d\n", ret); 122 123 return ret; 124 } 125 126 static int heci_gsc_add_device(struct xe_device *xe, const struct heci_gsc_def *def) 127 { 128 struct xe_heci_gsc *heci_gsc = &xe->heci_gsc; 129 struct pci_dev *pdev = to_pci_dev(xe->drm.dev); 130 struct auxiliary_device *aux_dev; 131 struct mei_aux_device *adev; 132 int ret; 133 134 adev = kzalloc_obj(*adev); 135 if (!adev) 136 return -ENOMEM; 137 adev->irq = heci_gsc->irq; 138 adev->bar.parent = &pdev->resource[0]; 139 adev->bar.start = def->bar + pdev->resource[0].start; 140 adev->bar.end = adev->bar.start + def->bar_size - 1; 141 adev->bar.flags = IORESOURCE_MEM; 142 adev->bar.desc = IORES_DESC_NONE; 143 adev->slow_firmware = def->slow_firmware; 144 145 aux_dev = &adev->aux_dev; 146 aux_dev->name = def->name; 147 aux_dev->id = (pci_domain_nr(pdev->bus) << 16) | 148 PCI_DEVID(pdev->bus->number, pdev->devfn); 149 aux_dev->dev.parent = &pdev->dev; 150 aux_dev->dev.release = heci_gsc_release_dev; 151 152 ret = auxiliary_device_init(aux_dev); 153 if (ret < 0) { 154 drm_err(&xe->drm, "gsc aux init failed %d\n", ret); 155 kfree(adev); 156 return ret; 157 } 158 159 heci_gsc->adev = adev; /* needed by the notifier */ 160 ret = auxiliary_device_add(aux_dev); 161 if (ret < 0) { 162 drm_err(&xe->drm, "gsc aux add failed %d\n", ret); 163 heci_gsc->adev = NULL; 164 165 /* adev will be freed with the put_device() and .release sequence */ 166 auxiliary_device_uninit(aux_dev); 167 } 168 return ret; 169 } 170 171 int xe_heci_gsc_init(struct xe_device *xe) 172 { 173 struct xe_heci_gsc *heci_gsc = &xe->heci_gsc; 174 const struct heci_gsc_def *def = NULL; 175 int ret; 176 177 if (!xe->info.has_heci_gscfi && !xe->info.has_heci_cscfi) 178 return 0; 179 180 heci_gsc->irq = -1; 181 182 if (xe->info.platform == XE_BATTLEMAGE) { 183 def = &heci_gsc_def_dg2; 184 } else if (xe->info.platform == XE_PVC) { 185 def = &heci_gsc_def_pvc; 186 } else if (xe->info.platform == XE_DG2) { 187 def = &heci_gsc_def_dg2; 188 } else if (xe->info.platform == XE_DG1) { 189 def = &heci_gsc_def_dg1; 190 } 191 192 if (!def || !def->name) { 193 drm_warn(&xe->drm, "HECI is not implemented!\n"); 194 return 0; 195 } 196 197 ret = devm_add_action_or_reset(xe->drm.dev, xe_heci_gsc_fini, heci_gsc); 198 if (ret) 199 return ret; 200 201 if (!def->use_polling && !xe_survivability_mode_is_boot_enabled(xe)) { 202 ret = heci_gsc_irq_setup(xe); 203 if (ret) 204 return ret; 205 } 206 207 return heci_gsc_add_device(xe, def); 208 } 209 210 void xe_heci_gsc_irq_handler(struct xe_device *xe, u32 iir) 211 { 212 int ret; 213 214 if ((iir & GSC_IRQ_INTF(1)) == 0) 215 return; 216 217 if (!xe->info.has_heci_gscfi) { 218 drm_warn_once(&xe->drm, "GSC irq: not supported"); 219 return; 220 } 221 222 if (xe->heci_gsc.irq < 0) 223 return; 224 225 ret = generic_handle_irq_safe(xe->heci_gsc.irq); 226 if (ret) 227 drm_err_ratelimited(&xe->drm, "error handling GSC irq: %d\n", ret); 228 } 229 230 void xe_heci_csc_irq_handler(struct xe_device *xe, u32 iir) 231 { 232 int ret; 233 234 if ((iir & CSC_IRQ_INTF(1)) == 0) 235 return; 236 237 if (!xe->info.has_heci_cscfi) { 238 drm_warn_once(&xe->drm, "CSC irq: not supported"); 239 return; 240 } 241 242 if (xe->heci_gsc.irq < 0) 243 return; 244 245 ret = generic_handle_irq_safe(xe->heci_gsc.irq); 246 if (ret) 247 drm_err_ratelimited(&xe->drm, "error handling GSC irq: %d\n", ret); 248 } 249