xref: /linux/drivers/gpu/drm/xe/xe_guc_submit.c (revision e3610441d1fb47b1f00e4c38bdf333176e824729)
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2022 Intel Corporation
4  */
5 
6 #include "xe_guc_submit.h"
7 
8 #include <linux/bitfield.h>
9 #include <linux/bitmap.h>
10 #include <linux/circ_buf.h>
11 #include <linux/delay.h>
12 #include <linux/dma-fence-array.h>
13 #include <linux/math64.h>
14 
15 #include <drm/drm_managed.h>
16 
17 #include "abi/guc_actions_abi.h"
18 #include "abi/guc_klvs_abi.h"
19 #include "regs/xe_lrc_layout.h"
20 #include "xe_assert.h"
21 #include "xe_devcoredump.h"
22 #include "xe_device.h"
23 #include "xe_exec_queue.h"
24 #include "xe_force_wake.h"
25 #include "xe_gpu_scheduler.h"
26 #include "xe_gt.h"
27 #include "xe_gt_clock.h"
28 #include "xe_gt_printk.h"
29 #include "xe_guc.h"
30 #include "xe_guc_capture.h"
31 #include "xe_guc_ct.h"
32 #include "xe_guc_exec_queue_types.h"
33 #include "xe_guc_id_mgr.h"
34 #include "xe_guc_submit_types.h"
35 #include "xe_hw_engine.h"
36 #include "xe_hw_fence.h"
37 #include "xe_lrc.h"
38 #include "xe_macros.h"
39 #include "xe_map.h"
40 #include "xe_mocs.h"
41 #include "xe_pm.h"
42 #include "xe_ring_ops_types.h"
43 #include "xe_sched_job.h"
44 #include "xe_trace.h"
45 #include "xe_vm.h"
46 
47 static struct xe_guc *
48 exec_queue_to_guc(struct xe_exec_queue *q)
49 {
50 	return &q->gt->uc.guc;
51 }
52 
53 /*
54  * Helpers for engine state, using an atomic as some of the bits can transition
55  * as the same time (e.g. a suspend can be happning at the same time as schedule
56  * engine done being processed).
57  */
58 #define EXEC_QUEUE_STATE_REGISTERED		(1 << 0)
59 #define EXEC_QUEUE_STATE_ENABLED		(1 << 1)
60 #define EXEC_QUEUE_STATE_PENDING_ENABLE		(1 << 2)
61 #define EXEC_QUEUE_STATE_PENDING_DISABLE	(1 << 3)
62 #define EXEC_QUEUE_STATE_DESTROYED		(1 << 4)
63 #define EXEC_QUEUE_STATE_SUSPENDED		(1 << 5)
64 #define EXEC_QUEUE_STATE_RESET			(1 << 6)
65 #define EXEC_QUEUE_STATE_KILLED			(1 << 7)
66 #define EXEC_QUEUE_STATE_WEDGED			(1 << 8)
67 #define EXEC_QUEUE_STATE_BANNED			(1 << 9)
68 #define EXEC_QUEUE_STATE_CHECK_TIMEOUT		(1 << 10)
69 #define EXEC_QUEUE_STATE_EXTRA_REF		(1 << 11)
70 
71 static bool exec_queue_registered(struct xe_exec_queue *q)
72 {
73 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_REGISTERED;
74 }
75 
76 static void set_exec_queue_registered(struct xe_exec_queue *q)
77 {
78 	atomic_or(EXEC_QUEUE_STATE_REGISTERED, &q->guc->state);
79 }
80 
81 static void clear_exec_queue_registered(struct xe_exec_queue *q)
82 {
83 	atomic_and(~EXEC_QUEUE_STATE_REGISTERED, &q->guc->state);
84 }
85 
86 static bool exec_queue_enabled(struct xe_exec_queue *q)
87 {
88 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_ENABLED;
89 }
90 
91 static void set_exec_queue_enabled(struct xe_exec_queue *q)
92 {
93 	atomic_or(EXEC_QUEUE_STATE_ENABLED, &q->guc->state);
94 }
95 
96 static void clear_exec_queue_enabled(struct xe_exec_queue *q)
97 {
98 	atomic_and(~EXEC_QUEUE_STATE_ENABLED, &q->guc->state);
99 }
100 
101 static bool exec_queue_pending_enable(struct xe_exec_queue *q)
102 {
103 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_PENDING_ENABLE;
104 }
105 
106 static void set_exec_queue_pending_enable(struct xe_exec_queue *q)
107 {
108 	atomic_or(EXEC_QUEUE_STATE_PENDING_ENABLE, &q->guc->state);
109 }
110 
111 static void clear_exec_queue_pending_enable(struct xe_exec_queue *q)
112 {
113 	atomic_and(~EXEC_QUEUE_STATE_PENDING_ENABLE, &q->guc->state);
114 }
115 
116 static bool exec_queue_pending_disable(struct xe_exec_queue *q)
117 {
118 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_PENDING_DISABLE;
119 }
120 
121 static void set_exec_queue_pending_disable(struct xe_exec_queue *q)
122 {
123 	atomic_or(EXEC_QUEUE_STATE_PENDING_DISABLE, &q->guc->state);
124 }
125 
126 static void clear_exec_queue_pending_disable(struct xe_exec_queue *q)
127 {
128 	atomic_and(~EXEC_QUEUE_STATE_PENDING_DISABLE, &q->guc->state);
129 }
130 
131 static bool exec_queue_destroyed(struct xe_exec_queue *q)
132 {
133 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_DESTROYED;
134 }
135 
136 static void set_exec_queue_destroyed(struct xe_exec_queue *q)
137 {
138 	atomic_or(EXEC_QUEUE_STATE_DESTROYED, &q->guc->state);
139 }
140 
141 static bool exec_queue_banned(struct xe_exec_queue *q)
142 {
143 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_BANNED;
144 }
145 
146 static void set_exec_queue_banned(struct xe_exec_queue *q)
147 {
148 	atomic_or(EXEC_QUEUE_STATE_BANNED, &q->guc->state);
149 }
150 
151 static bool exec_queue_suspended(struct xe_exec_queue *q)
152 {
153 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_SUSPENDED;
154 }
155 
156 static void set_exec_queue_suspended(struct xe_exec_queue *q)
157 {
158 	atomic_or(EXEC_QUEUE_STATE_SUSPENDED, &q->guc->state);
159 }
160 
161 static void clear_exec_queue_suspended(struct xe_exec_queue *q)
162 {
163 	atomic_and(~EXEC_QUEUE_STATE_SUSPENDED, &q->guc->state);
164 }
165 
166 static bool exec_queue_reset(struct xe_exec_queue *q)
167 {
168 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_RESET;
169 }
170 
171 static void set_exec_queue_reset(struct xe_exec_queue *q)
172 {
173 	atomic_or(EXEC_QUEUE_STATE_RESET, &q->guc->state);
174 }
175 
176 static bool exec_queue_killed(struct xe_exec_queue *q)
177 {
178 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_KILLED;
179 }
180 
181 static void set_exec_queue_killed(struct xe_exec_queue *q)
182 {
183 	atomic_or(EXEC_QUEUE_STATE_KILLED, &q->guc->state);
184 }
185 
186 static bool exec_queue_wedged(struct xe_exec_queue *q)
187 {
188 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_WEDGED;
189 }
190 
191 static void set_exec_queue_wedged(struct xe_exec_queue *q)
192 {
193 	atomic_or(EXEC_QUEUE_STATE_WEDGED, &q->guc->state);
194 }
195 
196 static bool exec_queue_check_timeout(struct xe_exec_queue *q)
197 {
198 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_CHECK_TIMEOUT;
199 }
200 
201 static void set_exec_queue_check_timeout(struct xe_exec_queue *q)
202 {
203 	atomic_or(EXEC_QUEUE_STATE_CHECK_TIMEOUT, &q->guc->state);
204 }
205 
206 static void clear_exec_queue_check_timeout(struct xe_exec_queue *q)
207 {
208 	atomic_and(~EXEC_QUEUE_STATE_CHECK_TIMEOUT, &q->guc->state);
209 }
210 
211 static bool exec_queue_extra_ref(struct xe_exec_queue *q)
212 {
213 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_EXTRA_REF;
214 }
215 
216 static void set_exec_queue_extra_ref(struct xe_exec_queue *q)
217 {
218 	atomic_or(EXEC_QUEUE_STATE_EXTRA_REF, &q->guc->state);
219 }
220 
221 static bool exec_queue_killed_or_banned_or_wedged(struct xe_exec_queue *q)
222 {
223 	return (atomic_read(&q->guc->state) &
224 		(EXEC_QUEUE_STATE_WEDGED | EXEC_QUEUE_STATE_KILLED |
225 		 EXEC_QUEUE_STATE_BANNED));
226 }
227 
228 static void guc_submit_fini(struct drm_device *drm, void *arg)
229 {
230 	struct xe_guc *guc = arg;
231 
232 	xa_destroy(&guc->submission_state.exec_queue_lookup);
233 }
234 
235 static void guc_submit_wedged_fini(void *arg)
236 {
237 	struct xe_guc *guc = arg;
238 	struct xe_exec_queue *q;
239 	unsigned long index;
240 
241 	mutex_lock(&guc->submission_state.lock);
242 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
243 		if (exec_queue_wedged(q)) {
244 			mutex_unlock(&guc->submission_state.lock);
245 			xe_exec_queue_put(q);
246 			mutex_lock(&guc->submission_state.lock);
247 		}
248 	}
249 	mutex_unlock(&guc->submission_state.lock);
250 }
251 
252 static const struct xe_exec_queue_ops guc_exec_queue_ops;
253 
254 static void primelockdep(struct xe_guc *guc)
255 {
256 	if (!IS_ENABLED(CONFIG_LOCKDEP))
257 		return;
258 
259 	fs_reclaim_acquire(GFP_KERNEL);
260 
261 	mutex_lock(&guc->submission_state.lock);
262 	mutex_unlock(&guc->submission_state.lock);
263 
264 	fs_reclaim_release(GFP_KERNEL);
265 }
266 
267 /**
268  * xe_guc_submit_init() - Initialize GuC submission.
269  * @guc: the &xe_guc to initialize
270  * @num_ids: number of GuC context IDs to use
271  *
272  * The bare-metal or PF driver can pass ~0 as &num_ids to indicate that all
273  * GuC context IDs supported by the GuC firmware should be used for submission.
274  *
275  * Only VF drivers will have to provide explicit number of GuC context IDs
276  * that they can use for submission.
277  *
278  * Return: 0 on success or a negative error code on failure.
279  */
280 int xe_guc_submit_init(struct xe_guc *guc, unsigned int num_ids)
281 {
282 	struct xe_device *xe = guc_to_xe(guc);
283 	struct xe_gt *gt = guc_to_gt(guc);
284 	int err;
285 
286 	err = drmm_mutex_init(&xe->drm, &guc->submission_state.lock);
287 	if (err)
288 		return err;
289 
290 	err = xe_guc_id_mgr_init(&guc->submission_state.idm, num_ids);
291 	if (err)
292 		return err;
293 
294 	gt->exec_queue_ops = &guc_exec_queue_ops;
295 
296 	xa_init(&guc->submission_state.exec_queue_lookup);
297 
298 	init_waitqueue_head(&guc->submission_state.fini_wq);
299 
300 	primelockdep(guc);
301 
302 	return drmm_add_action_or_reset(&xe->drm, guc_submit_fini, guc);
303 }
304 
305 static void __release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q, u32 xa_count)
306 {
307 	int i;
308 
309 	lockdep_assert_held(&guc->submission_state.lock);
310 
311 	for (i = 0; i < xa_count; ++i)
312 		xa_erase(&guc->submission_state.exec_queue_lookup, q->guc->id + i);
313 
314 	xe_guc_id_mgr_release_locked(&guc->submission_state.idm,
315 				     q->guc->id, q->width);
316 
317 	if (xa_empty(&guc->submission_state.exec_queue_lookup))
318 		wake_up(&guc->submission_state.fini_wq);
319 }
320 
321 static int alloc_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
322 {
323 	int ret;
324 	int i;
325 
326 	/*
327 	 * Must use GFP_NOWAIT as this lock is in the dma fence signalling path,
328 	 * worse case user gets -ENOMEM on engine create and has to try again.
329 	 *
330 	 * FIXME: Have caller pre-alloc or post-alloc /w GFP_KERNEL to prevent
331 	 * failure.
332 	 */
333 	lockdep_assert_held(&guc->submission_state.lock);
334 
335 	ret = xe_guc_id_mgr_reserve_locked(&guc->submission_state.idm,
336 					   q->width);
337 	if (ret < 0)
338 		return ret;
339 
340 	q->guc->id = ret;
341 
342 	for (i = 0; i < q->width; ++i) {
343 		ret = xa_err(xa_store(&guc->submission_state.exec_queue_lookup,
344 				      q->guc->id + i, q, GFP_NOWAIT));
345 		if (ret)
346 			goto err_release;
347 	}
348 
349 	return 0;
350 
351 err_release:
352 	__release_guc_id(guc, q, i);
353 
354 	return ret;
355 }
356 
357 static void release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
358 {
359 	mutex_lock(&guc->submission_state.lock);
360 	__release_guc_id(guc, q, q->width);
361 	mutex_unlock(&guc->submission_state.lock);
362 }
363 
364 struct exec_queue_policy {
365 	u32 count;
366 	struct guc_update_exec_queue_policy h2g;
367 };
368 
369 static u32 __guc_exec_queue_policy_action_size(struct exec_queue_policy *policy)
370 {
371 	size_t bytes = sizeof(policy->h2g.header) +
372 		       (sizeof(policy->h2g.klv[0]) * policy->count);
373 
374 	return bytes / sizeof(u32);
375 }
376 
377 static void __guc_exec_queue_policy_start_klv(struct exec_queue_policy *policy,
378 					      u16 guc_id)
379 {
380 	policy->h2g.header.action =
381 		XE_GUC_ACTION_HOST2GUC_UPDATE_CONTEXT_POLICIES;
382 	policy->h2g.header.guc_id = guc_id;
383 	policy->count = 0;
384 }
385 
386 #define MAKE_EXEC_QUEUE_POLICY_ADD(func, id) \
387 static void __guc_exec_queue_policy_add_##func(struct exec_queue_policy *policy, \
388 					   u32 data) \
389 { \
390 	XE_WARN_ON(policy->count >= GUC_CONTEXT_POLICIES_KLV_NUM_IDS); \
391 \
392 	policy->h2g.klv[policy->count].kl = \
393 		FIELD_PREP(GUC_KLV_0_KEY, \
394 			   GUC_CONTEXT_POLICIES_KLV_ID_##id) | \
395 		FIELD_PREP(GUC_KLV_0_LEN, 1); \
396 	policy->h2g.klv[policy->count].value = data; \
397 	policy->count++; \
398 }
399 
400 MAKE_EXEC_QUEUE_POLICY_ADD(execution_quantum, EXECUTION_QUANTUM)
401 MAKE_EXEC_QUEUE_POLICY_ADD(preemption_timeout, PREEMPTION_TIMEOUT)
402 MAKE_EXEC_QUEUE_POLICY_ADD(priority, SCHEDULING_PRIORITY)
403 #undef MAKE_EXEC_QUEUE_POLICY_ADD
404 
405 static const int xe_exec_queue_prio_to_guc[] = {
406 	[XE_EXEC_QUEUE_PRIORITY_LOW] = GUC_CLIENT_PRIORITY_NORMAL,
407 	[XE_EXEC_QUEUE_PRIORITY_NORMAL] = GUC_CLIENT_PRIORITY_KMD_NORMAL,
408 	[XE_EXEC_QUEUE_PRIORITY_HIGH] = GUC_CLIENT_PRIORITY_HIGH,
409 	[XE_EXEC_QUEUE_PRIORITY_KERNEL] = GUC_CLIENT_PRIORITY_KMD_HIGH,
410 };
411 
412 static void init_policies(struct xe_guc *guc, struct xe_exec_queue *q)
413 {
414 	struct exec_queue_policy policy;
415 	enum xe_exec_queue_priority prio = q->sched_props.priority;
416 	u32 timeslice_us = q->sched_props.timeslice_us;
417 	u32 preempt_timeout_us = q->sched_props.preempt_timeout_us;
418 
419 	xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q));
420 
421 	__guc_exec_queue_policy_start_klv(&policy, q->guc->id);
422 	__guc_exec_queue_policy_add_priority(&policy, xe_exec_queue_prio_to_guc[prio]);
423 	__guc_exec_queue_policy_add_execution_quantum(&policy, timeslice_us);
424 	__guc_exec_queue_policy_add_preemption_timeout(&policy, preempt_timeout_us);
425 
426 	xe_guc_ct_send(&guc->ct, (u32 *)&policy.h2g,
427 		       __guc_exec_queue_policy_action_size(&policy), 0, 0);
428 }
429 
430 static void set_min_preemption_timeout(struct xe_guc *guc, struct xe_exec_queue *q)
431 {
432 	struct exec_queue_policy policy;
433 
434 	__guc_exec_queue_policy_start_klv(&policy, q->guc->id);
435 	__guc_exec_queue_policy_add_preemption_timeout(&policy, 1);
436 
437 	xe_guc_ct_send(&guc->ct, (u32 *)&policy.h2g,
438 		       __guc_exec_queue_policy_action_size(&policy), 0, 0);
439 }
440 
441 #define parallel_read(xe_, map_, field_) \
442 	xe_map_rd_field(xe_, &map_, 0, struct guc_submit_parallel_scratch, \
443 			field_)
444 #define parallel_write(xe_, map_, field_, val_) \
445 	xe_map_wr_field(xe_, &map_, 0, struct guc_submit_parallel_scratch, \
446 			field_, val_)
447 
448 static void __register_mlrc_exec_queue(struct xe_guc *guc,
449 				       struct xe_exec_queue *q,
450 				       struct guc_ctxt_registration_info *info)
451 {
452 #define MAX_MLRC_REG_SIZE      (13 + XE_HW_ENGINE_MAX_INSTANCE * 2)
453 	u32 action[MAX_MLRC_REG_SIZE];
454 	int len = 0;
455 	int i;
456 
457 	xe_gt_assert(guc_to_gt(guc), xe_exec_queue_is_parallel(q));
458 
459 	action[len++] = XE_GUC_ACTION_REGISTER_CONTEXT_MULTI_LRC;
460 	action[len++] = info->flags;
461 	action[len++] = info->context_idx;
462 	action[len++] = info->engine_class;
463 	action[len++] = info->engine_submit_mask;
464 	action[len++] = info->wq_desc_lo;
465 	action[len++] = info->wq_desc_hi;
466 	action[len++] = info->wq_base_lo;
467 	action[len++] = info->wq_base_hi;
468 	action[len++] = info->wq_size;
469 	action[len++] = q->width;
470 	action[len++] = info->hwlrca_lo;
471 	action[len++] = info->hwlrca_hi;
472 
473 	for (i = 1; i < q->width; ++i) {
474 		struct xe_lrc *lrc = q->lrc[i];
475 
476 		action[len++] = lower_32_bits(xe_lrc_descriptor(lrc));
477 		action[len++] = upper_32_bits(xe_lrc_descriptor(lrc));
478 	}
479 
480 	xe_gt_assert(guc_to_gt(guc), len <= MAX_MLRC_REG_SIZE);
481 #undef MAX_MLRC_REG_SIZE
482 
483 	xe_guc_ct_send(&guc->ct, action, len, 0, 0);
484 }
485 
486 static void __register_exec_queue(struct xe_guc *guc,
487 				  struct guc_ctxt_registration_info *info)
488 {
489 	u32 action[] = {
490 		XE_GUC_ACTION_REGISTER_CONTEXT,
491 		info->flags,
492 		info->context_idx,
493 		info->engine_class,
494 		info->engine_submit_mask,
495 		info->wq_desc_lo,
496 		info->wq_desc_hi,
497 		info->wq_base_lo,
498 		info->wq_base_hi,
499 		info->wq_size,
500 		info->hwlrca_lo,
501 		info->hwlrca_hi,
502 	};
503 
504 	xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action), 0, 0);
505 }
506 
507 static void register_exec_queue(struct xe_exec_queue *q)
508 {
509 	struct xe_guc *guc = exec_queue_to_guc(q);
510 	struct xe_device *xe = guc_to_xe(guc);
511 	struct xe_lrc *lrc = q->lrc[0];
512 	struct guc_ctxt_registration_info info;
513 
514 	xe_gt_assert(guc_to_gt(guc), !exec_queue_registered(q));
515 
516 	memset(&info, 0, sizeof(info));
517 	info.context_idx = q->guc->id;
518 	info.engine_class = xe_engine_class_to_guc_class(q->class);
519 	info.engine_submit_mask = q->logical_mask;
520 	info.hwlrca_lo = lower_32_bits(xe_lrc_descriptor(lrc));
521 	info.hwlrca_hi = upper_32_bits(xe_lrc_descriptor(lrc));
522 	info.flags = CONTEXT_REGISTRATION_FLAG_KMD;
523 
524 	if (xe_exec_queue_is_parallel(q)) {
525 		u64 ggtt_addr = xe_lrc_parallel_ggtt_addr(lrc);
526 		struct iosys_map map = xe_lrc_parallel_map(lrc);
527 
528 		info.wq_desc_lo = lower_32_bits(ggtt_addr +
529 			offsetof(struct guc_submit_parallel_scratch, wq_desc));
530 		info.wq_desc_hi = upper_32_bits(ggtt_addr +
531 			offsetof(struct guc_submit_parallel_scratch, wq_desc));
532 		info.wq_base_lo = lower_32_bits(ggtt_addr +
533 			offsetof(struct guc_submit_parallel_scratch, wq[0]));
534 		info.wq_base_hi = upper_32_bits(ggtt_addr +
535 			offsetof(struct guc_submit_parallel_scratch, wq[0]));
536 		info.wq_size = WQ_SIZE;
537 
538 		q->guc->wqi_head = 0;
539 		q->guc->wqi_tail = 0;
540 		xe_map_memset(xe, &map, 0, 0, PARALLEL_SCRATCH_SIZE - WQ_SIZE);
541 		parallel_write(xe, map, wq_desc.wq_status, WQ_STATUS_ACTIVE);
542 	}
543 
544 	/*
545 	 * We must keep a reference for LR engines if engine is registered with
546 	 * the GuC as jobs signal immediately and can't destroy an engine if the
547 	 * GuC has a reference to it.
548 	 */
549 	if (xe_exec_queue_is_lr(q))
550 		xe_exec_queue_get(q);
551 
552 	set_exec_queue_registered(q);
553 	trace_xe_exec_queue_register(q);
554 	if (xe_exec_queue_is_parallel(q))
555 		__register_mlrc_exec_queue(guc, q, &info);
556 	else
557 		__register_exec_queue(guc, &info);
558 	init_policies(guc, q);
559 }
560 
561 static u32 wq_space_until_wrap(struct xe_exec_queue *q)
562 {
563 	return (WQ_SIZE - q->guc->wqi_tail);
564 }
565 
566 static int wq_wait_for_space(struct xe_exec_queue *q, u32 wqi_size)
567 {
568 	struct xe_guc *guc = exec_queue_to_guc(q);
569 	struct xe_device *xe = guc_to_xe(guc);
570 	struct iosys_map map = xe_lrc_parallel_map(q->lrc[0]);
571 	unsigned int sleep_period_ms = 1;
572 
573 #define AVAILABLE_SPACE \
574 	CIRC_SPACE(q->guc->wqi_tail, q->guc->wqi_head, WQ_SIZE)
575 	if (wqi_size > AVAILABLE_SPACE) {
576 try_again:
577 		q->guc->wqi_head = parallel_read(xe, map, wq_desc.head);
578 		if (wqi_size > AVAILABLE_SPACE) {
579 			if (sleep_period_ms == 1024) {
580 				xe_gt_reset_async(q->gt);
581 				return -ENODEV;
582 			}
583 
584 			msleep(sleep_period_ms);
585 			sleep_period_ms <<= 1;
586 			goto try_again;
587 		}
588 	}
589 #undef AVAILABLE_SPACE
590 
591 	return 0;
592 }
593 
594 static int wq_noop_append(struct xe_exec_queue *q)
595 {
596 	struct xe_guc *guc = exec_queue_to_guc(q);
597 	struct xe_device *xe = guc_to_xe(guc);
598 	struct iosys_map map = xe_lrc_parallel_map(q->lrc[0]);
599 	u32 len_dw = wq_space_until_wrap(q) / sizeof(u32) - 1;
600 
601 	if (wq_wait_for_space(q, wq_space_until_wrap(q)))
602 		return -ENODEV;
603 
604 	xe_gt_assert(guc_to_gt(guc), FIELD_FIT(WQ_LEN_MASK, len_dw));
605 
606 	parallel_write(xe, map, wq[q->guc->wqi_tail / sizeof(u32)],
607 		       FIELD_PREP(WQ_TYPE_MASK, WQ_TYPE_NOOP) |
608 		       FIELD_PREP(WQ_LEN_MASK, len_dw));
609 	q->guc->wqi_tail = 0;
610 
611 	return 0;
612 }
613 
614 static void wq_item_append(struct xe_exec_queue *q)
615 {
616 	struct xe_guc *guc = exec_queue_to_guc(q);
617 	struct xe_device *xe = guc_to_xe(guc);
618 	struct iosys_map map = xe_lrc_parallel_map(q->lrc[0]);
619 #define WQ_HEADER_SIZE	4	/* Includes 1 LRC address too */
620 	u32 wqi[XE_HW_ENGINE_MAX_INSTANCE + (WQ_HEADER_SIZE - 1)];
621 	u32 wqi_size = (q->width + (WQ_HEADER_SIZE - 1)) * sizeof(u32);
622 	u32 len_dw = (wqi_size / sizeof(u32)) - 1;
623 	int i = 0, j;
624 
625 	if (wqi_size > wq_space_until_wrap(q)) {
626 		if (wq_noop_append(q))
627 			return;
628 	}
629 	if (wq_wait_for_space(q, wqi_size))
630 		return;
631 
632 	wqi[i++] = FIELD_PREP(WQ_TYPE_MASK, WQ_TYPE_MULTI_LRC) |
633 		FIELD_PREP(WQ_LEN_MASK, len_dw);
634 	wqi[i++] = xe_lrc_descriptor(q->lrc[0]);
635 	wqi[i++] = FIELD_PREP(WQ_GUC_ID_MASK, q->guc->id) |
636 		FIELD_PREP(WQ_RING_TAIL_MASK, q->lrc[0]->ring.tail / sizeof(u64));
637 	wqi[i++] = 0;
638 	for (j = 1; j < q->width; ++j) {
639 		struct xe_lrc *lrc = q->lrc[j];
640 
641 		wqi[i++] = lrc->ring.tail / sizeof(u64);
642 	}
643 
644 	xe_gt_assert(guc_to_gt(guc), i == wqi_size / sizeof(u32));
645 
646 	iosys_map_incr(&map, offsetof(struct guc_submit_parallel_scratch,
647 				      wq[q->guc->wqi_tail / sizeof(u32)]));
648 	xe_map_memcpy_to(xe, &map, 0, wqi, wqi_size);
649 	q->guc->wqi_tail += wqi_size;
650 	xe_gt_assert(guc_to_gt(guc), q->guc->wqi_tail <= WQ_SIZE);
651 
652 	xe_device_wmb(xe);
653 
654 	map = xe_lrc_parallel_map(q->lrc[0]);
655 	parallel_write(xe, map, wq_desc.tail, q->guc->wqi_tail);
656 }
657 
658 #define RESUME_PENDING	~0x0ull
659 static void submit_exec_queue(struct xe_exec_queue *q)
660 {
661 	struct xe_guc *guc = exec_queue_to_guc(q);
662 	struct xe_lrc *lrc = q->lrc[0];
663 	u32 action[3];
664 	u32 g2h_len = 0;
665 	u32 num_g2h = 0;
666 	int len = 0;
667 	bool extra_submit = false;
668 
669 	xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q));
670 
671 	if (xe_exec_queue_is_parallel(q))
672 		wq_item_append(q);
673 	else
674 		xe_lrc_set_ring_tail(lrc, lrc->ring.tail);
675 
676 	if (exec_queue_suspended(q) && !xe_exec_queue_is_parallel(q))
677 		return;
678 
679 	if (!exec_queue_enabled(q) && !exec_queue_suspended(q)) {
680 		action[len++] = XE_GUC_ACTION_SCHED_CONTEXT_MODE_SET;
681 		action[len++] = q->guc->id;
682 		action[len++] = GUC_CONTEXT_ENABLE;
683 		g2h_len = G2H_LEN_DW_SCHED_CONTEXT_MODE_SET;
684 		num_g2h = 1;
685 		if (xe_exec_queue_is_parallel(q))
686 			extra_submit = true;
687 
688 		q->guc->resume_time = RESUME_PENDING;
689 		set_exec_queue_pending_enable(q);
690 		set_exec_queue_enabled(q);
691 		trace_xe_exec_queue_scheduling_enable(q);
692 	} else {
693 		action[len++] = XE_GUC_ACTION_SCHED_CONTEXT;
694 		action[len++] = q->guc->id;
695 		trace_xe_exec_queue_submit(q);
696 	}
697 
698 	xe_guc_ct_send(&guc->ct, action, len, g2h_len, num_g2h);
699 
700 	if (extra_submit) {
701 		len = 0;
702 		action[len++] = XE_GUC_ACTION_SCHED_CONTEXT;
703 		action[len++] = q->guc->id;
704 		trace_xe_exec_queue_submit(q);
705 
706 		xe_guc_ct_send(&guc->ct, action, len, 0, 0);
707 	}
708 }
709 
710 static struct dma_fence *
711 guc_exec_queue_run_job(struct drm_sched_job *drm_job)
712 {
713 	struct xe_sched_job *job = to_xe_sched_job(drm_job);
714 	struct xe_exec_queue *q = job->q;
715 	struct xe_guc *guc = exec_queue_to_guc(q);
716 	struct dma_fence *fence = NULL;
717 	bool lr = xe_exec_queue_is_lr(q);
718 
719 	xe_gt_assert(guc_to_gt(guc), !(exec_queue_destroyed(q) || exec_queue_pending_disable(q)) ||
720 		     exec_queue_banned(q) || exec_queue_suspended(q));
721 
722 	trace_xe_sched_job_run(job);
723 
724 	if (!exec_queue_killed_or_banned_or_wedged(q) && !xe_sched_job_is_error(job)) {
725 		if (!exec_queue_registered(q))
726 			register_exec_queue(q);
727 		if (!lr)	/* LR jobs are emitted in the exec IOCTL */
728 			q->ring_ops->emit_job(job);
729 		submit_exec_queue(q);
730 	}
731 
732 	if (lr) {
733 		xe_sched_job_set_error(job, -EOPNOTSUPP);
734 		dma_fence_put(job->fence);	/* Drop ref from xe_sched_job_arm */
735 	} else {
736 		fence = job->fence;
737 	}
738 
739 	return fence;
740 }
741 
742 static void guc_exec_queue_free_job(struct drm_sched_job *drm_job)
743 {
744 	struct xe_sched_job *job = to_xe_sched_job(drm_job);
745 
746 	trace_xe_sched_job_free(job);
747 	xe_sched_job_put(job);
748 }
749 
750 int xe_guc_read_stopped(struct xe_guc *guc)
751 {
752 	return atomic_read(&guc->submission_state.stopped);
753 }
754 
755 #define MAKE_SCHED_CONTEXT_ACTION(q, enable_disable)			\
756 	u32 action[] = {						\
757 		XE_GUC_ACTION_SCHED_CONTEXT_MODE_SET,			\
758 		q->guc->id,						\
759 		GUC_CONTEXT_##enable_disable,				\
760 	}
761 
762 static void disable_scheduling_deregister(struct xe_guc *guc,
763 					  struct xe_exec_queue *q)
764 {
765 	MAKE_SCHED_CONTEXT_ACTION(q, DISABLE);
766 	int ret;
767 
768 	set_min_preemption_timeout(guc, q);
769 	smp_rmb();
770 	ret = wait_event_timeout(guc->ct.wq,
771 				 (!exec_queue_pending_enable(q) &&
772 				  !exec_queue_pending_disable(q)) ||
773 					 xe_guc_read_stopped(guc),
774 				 HZ * 5);
775 	if (!ret) {
776 		struct xe_gpu_scheduler *sched = &q->guc->sched;
777 
778 		xe_gt_warn(q->gt, "Pending enable/disable failed to respond\n");
779 		xe_sched_submission_start(sched);
780 		xe_gt_reset_async(q->gt);
781 		xe_sched_tdr_queue_imm(sched);
782 		return;
783 	}
784 
785 	clear_exec_queue_enabled(q);
786 	set_exec_queue_pending_disable(q);
787 	set_exec_queue_destroyed(q);
788 	trace_xe_exec_queue_scheduling_disable(q);
789 
790 	/*
791 	 * Reserve space for both G2H here as the 2nd G2H is sent from a G2H
792 	 * handler and we are not allowed to reserved G2H space in handlers.
793 	 */
794 	xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action),
795 		       G2H_LEN_DW_SCHED_CONTEXT_MODE_SET +
796 		       G2H_LEN_DW_DEREGISTER_CONTEXT, 2);
797 }
798 
799 static void xe_guc_exec_queue_trigger_cleanup(struct xe_exec_queue *q)
800 {
801 	struct xe_guc *guc = exec_queue_to_guc(q);
802 	struct xe_device *xe = guc_to_xe(guc);
803 
804 	/** to wakeup xe_wait_user_fence ioctl if exec queue is reset */
805 	wake_up_all(&xe->ufence_wq);
806 
807 	if (xe_exec_queue_is_lr(q))
808 		queue_work(guc_to_gt(guc)->ordered_wq, &q->guc->lr_tdr);
809 	else
810 		xe_sched_tdr_queue_imm(&q->guc->sched);
811 }
812 
813 /**
814  * xe_guc_submit_wedge() - Wedge GuC submission
815  * @guc: the GuC object
816  *
817  * Save exec queue's registered with GuC state by taking a ref to each queue.
818  * Register a DRMM handler to drop refs upon driver unload.
819  */
820 void xe_guc_submit_wedge(struct xe_guc *guc)
821 {
822 	struct xe_gt *gt = guc_to_gt(guc);
823 	struct xe_exec_queue *q;
824 	unsigned long index;
825 	int err;
826 
827 	xe_gt_assert(guc_to_gt(guc), guc_to_xe(guc)->wedged.mode);
828 
829 	err = devm_add_action_or_reset(guc_to_xe(guc)->drm.dev,
830 				       guc_submit_wedged_fini, guc);
831 	if (err) {
832 		xe_gt_err(gt, "Failed to register clean-up on wedged.mode=2; "
833 			  "Although device is wedged.\n");
834 		return;
835 	}
836 
837 	mutex_lock(&guc->submission_state.lock);
838 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
839 		if (xe_exec_queue_get_unless_zero(q))
840 			set_exec_queue_wedged(q);
841 	mutex_unlock(&guc->submission_state.lock);
842 }
843 
844 static bool guc_submit_hint_wedged(struct xe_guc *guc)
845 {
846 	struct xe_device *xe = guc_to_xe(guc);
847 
848 	if (xe->wedged.mode != 2)
849 		return false;
850 
851 	if (xe_device_wedged(xe))
852 		return true;
853 
854 	xe_device_declare_wedged(xe);
855 
856 	return true;
857 }
858 
859 static void xe_guc_exec_queue_lr_cleanup(struct work_struct *w)
860 {
861 	struct xe_guc_exec_queue *ge =
862 		container_of(w, struct xe_guc_exec_queue, lr_tdr);
863 	struct xe_exec_queue *q = ge->q;
864 	struct xe_guc *guc = exec_queue_to_guc(q);
865 	struct xe_gpu_scheduler *sched = &ge->sched;
866 	bool wedged;
867 
868 	xe_gt_assert(guc_to_gt(guc), xe_exec_queue_is_lr(q));
869 	trace_xe_exec_queue_lr_cleanup(q);
870 
871 	wedged = guc_submit_hint_wedged(exec_queue_to_guc(q));
872 
873 	/* Kill the run_job / process_msg entry points */
874 	xe_sched_submission_stop(sched);
875 
876 	/*
877 	 * Engine state now mostly stable, disable scheduling / deregister if
878 	 * needed. This cleanup routine might be called multiple times, where
879 	 * the actual async engine deregister drops the final engine ref.
880 	 * Calling disable_scheduling_deregister will mark the engine as
881 	 * destroyed and fire off the CT requests to disable scheduling /
882 	 * deregister, which we only want to do once. We also don't want to mark
883 	 * the engine as pending_disable again as this may race with the
884 	 * xe_guc_deregister_done_handler() which treats it as an unexpected
885 	 * state.
886 	 */
887 	if (!wedged && exec_queue_registered(q) && !exec_queue_destroyed(q)) {
888 		struct xe_guc *guc = exec_queue_to_guc(q);
889 		int ret;
890 
891 		set_exec_queue_banned(q);
892 		disable_scheduling_deregister(guc, q);
893 
894 		/*
895 		 * Must wait for scheduling to be disabled before signalling
896 		 * any fences, if GT broken the GT reset code should signal us.
897 		 */
898 		ret = wait_event_timeout(guc->ct.wq,
899 					 !exec_queue_pending_disable(q) ||
900 					 xe_guc_read_stopped(guc), HZ * 5);
901 		if (!ret) {
902 			xe_gt_warn(q->gt, "Schedule disable failed to respond, guc_id=%d\n",
903 				   q->guc->id);
904 			xe_devcoredump(q, NULL, "Schedule disable failed to respond, guc_id=%d\n",
905 				       q->guc->id);
906 			xe_sched_submission_start(sched);
907 			xe_gt_reset_async(q->gt);
908 			return;
909 		}
910 	}
911 
912 	if (!exec_queue_killed(q) && !xe_lrc_ring_is_idle(q->lrc[0]))
913 		xe_devcoredump(q, NULL, "LR job cleanup, guc_id=%d", q->guc->id);
914 
915 	xe_sched_submission_start(sched);
916 }
917 
918 #define ADJUST_FIVE_PERCENT(__t)	mul_u64_u32_div(__t, 105, 100)
919 
920 static bool check_timeout(struct xe_exec_queue *q, struct xe_sched_job *job)
921 {
922 	struct xe_gt *gt = guc_to_gt(exec_queue_to_guc(q));
923 	u32 ctx_timestamp, ctx_job_timestamp;
924 	u32 timeout_ms = q->sched_props.job_timeout_ms;
925 	u32 diff;
926 	u64 running_time_ms;
927 
928 	if (!xe_sched_job_started(job)) {
929 		xe_gt_warn(gt, "Check job timeout: seqno=%u, lrc_seqno=%u, guc_id=%d, not started",
930 			   xe_sched_job_seqno(job), xe_sched_job_lrc_seqno(job),
931 			   q->guc->id);
932 
933 		return xe_sched_invalidate_job(job, 2);
934 	}
935 
936 	ctx_timestamp = xe_lrc_ctx_timestamp(q->lrc[0]);
937 	ctx_job_timestamp = xe_lrc_ctx_job_timestamp(q->lrc[0]);
938 
939 	/*
940 	 * Counter wraps at ~223s at the usual 19.2MHz, be paranoid catch
941 	 * possible overflows with a high timeout.
942 	 */
943 	xe_gt_assert(gt, timeout_ms < 100 * MSEC_PER_SEC);
944 
945 	if (ctx_timestamp < ctx_job_timestamp)
946 		diff = ctx_timestamp + U32_MAX - ctx_job_timestamp;
947 	else
948 		diff = ctx_timestamp - ctx_job_timestamp;
949 
950 	/*
951 	 * Ensure timeout is within 5% to account for an GuC scheduling latency
952 	 */
953 	running_time_ms =
954 		ADJUST_FIVE_PERCENT(xe_gt_clock_interval_to_ms(gt, diff));
955 
956 	xe_gt_dbg(gt,
957 		  "Check job timeout: seqno=%u, lrc_seqno=%u, guc_id=%d, running_time_ms=%llu, timeout_ms=%u, diff=0x%08x",
958 		  xe_sched_job_seqno(job), xe_sched_job_lrc_seqno(job),
959 		  q->guc->id, running_time_ms, timeout_ms, diff);
960 
961 	return running_time_ms >= timeout_ms;
962 }
963 
964 static void enable_scheduling(struct xe_exec_queue *q)
965 {
966 	MAKE_SCHED_CONTEXT_ACTION(q, ENABLE);
967 	struct xe_guc *guc = exec_queue_to_guc(q);
968 	int ret;
969 
970 	xe_gt_assert(guc_to_gt(guc), !exec_queue_destroyed(q));
971 	xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q));
972 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_disable(q));
973 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_enable(q));
974 
975 	set_exec_queue_pending_enable(q);
976 	set_exec_queue_enabled(q);
977 	trace_xe_exec_queue_scheduling_enable(q);
978 
979 	xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action),
980 		       G2H_LEN_DW_SCHED_CONTEXT_MODE_SET, 1);
981 
982 	ret = wait_event_timeout(guc->ct.wq,
983 				 !exec_queue_pending_enable(q) ||
984 				 xe_guc_read_stopped(guc), HZ * 5);
985 	if (!ret || xe_guc_read_stopped(guc)) {
986 		xe_gt_warn(guc_to_gt(guc), "Schedule enable failed to respond");
987 		set_exec_queue_banned(q);
988 		xe_gt_reset_async(q->gt);
989 		xe_sched_tdr_queue_imm(&q->guc->sched);
990 	}
991 }
992 
993 static void disable_scheduling(struct xe_exec_queue *q, bool immediate)
994 {
995 	MAKE_SCHED_CONTEXT_ACTION(q, DISABLE);
996 	struct xe_guc *guc = exec_queue_to_guc(q);
997 
998 	xe_gt_assert(guc_to_gt(guc), !exec_queue_destroyed(q));
999 	xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q));
1000 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_disable(q));
1001 
1002 	if (immediate)
1003 		set_min_preemption_timeout(guc, q);
1004 	clear_exec_queue_enabled(q);
1005 	set_exec_queue_pending_disable(q);
1006 	trace_xe_exec_queue_scheduling_disable(q);
1007 
1008 	xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action),
1009 		       G2H_LEN_DW_SCHED_CONTEXT_MODE_SET, 1);
1010 }
1011 
1012 static void __deregister_exec_queue(struct xe_guc *guc, struct xe_exec_queue *q)
1013 {
1014 	u32 action[] = {
1015 		XE_GUC_ACTION_DEREGISTER_CONTEXT,
1016 		q->guc->id,
1017 	};
1018 
1019 	xe_gt_assert(guc_to_gt(guc), !exec_queue_destroyed(q));
1020 	xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q));
1021 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_enable(q));
1022 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_disable(q));
1023 
1024 	set_exec_queue_destroyed(q);
1025 	trace_xe_exec_queue_deregister(q);
1026 
1027 	xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action),
1028 		       G2H_LEN_DW_DEREGISTER_CONTEXT, 1);
1029 }
1030 
1031 static enum drm_gpu_sched_stat
1032 guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
1033 {
1034 	struct xe_sched_job *job = to_xe_sched_job(drm_job);
1035 	struct xe_sched_job *tmp_job;
1036 	struct xe_exec_queue *q = job->q;
1037 	struct xe_gpu_scheduler *sched = &q->guc->sched;
1038 	struct xe_guc *guc = exec_queue_to_guc(q);
1039 	const char *process_name = "no process";
1040 	struct xe_device *xe = guc_to_xe(guc);
1041 	unsigned int fw_ref;
1042 	int err = -ETIME;
1043 	pid_t pid = -1;
1044 	int i = 0;
1045 	bool wedged, skip_timeout_check;
1046 
1047 	/*
1048 	 * TDR has fired before free job worker. Common if exec queue
1049 	 * immediately closed after last fence signaled. Add back to pending
1050 	 * list so job can be freed and kick scheduler ensuring free job is not
1051 	 * lost.
1052 	 */
1053 	if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &job->fence->flags)) {
1054 		xe_sched_add_pending_job(sched, job);
1055 		xe_sched_submission_start(sched);
1056 
1057 		return DRM_GPU_SCHED_STAT_NOMINAL;
1058 	}
1059 
1060 	/* Kill the run_job entry point */
1061 	xe_sched_submission_stop(sched);
1062 
1063 	/* Must check all state after stopping scheduler */
1064 	skip_timeout_check = exec_queue_reset(q) ||
1065 		exec_queue_killed_or_banned_or_wedged(q) ||
1066 		exec_queue_destroyed(q);
1067 
1068 	/*
1069 	 * If devcoredump not captured and GuC capture for the job is not ready
1070 	 * do manual capture first and decide later if we need to use it
1071 	 */
1072 	if (!exec_queue_killed(q) && !xe->devcoredump.captured &&
1073 	    !xe_guc_capture_get_matching_and_lock(q)) {
1074 		/* take force wake before engine register manual capture */
1075 		fw_ref = xe_force_wake_get(gt_to_fw(q->gt), XE_FORCEWAKE_ALL);
1076 		if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL))
1077 			xe_gt_info(q->gt, "failed to get forcewake for coredump capture\n");
1078 
1079 		xe_engine_snapshot_capture_for_queue(q);
1080 
1081 		xe_force_wake_put(gt_to_fw(q->gt), fw_ref);
1082 	}
1083 
1084 	/*
1085 	 * XXX: Sampling timeout doesn't work in wedged mode as we have to
1086 	 * modify scheduling state to read timestamp. We could read the
1087 	 * timestamp from a register to accumulate current running time but this
1088 	 * doesn't work for SRIOV. For now assuming timeouts in wedged mode are
1089 	 * genuine timeouts.
1090 	 */
1091 	wedged = guc_submit_hint_wedged(exec_queue_to_guc(q));
1092 
1093 	/* Engine state now stable, disable scheduling to check timestamp */
1094 	if (!wedged && exec_queue_registered(q)) {
1095 		int ret;
1096 
1097 		if (exec_queue_reset(q))
1098 			err = -EIO;
1099 
1100 		if (!exec_queue_destroyed(q)) {
1101 			/*
1102 			 * Wait for any pending G2H to flush out before
1103 			 * modifying state
1104 			 */
1105 			ret = wait_event_timeout(guc->ct.wq,
1106 						 (!exec_queue_pending_enable(q) &&
1107 						  !exec_queue_pending_disable(q)) ||
1108 						 xe_guc_read_stopped(guc), HZ * 5);
1109 			if (!ret || xe_guc_read_stopped(guc))
1110 				goto trigger_reset;
1111 
1112 			/*
1113 			 * Flag communicates to G2H handler that schedule
1114 			 * disable originated from a timeout check. The G2H then
1115 			 * avoid triggering cleanup or deregistering the exec
1116 			 * queue.
1117 			 */
1118 			set_exec_queue_check_timeout(q);
1119 			disable_scheduling(q, skip_timeout_check);
1120 		}
1121 
1122 		/*
1123 		 * Must wait for scheduling to be disabled before signalling
1124 		 * any fences, if GT broken the GT reset code should signal us.
1125 		 *
1126 		 * FIXME: Tests can generate a ton of 0x6000 (IOMMU CAT fault
1127 		 * error) messages which can cause the schedule disable to get
1128 		 * lost. If this occurs, trigger a GT reset to recover.
1129 		 */
1130 		smp_rmb();
1131 		ret = wait_event_timeout(guc->ct.wq,
1132 					 !exec_queue_pending_disable(q) ||
1133 					 xe_guc_read_stopped(guc), HZ * 5);
1134 		if (!ret || xe_guc_read_stopped(guc)) {
1135 trigger_reset:
1136 			if (!ret)
1137 				xe_gt_warn(guc_to_gt(guc),
1138 					   "Schedule disable failed to respond, guc_id=%d",
1139 					   q->guc->id);
1140 			xe_devcoredump(q, job,
1141 				       "Schedule disable failed to respond, guc_id=%d, ret=%d, guc_read=%d",
1142 				       q->guc->id, ret, xe_guc_read_stopped(guc));
1143 			set_exec_queue_extra_ref(q);
1144 			xe_exec_queue_get(q);	/* GT reset owns this */
1145 			set_exec_queue_banned(q);
1146 			xe_gt_reset_async(q->gt);
1147 			xe_sched_tdr_queue_imm(sched);
1148 			goto rearm;
1149 		}
1150 	}
1151 
1152 	/*
1153 	 * Check if job is actually timed out, if so restart job execution and TDR
1154 	 */
1155 	if (!wedged && !skip_timeout_check && !check_timeout(q, job) &&
1156 	    !exec_queue_reset(q) && exec_queue_registered(q)) {
1157 		clear_exec_queue_check_timeout(q);
1158 		goto sched_enable;
1159 	}
1160 
1161 	if (q->vm && q->vm->xef) {
1162 		process_name = q->vm->xef->process_name;
1163 		pid = q->vm->xef->pid;
1164 	}
1165 	xe_gt_notice(guc_to_gt(guc), "Timedout job: seqno=%u, lrc_seqno=%u, guc_id=%d, flags=0x%lx in %s [%d]",
1166 		     xe_sched_job_seqno(job), xe_sched_job_lrc_seqno(job),
1167 		     q->guc->id, q->flags, process_name, pid);
1168 
1169 	trace_xe_sched_job_timedout(job);
1170 
1171 	if (!exec_queue_killed(q))
1172 		xe_devcoredump(q, job,
1173 			       "Timedout job - seqno=%u, lrc_seqno=%u, guc_id=%d, flags=0x%lx",
1174 			       xe_sched_job_seqno(job), xe_sched_job_lrc_seqno(job),
1175 			       q->guc->id, q->flags);
1176 
1177 	/*
1178 	 * Kernel jobs should never fail, nor should VM jobs if they do
1179 	 * somethings has gone wrong and the GT needs a reset
1180 	 */
1181 	xe_gt_WARN(q->gt, q->flags & EXEC_QUEUE_FLAG_KERNEL,
1182 		   "Kernel-submitted job timed out\n");
1183 	xe_gt_WARN(q->gt, q->flags & EXEC_QUEUE_FLAG_VM && !exec_queue_killed(q),
1184 		   "VM job timed out on non-killed execqueue\n");
1185 	if (!wedged && (q->flags & EXEC_QUEUE_FLAG_KERNEL ||
1186 			(q->flags & EXEC_QUEUE_FLAG_VM && !exec_queue_killed(q)))) {
1187 		if (!xe_sched_invalidate_job(job, 2)) {
1188 			clear_exec_queue_check_timeout(q);
1189 			xe_gt_reset_async(q->gt);
1190 			goto rearm;
1191 		}
1192 	}
1193 
1194 	/* Finish cleaning up exec queue via deregister */
1195 	set_exec_queue_banned(q);
1196 	if (!wedged && exec_queue_registered(q) && !exec_queue_destroyed(q)) {
1197 		set_exec_queue_extra_ref(q);
1198 		xe_exec_queue_get(q);
1199 		__deregister_exec_queue(guc, q);
1200 	}
1201 
1202 	/* Stop fence signaling */
1203 	xe_hw_fence_irq_stop(q->fence_irq);
1204 
1205 	/*
1206 	 * Fence state now stable, stop / start scheduler which cleans up any
1207 	 * fences that are complete
1208 	 */
1209 	xe_sched_add_pending_job(sched, job);
1210 	xe_sched_submission_start(sched);
1211 
1212 	xe_guc_exec_queue_trigger_cleanup(q);
1213 
1214 	/* Mark all outstanding jobs as bad, thus completing them */
1215 	spin_lock(&sched->base.job_list_lock);
1216 	list_for_each_entry(tmp_job, &sched->base.pending_list, drm.list)
1217 		xe_sched_job_set_error(tmp_job, !i++ ? err : -ECANCELED);
1218 	spin_unlock(&sched->base.job_list_lock);
1219 
1220 	/* Start fence signaling */
1221 	xe_hw_fence_irq_start(q->fence_irq);
1222 
1223 	return DRM_GPU_SCHED_STAT_NOMINAL;
1224 
1225 sched_enable:
1226 	enable_scheduling(q);
1227 rearm:
1228 	/*
1229 	 * XXX: Ideally want to adjust timeout based on current execution time
1230 	 * but there is not currently an easy way to do in DRM scheduler. With
1231 	 * some thought, do this in a follow up.
1232 	 */
1233 	xe_sched_add_pending_job(sched, job);
1234 	xe_sched_submission_start(sched);
1235 
1236 	return DRM_GPU_SCHED_STAT_NOMINAL;
1237 }
1238 
1239 static void __guc_exec_queue_fini_async(struct work_struct *w)
1240 {
1241 	struct xe_guc_exec_queue *ge =
1242 		container_of(w, struct xe_guc_exec_queue, fini_async);
1243 	struct xe_exec_queue *q = ge->q;
1244 	struct xe_guc *guc = exec_queue_to_guc(q);
1245 
1246 	xe_pm_runtime_get(guc_to_xe(guc));
1247 	trace_xe_exec_queue_destroy(q);
1248 
1249 	if (xe_exec_queue_is_lr(q))
1250 		cancel_work_sync(&ge->lr_tdr);
1251 	release_guc_id(guc, q);
1252 	xe_sched_entity_fini(&ge->entity);
1253 	xe_sched_fini(&ge->sched);
1254 
1255 	kfree(ge);
1256 	xe_exec_queue_fini(q);
1257 	xe_pm_runtime_put(guc_to_xe(guc));
1258 }
1259 
1260 static void guc_exec_queue_fini_async(struct xe_exec_queue *q)
1261 {
1262 	struct xe_guc *guc = exec_queue_to_guc(q);
1263 	struct xe_device *xe = guc_to_xe(guc);
1264 
1265 	INIT_WORK(&q->guc->fini_async, __guc_exec_queue_fini_async);
1266 
1267 	/* We must block on kernel engines so slabs are empty on driver unload */
1268 	if (q->flags & EXEC_QUEUE_FLAG_PERMANENT || exec_queue_wedged(q))
1269 		__guc_exec_queue_fini_async(&q->guc->fini_async);
1270 	else
1271 		queue_work(xe->destroy_wq, &q->guc->fini_async);
1272 }
1273 
1274 static void __guc_exec_queue_fini(struct xe_guc *guc, struct xe_exec_queue *q)
1275 {
1276 	/*
1277 	 * Might be done from within the GPU scheduler, need to do async as we
1278 	 * fini the scheduler when the engine is fini'd, the scheduler can't
1279 	 * complete fini within itself (circular dependency). Async resolves
1280 	 * this we and don't really care when everything is fini'd, just that it
1281 	 * is.
1282 	 */
1283 	guc_exec_queue_fini_async(q);
1284 }
1285 
1286 static void __guc_exec_queue_process_msg_cleanup(struct xe_sched_msg *msg)
1287 {
1288 	struct xe_exec_queue *q = msg->private_data;
1289 	struct xe_guc *guc = exec_queue_to_guc(q);
1290 
1291 	xe_gt_assert(guc_to_gt(guc), !(q->flags & EXEC_QUEUE_FLAG_PERMANENT));
1292 	trace_xe_exec_queue_cleanup_entity(q);
1293 
1294 	if (exec_queue_registered(q))
1295 		disable_scheduling_deregister(guc, q);
1296 	else
1297 		__guc_exec_queue_fini(guc, q);
1298 }
1299 
1300 static bool guc_exec_queue_allowed_to_change_state(struct xe_exec_queue *q)
1301 {
1302 	return !exec_queue_killed_or_banned_or_wedged(q) && exec_queue_registered(q);
1303 }
1304 
1305 static void __guc_exec_queue_process_msg_set_sched_props(struct xe_sched_msg *msg)
1306 {
1307 	struct xe_exec_queue *q = msg->private_data;
1308 	struct xe_guc *guc = exec_queue_to_guc(q);
1309 
1310 	if (guc_exec_queue_allowed_to_change_state(q))
1311 		init_policies(guc, q);
1312 	kfree(msg);
1313 }
1314 
1315 static void __suspend_fence_signal(struct xe_exec_queue *q)
1316 {
1317 	if (!q->guc->suspend_pending)
1318 		return;
1319 
1320 	WRITE_ONCE(q->guc->suspend_pending, false);
1321 	wake_up(&q->guc->suspend_wait);
1322 }
1323 
1324 static void suspend_fence_signal(struct xe_exec_queue *q)
1325 {
1326 	struct xe_guc *guc = exec_queue_to_guc(q);
1327 
1328 	xe_gt_assert(guc_to_gt(guc), exec_queue_suspended(q) || exec_queue_killed(q) ||
1329 		     xe_guc_read_stopped(guc));
1330 	xe_gt_assert(guc_to_gt(guc), q->guc->suspend_pending);
1331 
1332 	__suspend_fence_signal(q);
1333 }
1334 
1335 static void __guc_exec_queue_process_msg_suspend(struct xe_sched_msg *msg)
1336 {
1337 	struct xe_exec_queue *q = msg->private_data;
1338 	struct xe_guc *guc = exec_queue_to_guc(q);
1339 
1340 	if (guc_exec_queue_allowed_to_change_state(q) && !exec_queue_suspended(q) &&
1341 	    exec_queue_enabled(q)) {
1342 		wait_event(guc->ct.wq, (q->guc->resume_time != RESUME_PENDING ||
1343 			   xe_guc_read_stopped(guc)) && !exec_queue_pending_disable(q));
1344 
1345 		if (!xe_guc_read_stopped(guc)) {
1346 			s64 since_resume_ms =
1347 				ktime_ms_delta(ktime_get(),
1348 					       q->guc->resume_time);
1349 			s64 wait_ms = q->vm->preempt.min_run_period_ms -
1350 				since_resume_ms;
1351 
1352 			if (wait_ms > 0 && q->guc->resume_time)
1353 				msleep(wait_ms);
1354 
1355 			set_exec_queue_suspended(q);
1356 			disable_scheduling(q, false);
1357 		}
1358 	} else if (q->guc->suspend_pending) {
1359 		set_exec_queue_suspended(q);
1360 		suspend_fence_signal(q);
1361 	}
1362 }
1363 
1364 static void __guc_exec_queue_process_msg_resume(struct xe_sched_msg *msg)
1365 {
1366 	struct xe_exec_queue *q = msg->private_data;
1367 
1368 	if (guc_exec_queue_allowed_to_change_state(q)) {
1369 		clear_exec_queue_suspended(q);
1370 		if (!exec_queue_enabled(q)) {
1371 			q->guc->resume_time = RESUME_PENDING;
1372 			enable_scheduling(q);
1373 		}
1374 	} else {
1375 		clear_exec_queue_suspended(q);
1376 	}
1377 }
1378 
1379 #define CLEANUP		1	/* Non-zero values to catch uninitialized msg */
1380 #define SET_SCHED_PROPS	2
1381 #define SUSPEND		3
1382 #define RESUME		4
1383 #define OPCODE_MASK	0xf
1384 #define MSG_LOCKED	BIT(8)
1385 
1386 static void guc_exec_queue_process_msg(struct xe_sched_msg *msg)
1387 {
1388 	struct xe_device *xe = guc_to_xe(exec_queue_to_guc(msg->private_data));
1389 
1390 	trace_xe_sched_msg_recv(msg);
1391 
1392 	switch (msg->opcode) {
1393 	case CLEANUP:
1394 		__guc_exec_queue_process_msg_cleanup(msg);
1395 		break;
1396 	case SET_SCHED_PROPS:
1397 		__guc_exec_queue_process_msg_set_sched_props(msg);
1398 		break;
1399 	case SUSPEND:
1400 		__guc_exec_queue_process_msg_suspend(msg);
1401 		break;
1402 	case RESUME:
1403 		__guc_exec_queue_process_msg_resume(msg);
1404 		break;
1405 	default:
1406 		XE_WARN_ON("Unknown message type");
1407 	}
1408 
1409 	xe_pm_runtime_put(xe);
1410 }
1411 
1412 static const struct drm_sched_backend_ops drm_sched_ops = {
1413 	.run_job = guc_exec_queue_run_job,
1414 	.free_job = guc_exec_queue_free_job,
1415 	.timedout_job = guc_exec_queue_timedout_job,
1416 };
1417 
1418 static const struct xe_sched_backend_ops xe_sched_ops = {
1419 	.process_msg = guc_exec_queue_process_msg,
1420 };
1421 
1422 static int guc_exec_queue_init(struct xe_exec_queue *q)
1423 {
1424 	struct xe_gpu_scheduler *sched;
1425 	struct xe_guc *guc = exec_queue_to_guc(q);
1426 	struct xe_guc_exec_queue *ge;
1427 	long timeout;
1428 	int err, i;
1429 
1430 	xe_gt_assert(guc_to_gt(guc), xe_device_uc_enabled(guc_to_xe(guc)));
1431 
1432 	ge = kzalloc(sizeof(*ge), GFP_KERNEL);
1433 	if (!ge)
1434 		return -ENOMEM;
1435 
1436 	q->guc = ge;
1437 	ge->q = q;
1438 	init_waitqueue_head(&ge->suspend_wait);
1439 
1440 	for (i = 0; i < MAX_STATIC_MSG_TYPE; ++i)
1441 		INIT_LIST_HEAD(&ge->static_msgs[i].link);
1442 
1443 	timeout = (q->vm && xe_vm_in_lr_mode(q->vm)) ? MAX_SCHEDULE_TIMEOUT :
1444 		  msecs_to_jiffies(q->sched_props.job_timeout_ms);
1445 	err = xe_sched_init(&ge->sched, &drm_sched_ops, &xe_sched_ops,
1446 			    NULL, q->lrc[0]->ring.size / MAX_JOB_SIZE_BYTES, 64,
1447 			    timeout, guc_to_gt(guc)->ordered_wq, NULL,
1448 			    q->name, gt_to_xe(q->gt)->drm.dev);
1449 	if (err)
1450 		goto err_free;
1451 
1452 	sched = &ge->sched;
1453 	err = xe_sched_entity_init(&ge->entity, sched);
1454 	if (err)
1455 		goto err_sched;
1456 
1457 	if (xe_exec_queue_is_lr(q))
1458 		INIT_WORK(&q->guc->lr_tdr, xe_guc_exec_queue_lr_cleanup);
1459 
1460 	mutex_lock(&guc->submission_state.lock);
1461 
1462 	err = alloc_guc_id(guc, q);
1463 	if (err)
1464 		goto err_entity;
1465 
1466 	q->entity = &ge->entity;
1467 
1468 	if (xe_guc_read_stopped(guc))
1469 		xe_sched_stop(sched);
1470 
1471 	mutex_unlock(&guc->submission_state.lock);
1472 
1473 	xe_exec_queue_assign_name(q, q->guc->id);
1474 
1475 	trace_xe_exec_queue_create(q);
1476 
1477 	return 0;
1478 
1479 err_entity:
1480 	mutex_unlock(&guc->submission_state.lock);
1481 	xe_sched_entity_fini(&ge->entity);
1482 err_sched:
1483 	xe_sched_fini(&ge->sched);
1484 err_free:
1485 	kfree(ge);
1486 
1487 	return err;
1488 }
1489 
1490 static void guc_exec_queue_kill(struct xe_exec_queue *q)
1491 {
1492 	trace_xe_exec_queue_kill(q);
1493 	set_exec_queue_killed(q);
1494 	__suspend_fence_signal(q);
1495 	xe_guc_exec_queue_trigger_cleanup(q);
1496 }
1497 
1498 static void guc_exec_queue_add_msg(struct xe_exec_queue *q, struct xe_sched_msg *msg,
1499 				   u32 opcode)
1500 {
1501 	xe_pm_runtime_get_noresume(guc_to_xe(exec_queue_to_guc(q)));
1502 
1503 	INIT_LIST_HEAD(&msg->link);
1504 	msg->opcode = opcode & OPCODE_MASK;
1505 	msg->private_data = q;
1506 
1507 	trace_xe_sched_msg_add(msg);
1508 	if (opcode & MSG_LOCKED)
1509 		xe_sched_add_msg_locked(&q->guc->sched, msg);
1510 	else
1511 		xe_sched_add_msg(&q->guc->sched, msg);
1512 }
1513 
1514 static bool guc_exec_queue_try_add_msg(struct xe_exec_queue *q,
1515 				       struct xe_sched_msg *msg,
1516 				       u32 opcode)
1517 {
1518 	if (!list_empty(&msg->link))
1519 		return false;
1520 
1521 	guc_exec_queue_add_msg(q, msg, opcode | MSG_LOCKED);
1522 
1523 	return true;
1524 }
1525 
1526 #define STATIC_MSG_CLEANUP	0
1527 #define STATIC_MSG_SUSPEND	1
1528 #define STATIC_MSG_RESUME	2
1529 static void guc_exec_queue_fini(struct xe_exec_queue *q)
1530 {
1531 	struct xe_sched_msg *msg = q->guc->static_msgs + STATIC_MSG_CLEANUP;
1532 
1533 	if (!(q->flags & EXEC_QUEUE_FLAG_PERMANENT) && !exec_queue_wedged(q))
1534 		guc_exec_queue_add_msg(q, msg, CLEANUP);
1535 	else
1536 		__guc_exec_queue_fini(exec_queue_to_guc(q), q);
1537 }
1538 
1539 static int guc_exec_queue_set_priority(struct xe_exec_queue *q,
1540 				       enum xe_exec_queue_priority priority)
1541 {
1542 	struct xe_sched_msg *msg;
1543 
1544 	if (q->sched_props.priority == priority ||
1545 	    exec_queue_killed_or_banned_or_wedged(q))
1546 		return 0;
1547 
1548 	msg = kmalloc(sizeof(*msg), GFP_KERNEL);
1549 	if (!msg)
1550 		return -ENOMEM;
1551 
1552 	q->sched_props.priority = priority;
1553 	guc_exec_queue_add_msg(q, msg, SET_SCHED_PROPS);
1554 
1555 	return 0;
1556 }
1557 
1558 static int guc_exec_queue_set_timeslice(struct xe_exec_queue *q, u32 timeslice_us)
1559 {
1560 	struct xe_sched_msg *msg;
1561 
1562 	if (q->sched_props.timeslice_us == timeslice_us ||
1563 	    exec_queue_killed_or_banned_or_wedged(q))
1564 		return 0;
1565 
1566 	msg = kmalloc(sizeof(*msg), GFP_KERNEL);
1567 	if (!msg)
1568 		return -ENOMEM;
1569 
1570 	q->sched_props.timeslice_us = timeslice_us;
1571 	guc_exec_queue_add_msg(q, msg, SET_SCHED_PROPS);
1572 
1573 	return 0;
1574 }
1575 
1576 static int guc_exec_queue_set_preempt_timeout(struct xe_exec_queue *q,
1577 					      u32 preempt_timeout_us)
1578 {
1579 	struct xe_sched_msg *msg;
1580 
1581 	if (q->sched_props.preempt_timeout_us == preempt_timeout_us ||
1582 	    exec_queue_killed_or_banned_or_wedged(q))
1583 		return 0;
1584 
1585 	msg = kmalloc(sizeof(*msg), GFP_KERNEL);
1586 	if (!msg)
1587 		return -ENOMEM;
1588 
1589 	q->sched_props.preempt_timeout_us = preempt_timeout_us;
1590 	guc_exec_queue_add_msg(q, msg, SET_SCHED_PROPS);
1591 
1592 	return 0;
1593 }
1594 
1595 static int guc_exec_queue_suspend(struct xe_exec_queue *q)
1596 {
1597 	struct xe_gpu_scheduler *sched = &q->guc->sched;
1598 	struct xe_sched_msg *msg = q->guc->static_msgs + STATIC_MSG_SUSPEND;
1599 
1600 	if (exec_queue_killed_or_banned_or_wedged(q))
1601 		return -EINVAL;
1602 
1603 	xe_sched_msg_lock(sched);
1604 	if (guc_exec_queue_try_add_msg(q, msg, SUSPEND))
1605 		q->guc->suspend_pending = true;
1606 	xe_sched_msg_unlock(sched);
1607 
1608 	return 0;
1609 }
1610 
1611 static int guc_exec_queue_suspend_wait(struct xe_exec_queue *q)
1612 {
1613 	struct xe_guc *guc = exec_queue_to_guc(q);
1614 	int ret;
1615 
1616 	/*
1617 	 * Likely don't need to check exec_queue_killed() as we clear
1618 	 * suspend_pending upon kill but to be paranoid but races in which
1619 	 * suspend_pending is set after kill also check kill here.
1620 	 */
1621 	ret = wait_event_interruptible_timeout(q->guc->suspend_wait,
1622 					       !READ_ONCE(q->guc->suspend_pending) ||
1623 					       exec_queue_killed(q) ||
1624 					       xe_guc_read_stopped(guc),
1625 					       HZ * 5);
1626 
1627 	if (!ret) {
1628 		xe_gt_warn(guc_to_gt(guc),
1629 			   "Suspend fence, guc_id=%d, failed to respond",
1630 			   q->guc->id);
1631 		/* XXX: Trigger GT reset? */
1632 		return -ETIME;
1633 	}
1634 
1635 	return ret < 0 ? ret : 0;
1636 }
1637 
1638 static void guc_exec_queue_resume(struct xe_exec_queue *q)
1639 {
1640 	struct xe_gpu_scheduler *sched = &q->guc->sched;
1641 	struct xe_sched_msg *msg = q->guc->static_msgs + STATIC_MSG_RESUME;
1642 	struct xe_guc *guc = exec_queue_to_guc(q);
1643 
1644 	xe_gt_assert(guc_to_gt(guc), !q->guc->suspend_pending);
1645 
1646 	xe_sched_msg_lock(sched);
1647 	guc_exec_queue_try_add_msg(q, msg, RESUME);
1648 	xe_sched_msg_unlock(sched);
1649 }
1650 
1651 static bool guc_exec_queue_reset_status(struct xe_exec_queue *q)
1652 {
1653 	return exec_queue_reset(q) || exec_queue_killed_or_banned_or_wedged(q);
1654 }
1655 
1656 /*
1657  * All of these functions are an abstraction layer which other parts of XE can
1658  * use to trap into the GuC backend. All of these functions, aside from init,
1659  * really shouldn't do much other than trap into the DRM scheduler which
1660  * synchronizes these operations.
1661  */
1662 static const struct xe_exec_queue_ops guc_exec_queue_ops = {
1663 	.init = guc_exec_queue_init,
1664 	.kill = guc_exec_queue_kill,
1665 	.fini = guc_exec_queue_fini,
1666 	.set_priority = guc_exec_queue_set_priority,
1667 	.set_timeslice = guc_exec_queue_set_timeslice,
1668 	.set_preempt_timeout = guc_exec_queue_set_preempt_timeout,
1669 	.suspend = guc_exec_queue_suspend,
1670 	.suspend_wait = guc_exec_queue_suspend_wait,
1671 	.resume = guc_exec_queue_resume,
1672 	.reset_status = guc_exec_queue_reset_status,
1673 };
1674 
1675 static void guc_exec_queue_stop(struct xe_guc *guc, struct xe_exec_queue *q)
1676 {
1677 	struct xe_gpu_scheduler *sched = &q->guc->sched;
1678 
1679 	/* Stop scheduling + flush any DRM scheduler operations */
1680 	xe_sched_submission_stop(sched);
1681 
1682 	/* Clean up lost G2H + reset engine state */
1683 	if (exec_queue_registered(q)) {
1684 		if (exec_queue_extra_ref(q) || xe_exec_queue_is_lr(q))
1685 			xe_exec_queue_put(q);
1686 		else if (exec_queue_destroyed(q))
1687 			__guc_exec_queue_fini(guc, q);
1688 	}
1689 	if (q->guc->suspend_pending) {
1690 		set_exec_queue_suspended(q);
1691 		suspend_fence_signal(q);
1692 	}
1693 	atomic_and(EXEC_QUEUE_STATE_WEDGED | EXEC_QUEUE_STATE_BANNED |
1694 		   EXEC_QUEUE_STATE_KILLED | EXEC_QUEUE_STATE_DESTROYED |
1695 		   EXEC_QUEUE_STATE_SUSPENDED,
1696 		   &q->guc->state);
1697 	q->guc->resume_time = 0;
1698 	trace_xe_exec_queue_stop(q);
1699 
1700 	/*
1701 	 * Ban any engine (aside from kernel and engines used for VM ops) with a
1702 	 * started but not complete job or if a job has gone through a GT reset
1703 	 * more than twice.
1704 	 */
1705 	if (!(q->flags & (EXEC_QUEUE_FLAG_KERNEL | EXEC_QUEUE_FLAG_VM))) {
1706 		struct xe_sched_job *job = xe_sched_first_pending_job(sched);
1707 		bool ban = false;
1708 
1709 		if (job) {
1710 			if ((xe_sched_job_started(job) &&
1711 			    !xe_sched_job_completed(job)) ||
1712 			    xe_sched_invalidate_job(job, 2)) {
1713 				trace_xe_sched_job_ban(job);
1714 				ban = true;
1715 			}
1716 		} else if (xe_exec_queue_is_lr(q) &&
1717 			   !xe_lrc_ring_is_idle(q->lrc[0])) {
1718 			ban = true;
1719 		}
1720 
1721 		if (ban) {
1722 			set_exec_queue_banned(q);
1723 			xe_guc_exec_queue_trigger_cleanup(q);
1724 		}
1725 	}
1726 }
1727 
1728 int xe_guc_submit_reset_prepare(struct xe_guc *guc)
1729 {
1730 	int ret;
1731 
1732 	/*
1733 	 * Using an atomic here rather than submission_state.lock as this
1734 	 * function can be called while holding the CT lock (engine reset
1735 	 * failure). submission_state.lock needs the CT lock to resubmit jobs.
1736 	 * Atomic is not ideal, but it works to prevent against concurrent reset
1737 	 * and releasing any TDRs waiting on guc->submission_state.stopped.
1738 	 */
1739 	ret = atomic_fetch_or(1, &guc->submission_state.stopped);
1740 	smp_wmb();
1741 	wake_up_all(&guc->ct.wq);
1742 
1743 	return ret;
1744 }
1745 
1746 void xe_guc_submit_reset_wait(struct xe_guc *guc)
1747 {
1748 	wait_event(guc->ct.wq, xe_device_wedged(guc_to_xe(guc)) ||
1749 		   !xe_guc_read_stopped(guc));
1750 }
1751 
1752 void xe_guc_submit_stop(struct xe_guc *guc)
1753 {
1754 	struct xe_exec_queue *q;
1755 	unsigned long index;
1756 
1757 	xe_gt_assert(guc_to_gt(guc), xe_guc_read_stopped(guc) == 1);
1758 
1759 	mutex_lock(&guc->submission_state.lock);
1760 
1761 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
1762 		/* Prevent redundant attempts to stop parallel queues */
1763 		if (q->guc->id != index)
1764 			continue;
1765 
1766 		guc_exec_queue_stop(guc, q);
1767 	}
1768 
1769 	mutex_unlock(&guc->submission_state.lock);
1770 
1771 	/*
1772 	 * No one can enter the backend at this point, aside from new engine
1773 	 * creation which is protected by guc->submission_state.lock.
1774 	 */
1775 
1776 }
1777 
1778 static void guc_exec_queue_start(struct xe_exec_queue *q)
1779 {
1780 	struct xe_gpu_scheduler *sched = &q->guc->sched;
1781 
1782 	if (!exec_queue_killed_or_banned_or_wedged(q)) {
1783 		int i;
1784 
1785 		trace_xe_exec_queue_resubmit(q);
1786 		for (i = 0; i < q->width; ++i)
1787 			xe_lrc_set_ring_head(q->lrc[i], q->lrc[i]->ring.tail);
1788 		xe_sched_resubmit_jobs(sched);
1789 	}
1790 
1791 	xe_sched_submission_start(sched);
1792 	xe_sched_submission_resume_tdr(sched);
1793 }
1794 
1795 int xe_guc_submit_start(struct xe_guc *guc)
1796 {
1797 	struct xe_exec_queue *q;
1798 	unsigned long index;
1799 
1800 	xe_gt_assert(guc_to_gt(guc), xe_guc_read_stopped(guc) == 1);
1801 
1802 	mutex_lock(&guc->submission_state.lock);
1803 	atomic_dec(&guc->submission_state.stopped);
1804 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
1805 		/* Prevent redundant attempts to start parallel queues */
1806 		if (q->guc->id != index)
1807 			continue;
1808 
1809 		guc_exec_queue_start(q);
1810 	}
1811 	mutex_unlock(&guc->submission_state.lock);
1812 
1813 	wake_up_all(&guc->ct.wq);
1814 
1815 	return 0;
1816 }
1817 
1818 static struct xe_exec_queue *
1819 g2h_exec_queue_lookup(struct xe_guc *guc, u32 guc_id)
1820 {
1821 	struct xe_gt *gt = guc_to_gt(guc);
1822 	struct xe_exec_queue *q;
1823 
1824 	if (unlikely(guc_id >= GUC_ID_MAX)) {
1825 		xe_gt_err(gt, "Invalid guc_id %u\n", guc_id);
1826 		return NULL;
1827 	}
1828 
1829 	q = xa_load(&guc->submission_state.exec_queue_lookup, guc_id);
1830 	if (unlikely(!q)) {
1831 		xe_gt_err(gt, "Not engine present for guc_id %u\n", guc_id);
1832 		return NULL;
1833 	}
1834 
1835 	xe_gt_assert(guc_to_gt(guc), guc_id >= q->guc->id);
1836 	xe_gt_assert(guc_to_gt(guc), guc_id < (q->guc->id + q->width));
1837 
1838 	return q;
1839 }
1840 
1841 static void deregister_exec_queue(struct xe_guc *guc, struct xe_exec_queue *q)
1842 {
1843 	u32 action[] = {
1844 		XE_GUC_ACTION_DEREGISTER_CONTEXT,
1845 		q->guc->id,
1846 	};
1847 
1848 	xe_gt_assert(guc_to_gt(guc), exec_queue_destroyed(q));
1849 	xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q));
1850 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_disable(q));
1851 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_enable(q));
1852 
1853 	trace_xe_exec_queue_deregister(q);
1854 
1855 	xe_guc_ct_send_g2h_handler(&guc->ct, action, ARRAY_SIZE(action));
1856 }
1857 
1858 static void handle_sched_done(struct xe_guc *guc, struct xe_exec_queue *q,
1859 			      u32 runnable_state)
1860 {
1861 	trace_xe_exec_queue_scheduling_done(q);
1862 
1863 	if (runnable_state == 1) {
1864 		xe_gt_assert(guc_to_gt(guc), exec_queue_pending_enable(q));
1865 
1866 		q->guc->resume_time = ktime_get();
1867 		clear_exec_queue_pending_enable(q);
1868 		smp_wmb();
1869 		wake_up_all(&guc->ct.wq);
1870 	} else {
1871 		bool check_timeout = exec_queue_check_timeout(q);
1872 
1873 		xe_gt_assert(guc_to_gt(guc), runnable_state == 0);
1874 		xe_gt_assert(guc_to_gt(guc), exec_queue_pending_disable(q));
1875 
1876 		if (q->guc->suspend_pending) {
1877 			suspend_fence_signal(q);
1878 			clear_exec_queue_pending_disable(q);
1879 		} else {
1880 			if (exec_queue_banned(q) || check_timeout) {
1881 				smp_wmb();
1882 				wake_up_all(&guc->ct.wq);
1883 			}
1884 			if (!check_timeout && exec_queue_destroyed(q)) {
1885 				/*
1886 				 * Make sure to clear the pending_disable only
1887 				 * after sampling the destroyed state. We want
1888 				 * to ensure we don't trigger the unregister too
1889 				 * early with something intending to only
1890 				 * disable scheduling. The caller doing the
1891 				 * destroy must wait for an ongoing
1892 				 * pending_disable before marking as destroyed.
1893 				 */
1894 				clear_exec_queue_pending_disable(q);
1895 				deregister_exec_queue(guc, q);
1896 			} else {
1897 				clear_exec_queue_pending_disable(q);
1898 			}
1899 		}
1900 	}
1901 }
1902 
1903 int xe_guc_sched_done_handler(struct xe_guc *guc, u32 *msg, u32 len)
1904 {
1905 	struct xe_exec_queue *q;
1906 	u32 guc_id, runnable_state;
1907 
1908 	if (unlikely(len < 2))
1909 		return -EPROTO;
1910 
1911 	guc_id = msg[0];
1912 	runnable_state = msg[1];
1913 
1914 	q = g2h_exec_queue_lookup(guc, guc_id);
1915 	if (unlikely(!q))
1916 		return -EPROTO;
1917 
1918 	if (unlikely(!exec_queue_pending_enable(q) &&
1919 		     !exec_queue_pending_disable(q))) {
1920 		xe_gt_err(guc_to_gt(guc),
1921 			  "SCHED_DONE: Unexpected engine state 0x%04x, guc_id=%d, runnable_state=%u",
1922 			  atomic_read(&q->guc->state), q->guc->id,
1923 			  runnable_state);
1924 		return -EPROTO;
1925 	}
1926 
1927 	handle_sched_done(guc, q, runnable_state);
1928 
1929 	return 0;
1930 }
1931 
1932 static void handle_deregister_done(struct xe_guc *guc, struct xe_exec_queue *q)
1933 {
1934 	trace_xe_exec_queue_deregister_done(q);
1935 
1936 	clear_exec_queue_registered(q);
1937 
1938 	if (exec_queue_extra_ref(q) || xe_exec_queue_is_lr(q))
1939 		xe_exec_queue_put(q);
1940 	else
1941 		__guc_exec_queue_fini(guc, q);
1942 }
1943 
1944 int xe_guc_deregister_done_handler(struct xe_guc *guc, u32 *msg, u32 len)
1945 {
1946 	struct xe_exec_queue *q;
1947 	u32 guc_id;
1948 
1949 	if (unlikely(len < 1))
1950 		return -EPROTO;
1951 
1952 	guc_id = msg[0];
1953 
1954 	q = g2h_exec_queue_lookup(guc, guc_id);
1955 	if (unlikely(!q))
1956 		return -EPROTO;
1957 
1958 	if (!exec_queue_destroyed(q) || exec_queue_pending_disable(q) ||
1959 	    exec_queue_pending_enable(q) || exec_queue_enabled(q)) {
1960 		xe_gt_err(guc_to_gt(guc),
1961 			  "DEREGISTER_DONE: Unexpected engine state 0x%04x, guc_id=%d",
1962 			  atomic_read(&q->guc->state), q->guc->id);
1963 		return -EPROTO;
1964 	}
1965 
1966 	handle_deregister_done(guc, q);
1967 
1968 	return 0;
1969 }
1970 
1971 int xe_guc_exec_queue_reset_handler(struct xe_guc *guc, u32 *msg, u32 len)
1972 {
1973 	struct xe_gt *gt = guc_to_gt(guc);
1974 	struct xe_exec_queue *q;
1975 	u32 guc_id;
1976 
1977 	if (unlikely(len < 1))
1978 		return -EPROTO;
1979 
1980 	guc_id = msg[0];
1981 
1982 	q = g2h_exec_queue_lookup(guc, guc_id);
1983 	if (unlikely(!q))
1984 		return -EPROTO;
1985 
1986 	xe_gt_info(gt, "Engine reset: engine_class=%s, logical_mask: 0x%x, guc_id=%d",
1987 		   xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id);
1988 
1989 	trace_xe_exec_queue_reset(q);
1990 
1991 	/*
1992 	 * A banned engine is a NOP at this point (came from
1993 	 * guc_exec_queue_timedout_job). Otherwise, kick drm scheduler to cancel
1994 	 * jobs by setting timeout of the job to the minimum value kicking
1995 	 * guc_exec_queue_timedout_job.
1996 	 */
1997 	set_exec_queue_reset(q);
1998 	if (!exec_queue_banned(q) && !exec_queue_check_timeout(q))
1999 		xe_guc_exec_queue_trigger_cleanup(q);
2000 
2001 	return 0;
2002 }
2003 
2004 /*
2005  * xe_guc_error_capture_handler - Handler of GuC captured message
2006  * @guc: The GuC object
2007  * @msg: Point to the message
2008  * @len: The message length
2009  *
2010  * When GuC captured data is ready, GuC will send message
2011  * XE_GUC_ACTION_STATE_CAPTURE_NOTIFICATION to host, this function will be
2012  * called 1st to check status before process the data comes with the message.
2013  *
2014  * Returns: error code. 0 if success
2015  */
2016 int xe_guc_error_capture_handler(struct xe_guc *guc, u32 *msg, u32 len)
2017 {
2018 	u32 status;
2019 
2020 	if (unlikely(len != XE_GUC_ACTION_STATE_CAPTURE_NOTIFICATION_DATA_LEN))
2021 		return -EPROTO;
2022 
2023 	status = msg[0] & XE_GUC_STATE_CAPTURE_EVENT_STATUS_MASK;
2024 	if (status == XE_GUC_STATE_CAPTURE_EVENT_STATUS_NOSPACE)
2025 		xe_gt_warn(guc_to_gt(guc), "G2H-Error capture no space");
2026 
2027 	xe_guc_capture_process(guc);
2028 
2029 	return 0;
2030 }
2031 
2032 int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg,
2033 					       u32 len)
2034 {
2035 	struct xe_gt *gt = guc_to_gt(guc);
2036 	struct xe_exec_queue *q;
2037 	u32 guc_id;
2038 
2039 	if (unlikely(len < 1))
2040 		return -EPROTO;
2041 
2042 	guc_id = msg[0];
2043 
2044 	if (guc_id == GUC_ID_UNKNOWN) {
2045 		/*
2046 		 * GuC uses GUC_ID_UNKNOWN if it can not map the CAT fault to any PF/VF
2047 		 * context. In such case only PF will be notified about that fault.
2048 		 */
2049 		xe_gt_err_ratelimited(gt, "Memory CAT error reported by GuC!\n");
2050 		return 0;
2051 	}
2052 
2053 	q = g2h_exec_queue_lookup(guc, guc_id);
2054 	if (unlikely(!q))
2055 		return -EPROTO;
2056 
2057 	xe_gt_dbg(gt, "Engine memory cat error: engine_class=%s, logical_mask: 0x%x, guc_id=%d",
2058 		  xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id);
2059 
2060 	trace_xe_exec_queue_memory_cat_error(q);
2061 
2062 	/* Treat the same as engine reset */
2063 	set_exec_queue_reset(q);
2064 	if (!exec_queue_banned(q) && !exec_queue_check_timeout(q))
2065 		xe_guc_exec_queue_trigger_cleanup(q);
2066 
2067 	return 0;
2068 }
2069 
2070 int xe_guc_exec_queue_reset_failure_handler(struct xe_guc *guc, u32 *msg, u32 len)
2071 {
2072 	struct xe_gt *gt = guc_to_gt(guc);
2073 	u8 guc_class, instance;
2074 	u32 reason;
2075 
2076 	if (unlikely(len != 3))
2077 		return -EPROTO;
2078 
2079 	guc_class = msg[0];
2080 	instance = msg[1];
2081 	reason = msg[2];
2082 
2083 	/* Unexpected failure of a hardware feature, log an actual error */
2084 	xe_gt_err(gt, "GuC engine reset request failed on %d:%d because 0x%08X",
2085 		  guc_class, instance, reason);
2086 
2087 	xe_gt_reset_async(gt);
2088 
2089 	return 0;
2090 }
2091 
2092 static void
2093 guc_exec_queue_wq_snapshot_capture(struct xe_exec_queue *q,
2094 				   struct xe_guc_submit_exec_queue_snapshot *snapshot)
2095 {
2096 	struct xe_guc *guc = exec_queue_to_guc(q);
2097 	struct xe_device *xe = guc_to_xe(guc);
2098 	struct iosys_map map = xe_lrc_parallel_map(q->lrc[0]);
2099 	int i;
2100 
2101 	snapshot->guc.wqi_head = q->guc->wqi_head;
2102 	snapshot->guc.wqi_tail = q->guc->wqi_tail;
2103 	snapshot->parallel.wq_desc.head = parallel_read(xe, map, wq_desc.head);
2104 	snapshot->parallel.wq_desc.tail = parallel_read(xe, map, wq_desc.tail);
2105 	snapshot->parallel.wq_desc.status = parallel_read(xe, map,
2106 							  wq_desc.wq_status);
2107 
2108 	if (snapshot->parallel.wq_desc.head !=
2109 	    snapshot->parallel.wq_desc.tail) {
2110 		for (i = snapshot->parallel.wq_desc.head;
2111 		     i != snapshot->parallel.wq_desc.tail;
2112 		     i = (i + sizeof(u32)) % WQ_SIZE)
2113 			snapshot->parallel.wq[i / sizeof(u32)] =
2114 				parallel_read(xe, map, wq[i / sizeof(u32)]);
2115 	}
2116 }
2117 
2118 static void
2119 guc_exec_queue_wq_snapshot_print(struct xe_guc_submit_exec_queue_snapshot *snapshot,
2120 				 struct drm_printer *p)
2121 {
2122 	int i;
2123 
2124 	drm_printf(p, "\tWQ head: %u (internal), %d (memory)\n",
2125 		   snapshot->guc.wqi_head, snapshot->parallel.wq_desc.head);
2126 	drm_printf(p, "\tWQ tail: %u (internal), %d (memory)\n",
2127 		   snapshot->guc.wqi_tail, snapshot->parallel.wq_desc.tail);
2128 	drm_printf(p, "\tWQ status: %u\n", snapshot->parallel.wq_desc.status);
2129 
2130 	if (snapshot->parallel.wq_desc.head !=
2131 	    snapshot->parallel.wq_desc.tail) {
2132 		for (i = snapshot->parallel.wq_desc.head;
2133 		     i != snapshot->parallel.wq_desc.tail;
2134 		     i = (i + sizeof(u32)) % WQ_SIZE)
2135 			drm_printf(p, "\tWQ[%zu]: 0x%08x\n", i / sizeof(u32),
2136 				   snapshot->parallel.wq[i / sizeof(u32)]);
2137 	}
2138 }
2139 
2140 /**
2141  * xe_guc_exec_queue_snapshot_capture - Take a quick snapshot of the GuC Engine.
2142  * @q: faulty exec queue
2143  *
2144  * This can be printed out in a later stage like during dev_coredump
2145  * analysis.
2146  *
2147  * Returns: a GuC Submit Engine snapshot object that must be freed by the
2148  * caller, using `xe_guc_exec_queue_snapshot_free`.
2149  */
2150 struct xe_guc_submit_exec_queue_snapshot *
2151 xe_guc_exec_queue_snapshot_capture(struct xe_exec_queue *q)
2152 {
2153 	struct xe_gpu_scheduler *sched = &q->guc->sched;
2154 	struct xe_guc_submit_exec_queue_snapshot *snapshot;
2155 	int i;
2156 
2157 	snapshot = kzalloc(sizeof(*snapshot), GFP_ATOMIC);
2158 
2159 	if (!snapshot)
2160 		return NULL;
2161 
2162 	snapshot->guc.id = q->guc->id;
2163 	memcpy(&snapshot->name, &q->name, sizeof(snapshot->name));
2164 	snapshot->class = q->class;
2165 	snapshot->logical_mask = q->logical_mask;
2166 	snapshot->width = q->width;
2167 	snapshot->refcount = kref_read(&q->refcount);
2168 	snapshot->sched_timeout = sched->base.timeout;
2169 	snapshot->sched_props.timeslice_us = q->sched_props.timeslice_us;
2170 	snapshot->sched_props.preempt_timeout_us =
2171 		q->sched_props.preempt_timeout_us;
2172 
2173 	snapshot->lrc = kmalloc_array(q->width, sizeof(struct xe_lrc_snapshot *),
2174 				      GFP_ATOMIC);
2175 
2176 	if (snapshot->lrc) {
2177 		for (i = 0; i < q->width; ++i) {
2178 			struct xe_lrc *lrc = q->lrc[i];
2179 
2180 			snapshot->lrc[i] = xe_lrc_snapshot_capture(lrc);
2181 		}
2182 	}
2183 
2184 	snapshot->schedule_state = atomic_read(&q->guc->state);
2185 	snapshot->exec_queue_flags = q->flags;
2186 
2187 	snapshot->parallel_execution = xe_exec_queue_is_parallel(q);
2188 	if (snapshot->parallel_execution)
2189 		guc_exec_queue_wq_snapshot_capture(q, snapshot);
2190 
2191 	spin_lock(&sched->base.job_list_lock);
2192 	snapshot->pending_list_size = list_count_nodes(&sched->base.pending_list);
2193 	snapshot->pending_list = kmalloc_array(snapshot->pending_list_size,
2194 					       sizeof(struct pending_list_snapshot),
2195 					       GFP_ATOMIC);
2196 
2197 	if (snapshot->pending_list) {
2198 		struct xe_sched_job *job_iter;
2199 
2200 		i = 0;
2201 		list_for_each_entry(job_iter, &sched->base.pending_list, drm.list) {
2202 			snapshot->pending_list[i].seqno =
2203 				xe_sched_job_seqno(job_iter);
2204 			snapshot->pending_list[i].fence =
2205 				dma_fence_is_signaled(job_iter->fence) ? 1 : 0;
2206 			snapshot->pending_list[i].finished =
2207 				dma_fence_is_signaled(&job_iter->drm.s_fence->finished)
2208 				? 1 : 0;
2209 			i++;
2210 		}
2211 	}
2212 
2213 	spin_unlock(&sched->base.job_list_lock);
2214 
2215 	return snapshot;
2216 }
2217 
2218 /**
2219  * xe_guc_exec_queue_snapshot_capture_delayed - Take delayed part of snapshot of the GuC Engine.
2220  * @snapshot: Previously captured snapshot of job.
2221  *
2222  * This captures some data that requires taking some locks, so it cannot be done in signaling path.
2223  */
2224 void
2225 xe_guc_exec_queue_snapshot_capture_delayed(struct xe_guc_submit_exec_queue_snapshot *snapshot)
2226 {
2227 	int i;
2228 
2229 	if (!snapshot || !snapshot->lrc)
2230 		return;
2231 
2232 	for (i = 0; i < snapshot->width; ++i)
2233 		xe_lrc_snapshot_capture_delayed(snapshot->lrc[i]);
2234 }
2235 
2236 /**
2237  * xe_guc_exec_queue_snapshot_print - Print out a given GuC Engine snapshot.
2238  * @snapshot: GuC Submit Engine snapshot object.
2239  * @p: drm_printer where it will be printed out.
2240  *
2241  * This function prints out a given GuC Submit Engine snapshot object.
2242  */
2243 void
2244 xe_guc_exec_queue_snapshot_print(struct xe_guc_submit_exec_queue_snapshot *snapshot,
2245 				 struct drm_printer *p)
2246 {
2247 	int i;
2248 
2249 	if (!snapshot)
2250 		return;
2251 
2252 	drm_printf(p, "GuC ID: %d\n", snapshot->guc.id);
2253 	drm_printf(p, "\tName: %s\n", snapshot->name);
2254 	drm_printf(p, "\tClass: %d\n", snapshot->class);
2255 	drm_printf(p, "\tLogical mask: 0x%x\n", snapshot->logical_mask);
2256 	drm_printf(p, "\tWidth: %d\n", snapshot->width);
2257 	drm_printf(p, "\tRef: %d\n", snapshot->refcount);
2258 	drm_printf(p, "\tTimeout: %ld (ms)\n", snapshot->sched_timeout);
2259 	drm_printf(p, "\tTimeslice: %u (us)\n",
2260 		   snapshot->sched_props.timeslice_us);
2261 	drm_printf(p, "\tPreempt timeout: %u (us)\n",
2262 		   snapshot->sched_props.preempt_timeout_us);
2263 
2264 	for (i = 0; snapshot->lrc && i < snapshot->width; ++i)
2265 		xe_lrc_snapshot_print(snapshot->lrc[i], p);
2266 
2267 	drm_printf(p, "\tSchedule State: 0x%x\n", snapshot->schedule_state);
2268 	drm_printf(p, "\tFlags: 0x%lx\n", snapshot->exec_queue_flags);
2269 
2270 	if (snapshot->parallel_execution)
2271 		guc_exec_queue_wq_snapshot_print(snapshot, p);
2272 
2273 	for (i = 0; snapshot->pending_list && i < snapshot->pending_list_size;
2274 	     i++)
2275 		drm_printf(p, "\tJob: seqno=%d, fence=%d, finished=%d\n",
2276 			   snapshot->pending_list[i].seqno,
2277 			   snapshot->pending_list[i].fence,
2278 			   snapshot->pending_list[i].finished);
2279 }
2280 
2281 /**
2282  * xe_guc_exec_queue_snapshot_free - Free all allocated objects for a given
2283  * snapshot.
2284  * @snapshot: GuC Submit Engine snapshot object.
2285  *
2286  * This function free all the memory that needed to be allocated at capture
2287  * time.
2288  */
2289 void xe_guc_exec_queue_snapshot_free(struct xe_guc_submit_exec_queue_snapshot *snapshot)
2290 {
2291 	int i;
2292 
2293 	if (!snapshot)
2294 		return;
2295 
2296 	if (snapshot->lrc) {
2297 		for (i = 0; i < snapshot->width; i++)
2298 			xe_lrc_snapshot_free(snapshot->lrc[i]);
2299 		kfree(snapshot->lrc);
2300 	}
2301 	kfree(snapshot->pending_list);
2302 	kfree(snapshot);
2303 }
2304 
2305 static void guc_exec_queue_print(struct xe_exec_queue *q, struct drm_printer *p)
2306 {
2307 	struct xe_guc_submit_exec_queue_snapshot *snapshot;
2308 
2309 	snapshot = xe_guc_exec_queue_snapshot_capture(q);
2310 	xe_guc_exec_queue_snapshot_print(snapshot, p);
2311 	xe_guc_exec_queue_snapshot_free(snapshot);
2312 }
2313 
2314 /**
2315  * xe_guc_submit_print - GuC Submit Print.
2316  * @guc: GuC.
2317  * @p: drm_printer where it will be printed out.
2318  *
2319  * This function capture and prints snapshots of **all** GuC Engines.
2320  */
2321 void xe_guc_submit_print(struct xe_guc *guc, struct drm_printer *p)
2322 {
2323 	struct xe_exec_queue *q;
2324 	unsigned long index;
2325 
2326 	if (!xe_device_uc_enabled(guc_to_xe(guc)))
2327 		return;
2328 
2329 	mutex_lock(&guc->submission_state.lock);
2330 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
2331 		guc_exec_queue_print(q, p);
2332 	mutex_unlock(&guc->submission_state.lock);
2333 }
2334