xref: /linux/drivers/gpu/drm/xe/xe_guc_submit.c (revision 88434448438e4302e272b2a2b810b42e05ea024b)
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2022 Intel Corporation
4  */
5 
6 #include "xe_guc_submit.h"
7 
8 #include <linux/bitfield.h>
9 #include <linux/bitmap.h>
10 #include <linux/circ_buf.h>
11 #include <linux/delay.h>
12 #include <linux/dma-fence-array.h>
13 #include <linux/math64.h>
14 
15 #include <drm/drm_managed.h>
16 
17 #include "abi/guc_actions_abi.h"
18 #include "abi/guc_actions_slpc_abi.h"
19 #include "abi/guc_klvs_abi.h"
20 #include "regs/xe_lrc_layout.h"
21 #include "xe_assert.h"
22 #include "xe_devcoredump.h"
23 #include "xe_device.h"
24 #include "xe_exec_queue.h"
25 #include "xe_force_wake.h"
26 #include "xe_gpu_scheduler.h"
27 #include "xe_gt.h"
28 #include "xe_gt_clock.h"
29 #include "xe_gt_printk.h"
30 #include "xe_guc.h"
31 #include "xe_guc_capture.h"
32 #include "xe_guc_ct.h"
33 #include "xe_guc_exec_queue_types.h"
34 #include "xe_guc_id_mgr.h"
35 #include "xe_guc_klv_helpers.h"
36 #include "xe_guc_submit_types.h"
37 #include "xe_hw_engine.h"
38 #include "xe_hw_fence.h"
39 #include "xe_lrc.h"
40 #include "xe_macros.h"
41 #include "xe_map.h"
42 #include "xe_mocs.h"
43 #include "xe_pm.h"
44 #include "xe_ring_ops_types.h"
45 #include "xe_sched_job.h"
46 #include "xe_trace.h"
47 #include "xe_vm.h"
48 
49 static struct xe_guc *
50 exec_queue_to_guc(struct xe_exec_queue *q)
51 {
52 	return &q->gt->uc.guc;
53 }
54 
55 /*
56  * Helpers for engine state, using an atomic as some of the bits can transition
57  * as the same time (e.g. a suspend can be happning at the same time as schedule
58  * engine done being processed).
59  */
60 #define EXEC_QUEUE_STATE_REGISTERED		(1 << 0)
61 #define EXEC_QUEUE_STATE_ENABLED		(1 << 1)
62 #define EXEC_QUEUE_STATE_PENDING_ENABLE		(1 << 2)
63 #define EXEC_QUEUE_STATE_PENDING_DISABLE	(1 << 3)
64 #define EXEC_QUEUE_STATE_DESTROYED		(1 << 4)
65 #define EXEC_QUEUE_STATE_SUSPENDED		(1 << 5)
66 #define EXEC_QUEUE_STATE_RESET			(1 << 6)
67 #define EXEC_QUEUE_STATE_KILLED			(1 << 7)
68 #define EXEC_QUEUE_STATE_WEDGED			(1 << 8)
69 #define EXEC_QUEUE_STATE_BANNED			(1 << 9)
70 #define EXEC_QUEUE_STATE_CHECK_TIMEOUT		(1 << 10)
71 #define EXEC_QUEUE_STATE_EXTRA_REF		(1 << 11)
72 
73 static bool exec_queue_registered(struct xe_exec_queue *q)
74 {
75 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_REGISTERED;
76 }
77 
78 static void set_exec_queue_registered(struct xe_exec_queue *q)
79 {
80 	atomic_or(EXEC_QUEUE_STATE_REGISTERED, &q->guc->state);
81 }
82 
83 static void clear_exec_queue_registered(struct xe_exec_queue *q)
84 {
85 	atomic_and(~EXEC_QUEUE_STATE_REGISTERED, &q->guc->state);
86 }
87 
88 static bool exec_queue_enabled(struct xe_exec_queue *q)
89 {
90 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_ENABLED;
91 }
92 
93 static void set_exec_queue_enabled(struct xe_exec_queue *q)
94 {
95 	atomic_or(EXEC_QUEUE_STATE_ENABLED, &q->guc->state);
96 }
97 
98 static void clear_exec_queue_enabled(struct xe_exec_queue *q)
99 {
100 	atomic_and(~EXEC_QUEUE_STATE_ENABLED, &q->guc->state);
101 }
102 
103 static bool exec_queue_pending_enable(struct xe_exec_queue *q)
104 {
105 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_PENDING_ENABLE;
106 }
107 
108 static void set_exec_queue_pending_enable(struct xe_exec_queue *q)
109 {
110 	atomic_or(EXEC_QUEUE_STATE_PENDING_ENABLE, &q->guc->state);
111 }
112 
113 static void clear_exec_queue_pending_enable(struct xe_exec_queue *q)
114 {
115 	atomic_and(~EXEC_QUEUE_STATE_PENDING_ENABLE, &q->guc->state);
116 }
117 
118 static bool exec_queue_pending_disable(struct xe_exec_queue *q)
119 {
120 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_PENDING_DISABLE;
121 }
122 
123 static void set_exec_queue_pending_disable(struct xe_exec_queue *q)
124 {
125 	atomic_or(EXEC_QUEUE_STATE_PENDING_DISABLE, &q->guc->state);
126 }
127 
128 static void clear_exec_queue_pending_disable(struct xe_exec_queue *q)
129 {
130 	atomic_and(~EXEC_QUEUE_STATE_PENDING_DISABLE, &q->guc->state);
131 }
132 
133 static bool exec_queue_destroyed(struct xe_exec_queue *q)
134 {
135 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_DESTROYED;
136 }
137 
138 static void set_exec_queue_destroyed(struct xe_exec_queue *q)
139 {
140 	atomic_or(EXEC_QUEUE_STATE_DESTROYED, &q->guc->state);
141 }
142 
143 static bool exec_queue_banned(struct xe_exec_queue *q)
144 {
145 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_BANNED;
146 }
147 
148 static void set_exec_queue_banned(struct xe_exec_queue *q)
149 {
150 	atomic_or(EXEC_QUEUE_STATE_BANNED, &q->guc->state);
151 }
152 
153 static bool exec_queue_suspended(struct xe_exec_queue *q)
154 {
155 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_SUSPENDED;
156 }
157 
158 static void set_exec_queue_suspended(struct xe_exec_queue *q)
159 {
160 	atomic_or(EXEC_QUEUE_STATE_SUSPENDED, &q->guc->state);
161 }
162 
163 static void clear_exec_queue_suspended(struct xe_exec_queue *q)
164 {
165 	atomic_and(~EXEC_QUEUE_STATE_SUSPENDED, &q->guc->state);
166 }
167 
168 static bool exec_queue_reset(struct xe_exec_queue *q)
169 {
170 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_RESET;
171 }
172 
173 static void set_exec_queue_reset(struct xe_exec_queue *q)
174 {
175 	atomic_or(EXEC_QUEUE_STATE_RESET, &q->guc->state);
176 }
177 
178 static bool exec_queue_killed(struct xe_exec_queue *q)
179 {
180 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_KILLED;
181 }
182 
183 static void set_exec_queue_killed(struct xe_exec_queue *q)
184 {
185 	atomic_or(EXEC_QUEUE_STATE_KILLED, &q->guc->state);
186 }
187 
188 static bool exec_queue_wedged(struct xe_exec_queue *q)
189 {
190 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_WEDGED;
191 }
192 
193 static void set_exec_queue_wedged(struct xe_exec_queue *q)
194 {
195 	atomic_or(EXEC_QUEUE_STATE_WEDGED, &q->guc->state);
196 }
197 
198 static bool exec_queue_check_timeout(struct xe_exec_queue *q)
199 {
200 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_CHECK_TIMEOUT;
201 }
202 
203 static void set_exec_queue_check_timeout(struct xe_exec_queue *q)
204 {
205 	atomic_or(EXEC_QUEUE_STATE_CHECK_TIMEOUT, &q->guc->state);
206 }
207 
208 static void clear_exec_queue_check_timeout(struct xe_exec_queue *q)
209 {
210 	atomic_and(~EXEC_QUEUE_STATE_CHECK_TIMEOUT, &q->guc->state);
211 }
212 
213 static bool exec_queue_extra_ref(struct xe_exec_queue *q)
214 {
215 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_EXTRA_REF;
216 }
217 
218 static void set_exec_queue_extra_ref(struct xe_exec_queue *q)
219 {
220 	atomic_or(EXEC_QUEUE_STATE_EXTRA_REF, &q->guc->state);
221 }
222 
223 static bool exec_queue_killed_or_banned_or_wedged(struct xe_exec_queue *q)
224 {
225 	return (atomic_read(&q->guc->state) &
226 		(EXEC_QUEUE_STATE_WEDGED | EXEC_QUEUE_STATE_KILLED |
227 		 EXEC_QUEUE_STATE_BANNED));
228 }
229 
230 static void guc_submit_fini(struct drm_device *drm, void *arg)
231 {
232 	struct xe_guc *guc = arg;
233 	struct xe_device *xe = guc_to_xe(guc);
234 	struct xe_gt *gt = guc_to_gt(guc);
235 	int ret;
236 
237 	ret = wait_event_timeout(guc->submission_state.fini_wq,
238 				 xa_empty(&guc->submission_state.exec_queue_lookup),
239 				 HZ * 5);
240 
241 	drain_workqueue(xe->destroy_wq);
242 
243 	xe_gt_assert(gt, ret);
244 
245 	xa_destroy(&guc->submission_state.exec_queue_lookup);
246 }
247 
248 static void guc_submit_wedged_fini(void *arg)
249 {
250 	struct xe_guc *guc = arg;
251 	struct xe_exec_queue *q;
252 	unsigned long index;
253 
254 	mutex_lock(&guc->submission_state.lock);
255 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
256 		if (exec_queue_wedged(q)) {
257 			mutex_unlock(&guc->submission_state.lock);
258 			xe_exec_queue_put(q);
259 			mutex_lock(&guc->submission_state.lock);
260 		}
261 	}
262 	mutex_unlock(&guc->submission_state.lock);
263 }
264 
265 static const struct xe_exec_queue_ops guc_exec_queue_ops;
266 
267 static void primelockdep(struct xe_guc *guc)
268 {
269 	if (!IS_ENABLED(CONFIG_LOCKDEP))
270 		return;
271 
272 	fs_reclaim_acquire(GFP_KERNEL);
273 
274 	mutex_lock(&guc->submission_state.lock);
275 	mutex_unlock(&guc->submission_state.lock);
276 
277 	fs_reclaim_release(GFP_KERNEL);
278 }
279 
280 /**
281  * xe_guc_submit_init() - Initialize GuC submission.
282  * @guc: the &xe_guc to initialize
283  * @num_ids: number of GuC context IDs to use
284  *
285  * The bare-metal or PF driver can pass ~0 as &num_ids to indicate that all
286  * GuC context IDs supported by the GuC firmware should be used for submission.
287  *
288  * Only VF drivers will have to provide explicit number of GuC context IDs
289  * that they can use for submission.
290  *
291  * Return: 0 on success or a negative error code on failure.
292  */
293 int xe_guc_submit_init(struct xe_guc *guc, unsigned int num_ids)
294 {
295 	struct xe_device *xe = guc_to_xe(guc);
296 	struct xe_gt *gt = guc_to_gt(guc);
297 	int err;
298 
299 	err = drmm_mutex_init(&xe->drm, &guc->submission_state.lock);
300 	if (err)
301 		return err;
302 
303 	err = xe_guc_id_mgr_init(&guc->submission_state.idm, num_ids);
304 	if (err)
305 		return err;
306 
307 	gt->exec_queue_ops = &guc_exec_queue_ops;
308 
309 	xa_init(&guc->submission_state.exec_queue_lookup);
310 
311 	init_waitqueue_head(&guc->submission_state.fini_wq);
312 
313 	primelockdep(guc);
314 
315 	guc->submission_state.initialized = true;
316 
317 	return drmm_add_action_or_reset(&xe->drm, guc_submit_fini, guc);
318 }
319 
320 /*
321  * Given that we want to guarantee enough RCS throughput to avoid missing
322  * frames, we set the yield policy to 20% of each 80ms interval.
323  */
324 #define RC_YIELD_DURATION	80	/* in ms */
325 #define RC_YIELD_RATIO		20	/* in percent */
326 static u32 *emit_render_compute_yield_klv(u32 *emit)
327 {
328 	*emit++ = PREP_GUC_KLV_TAG(SCHEDULING_POLICIES_RENDER_COMPUTE_YIELD);
329 	*emit++ = RC_YIELD_DURATION;
330 	*emit++ = RC_YIELD_RATIO;
331 
332 	return emit;
333 }
334 
335 #define SCHEDULING_POLICY_MAX_DWORDS 16
336 static int guc_init_global_schedule_policy(struct xe_guc *guc)
337 {
338 	u32 data[SCHEDULING_POLICY_MAX_DWORDS];
339 	u32 *emit = data;
340 	u32 count = 0;
341 	int ret;
342 
343 	if (GUC_SUBMIT_VER(guc) < MAKE_GUC_VER(1, 1, 0))
344 		return 0;
345 
346 	*emit++ = XE_GUC_ACTION_UPDATE_SCHEDULING_POLICIES_KLV;
347 
348 	if (CCS_MASK(guc_to_gt(guc)))
349 		emit = emit_render_compute_yield_klv(emit);
350 
351 	count = emit - data;
352 	if (count > 1) {
353 		xe_assert(guc_to_xe(guc), count <= SCHEDULING_POLICY_MAX_DWORDS);
354 
355 		ret = xe_guc_ct_send_block(&guc->ct, data, count);
356 		if (ret < 0) {
357 			xe_gt_err(guc_to_gt(guc),
358 				  "failed to enable GuC sheduling policies: %pe\n",
359 				  ERR_PTR(ret));
360 			return ret;
361 		}
362 	}
363 
364 	return 0;
365 }
366 
367 int xe_guc_submit_enable(struct xe_guc *guc)
368 {
369 	int ret;
370 
371 	ret = guc_init_global_schedule_policy(guc);
372 	if (ret)
373 		return ret;
374 
375 	guc->submission_state.enabled = true;
376 
377 	return 0;
378 }
379 
380 void xe_guc_submit_disable(struct xe_guc *guc)
381 {
382 	guc->submission_state.enabled = false;
383 }
384 
385 static void __release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q, u32 xa_count)
386 {
387 	int i;
388 
389 	lockdep_assert_held(&guc->submission_state.lock);
390 
391 	for (i = 0; i < xa_count; ++i)
392 		xa_erase(&guc->submission_state.exec_queue_lookup, q->guc->id + i);
393 
394 	xe_guc_id_mgr_release_locked(&guc->submission_state.idm,
395 				     q->guc->id, q->width);
396 
397 	if (xa_empty(&guc->submission_state.exec_queue_lookup))
398 		wake_up(&guc->submission_state.fini_wq);
399 }
400 
401 static int alloc_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
402 {
403 	int ret;
404 	int i;
405 
406 	/*
407 	 * Must use GFP_NOWAIT as this lock is in the dma fence signalling path,
408 	 * worse case user gets -ENOMEM on engine create and has to try again.
409 	 *
410 	 * FIXME: Have caller pre-alloc or post-alloc /w GFP_KERNEL to prevent
411 	 * failure.
412 	 */
413 	lockdep_assert_held(&guc->submission_state.lock);
414 
415 	ret = xe_guc_id_mgr_reserve_locked(&guc->submission_state.idm,
416 					   q->width);
417 	if (ret < 0)
418 		return ret;
419 
420 	q->guc->id = ret;
421 
422 	for (i = 0; i < q->width; ++i) {
423 		ret = xa_err(xa_store(&guc->submission_state.exec_queue_lookup,
424 				      q->guc->id + i, q, GFP_NOWAIT));
425 		if (ret)
426 			goto err_release;
427 	}
428 
429 	return 0;
430 
431 err_release:
432 	__release_guc_id(guc, q, i);
433 
434 	return ret;
435 }
436 
437 static void release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
438 {
439 	mutex_lock(&guc->submission_state.lock);
440 	__release_guc_id(guc, q, q->width);
441 	mutex_unlock(&guc->submission_state.lock);
442 }
443 
444 struct exec_queue_policy {
445 	u32 count;
446 	struct guc_update_exec_queue_policy h2g;
447 };
448 
449 static u32 __guc_exec_queue_policy_action_size(struct exec_queue_policy *policy)
450 {
451 	size_t bytes = sizeof(policy->h2g.header) +
452 		       (sizeof(policy->h2g.klv[0]) * policy->count);
453 
454 	return bytes / sizeof(u32);
455 }
456 
457 static void __guc_exec_queue_policy_start_klv(struct exec_queue_policy *policy,
458 					      u16 guc_id)
459 {
460 	policy->h2g.header.action =
461 		XE_GUC_ACTION_HOST2GUC_UPDATE_CONTEXT_POLICIES;
462 	policy->h2g.header.guc_id = guc_id;
463 	policy->count = 0;
464 }
465 
466 #define MAKE_EXEC_QUEUE_POLICY_ADD(func, id) \
467 static void __guc_exec_queue_policy_add_##func(struct exec_queue_policy *policy, \
468 					   u32 data) \
469 { \
470 	XE_WARN_ON(policy->count >= GUC_CONTEXT_POLICIES_KLV_NUM_IDS); \
471 \
472 	policy->h2g.klv[policy->count].kl = \
473 		FIELD_PREP(GUC_KLV_0_KEY, \
474 			   GUC_CONTEXT_POLICIES_KLV_ID_##id) | \
475 		FIELD_PREP(GUC_KLV_0_LEN, 1); \
476 	policy->h2g.klv[policy->count].value = data; \
477 	policy->count++; \
478 }
479 
480 MAKE_EXEC_QUEUE_POLICY_ADD(execution_quantum, EXECUTION_QUANTUM)
481 MAKE_EXEC_QUEUE_POLICY_ADD(preemption_timeout, PREEMPTION_TIMEOUT)
482 MAKE_EXEC_QUEUE_POLICY_ADD(priority, SCHEDULING_PRIORITY)
483 MAKE_EXEC_QUEUE_POLICY_ADD(slpc_exec_queue_freq_req, SLPM_GT_FREQUENCY)
484 #undef MAKE_EXEC_QUEUE_POLICY_ADD
485 
486 static const int xe_exec_queue_prio_to_guc[] = {
487 	[XE_EXEC_QUEUE_PRIORITY_LOW] = GUC_CLIENT_PRIORITY_NORMAL,
488 	[XE_EXEC_QUEUE_PRIORITY_NORMAL] = GUC_CLIENT_PRIORITY_KMD_NORMAL,
489 	[XE_EXEC_QUEUE_PRIORITY_HIGH] = GUC_CLIENT_PRIORITY_HIGH,
490 	[XE_EXEC_QUEUE_PRIORITY_KERNEL] = GUC_CLIENT_PRIORITY_KMD_HIGH,
491 };
492 
493 static void init_policies(struct xe_guc *guc, struct xe_exec_queue *q)
494 {
495 	struct exec_queue_policy policy;
496 	enum xe_exec_queue_priority prio = q->sched_props.priority;
497 	u32 timeslice_us = q->sched_props.timeslice_us;
498 	u32 slpc_exec_queue_freq_req = 0;
499 	u32 preempt_timeout_us = q->sched_props.preempt_timeout_us;
500 
501 	xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q));
502 
503 	if (q->flags & EXEC_QUEUE_FLAG_LOW_LATENCY)
504 		slpc_exec_queue_freq_req |= SLPC_CTX_FREQ_REQ_IS_COMPUTE;
505 
506 	__guc_exec_queue_policy_start_klv(&policy, q->guc->id);
507 	__guc_exec_queue_policy_add_priority(&policy, xe_exec_queue_prio_to_guc[prio]);
508 	__guc_exec_queue_policy_add_execution_quantum(&policy, timeslice_us);
509 	__guc_exec_queue_policy_add_preemption_timeout(&policy, preempt_timeout_us);
510 	__guc_exec_queue_policy_add_slpc_exec_queue_freq_req(&policy,
511 							     slpc_exec_queue_freq_req);
512 
513 	xe_guc_ct_send(&guc->ct, (u32 *)&policy.h2g,
514 		       __guc_exec_queue_policy_action_size(&policy), 0, 0);
515 }
516 
517 static void set_min_preemption_timeout(struct xe_guc *guc, struct xe_exec_queue *q)
518 {
519 	struct exec_queue_policy policy;
520 
521 	__guc_exec_queue_policy_start_klv(&policy, q->guc->id);
522 	__guc_exec_queue_policy_add_preemption_timeout(&policy, 1);
523 
524 	xe_guc_ct_send(&guc->ct, (u32 *)&policy.h2g,
525 		       __guc_exec_queue_policy_action_size(&policy), 0, 0);
526 }
527 
528 #define parallel_read(xe_, map_, field_) \
529 	xe_map_rd_field(xe_, &map_, 0, struct guc_submit_parallel_scratch, \
530 			field_)
531 #define parallel_write(xe_, map_, field_, val_) \
532 	xe_map_wr_field(xe_, &map_, 0, struct guc_submit_parallel_scratch, \
533 			field_, val_)
534 
535 static void __register_mlrc_exec_queue(struct xe_guc *guc,
536 				       struct xe_exec_queue *q,
537 				       struct guc_ctxt_registration_info *info)
538 {
539 #define MAX_MLRC_REG_SIZE      (13 + XE_HW_ENGINE_MAX_INSTANCE * 2)
540 	u32 action[MAX_MLRC_REG_SIZE];
541 	int len = 0;
542 	int i;
543 
544 	xe_gt_assert(guc_to_gt(guc), xe_exec_queue_is_parallel(q));
545 
546 	action[len++] = XE_GUC_ACTION_REGISTER_CONTEXT_MULTI_LRC;
547 	action[len++] = info->flags;
548 	action[len++] = info->context_idx;
549 	action[len++] = info->engine_class;
550 	action[len++] = info->engine_submit_mask;
551 	action[len++] = info->wq_desc_lo;
552 	action[len++] = info->wq_desc_hi;
553 	action[len++] = info->wq_base_lo;
554 	action[len++] = info->wq_base_hi;
555 	action[len++] = info->wq_size;
556 	action[len++] = q->width;
557 	action[len++] = info->hwlrca_lo;
558 	action[len++] = info->hwlrca_hi;
559 
560 	for (i = 1; i < q->width; ++i) {
561 		struct xe_lrc *lrc = q->lrc[i];
562 
563 		action[len++] = lower_32_bits(xe_lrc_descriptor(lrc));
564 		action[len++] = upper_32_bits(xe_lrc_descriptor(lrc));
565 	}
566 
567 	/* explicitly checks some fields that we might fixup later */
568 	xe_gt_assert(guc_to_gt(guc), info->wq_desc_lo ==
569 		     action[XE_GUC_REGISTER_CONTEXT_MULTI_LRC_DATA_5_WQ_DESC_ADDR_LOWER]);
570 	xe_gt_assert(guc_to_gt(guc), info->wq_base_lo ==
571 		     action[XE_GUC_REGISTER_CONTEXT_MULTI_LRC_DATA_7_WQ_BUF_BASE_LOWER]);
572 	xe_gt_assert(guc_to_gt(guc), q->width ==
573 		     action[XE_GUC_REGISTER_CONTEXT_MULTI_LRC_DATA_10_NUM_CTXS]);
574 	xe_gt_assert(guc_to_gt(guc), info->hwlrca_lo ==
575 		     action[XE_GUC_REGISTER_CONTEXT_MULTI_LRC_DATA_11_HW_LRC_ADDR]);
576 	xe_gt_assert(guc_to_gt(guc), len <= MAX_MLRC_REG_SIZE);
577 #undef MAX_MLRC_REG_SIZE
578 
579 	xe_guc_ct_send(&guc->ct, action, len, 0, 0);
580 }
581 
582 static void __register_exec_queue(struct xe_guc *guc,
583 				  struct guc_ctxt_registration_info *info)
584 {
585 	u32 action[] = {
586 		XE_GUC_ACTION_REGISTER_CONTEXT,
587 		info->flags,
588 		info->context_idx,
589 		info->engine_class,
590 		info->engine_submit_mask,
591 		info->wq_desc_lo,
592 		info->wq_desc_hi,
593 		info->wq_base_lo,
594 		info->wq_base_hi,
595 		info->wq_size,
596 		info->hwlrca_lo,
597 		info->hwlrca_hi,
598 	};
599 
600 	/* explicitly checks some fields that we might fixup later */
601 	xe_gt_assert(guc_to_gt(guc), info->wq_desc_lo ==
602 		     action[XE_GUC_REGISTER_CONTEXT_DATA_5_WQ_DESC_ADDR_LOWER]);
603 	xe_gt_assert(guc_to_gt(guc), info->wq_base_lo ==
604 		     action[XE_GUC_REGISTER_CONTEXT_DATA_7_WQ_BUF_BASE_LOWER]);
605 	xe_gt_assert(guc_to_gt(guc), info->hwlrca_lo ==
606 		     action[XE_GUC_REGISTER_CONTEXT_DATA_10_HW_LRC_ADDR]);
607 
608 	xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action), 0, 0);
609 }
610 
611 static void register_exec_queue(struct xe_exec_queue *q, int ctx_type)
612 {
613 	struct xe_guc *guc = exec_queue_to_guc(q);
614 	struct xe_device *xe = guc_to_xe(guc);
615 	struct xe_lrc *lrc = q->lrc[0];
616 	struct guc_ctxt_registration_info info;
617 
618 	xe_gt_assert(guc_to_gt(guc), !exec_queue_registered(q));
619 	xe_gt_assert(guc_to_gt(guc), ctx_type < GUC_CONTEXT_COUNT);
620 
621 	memset(&info, 0, sizeof(info));
622 	info.context_idx = q->guc->id;
623 	info.engine_class = xe_engine_class_to_guc_class(q->class);
624 	info.engine_submit_mask = q->logical_mask;
625 	info.hwlrca_lo = lower_32_bits(xe_lrc_descriptor(lrc));
626 	info.hwlrca_hi = upper_32_bits(xe_lrc_descriptor(lrc));
627 	info.flags = CONTEXT_REGISTRATION_FLAG_KMD |
628 		FIELD_PREP(CONTEXT_REGISTRATION_FLAG_TYPE, ctx_type);
629 
630 	if (xe_exec_queue_is_parallel(q)) {
631 		u64 ggtt_addr = xe_lrc_parallel_ggtt_addr(lrc);
632 		struct iosys_map map = xe_lrc_parallel_map(lrc);
633 
634 		info.wq_desc_lo = lower_32_bits(ggtt_addr +
635 			offsetof(struct guc_submit_parallel_scratch, wq_desc));
636 		info.wq_desc_hi = upper_32_bits(ggtt_addr +
637 			offsetof(struct guc_submit_parallel_scratch, wq_desc));
638 		info.wq_base_lo = lower_32_bits(ggtt_addr +
639 			offsetof(struct guc_submit_parallel_scratch, wq[0]));
640 		info.wq_base_hi = upper_32_bits(ggtt_addr +
641 			offsetof(struct guc_submit_parallel_scratch, wq[0]));
642 		info.wq_size = WQ_SIZE;
643 
644 		q->guc->wqi_head = 0;
645 		q->guc->wqi_tail = 0;
646 		xe_map_memset(xe, &map, 0, 0, PARALLEL_SCRATCH_SIZE - WQ_SIZE);
647 		parallel_write(xe, map, wq_desc.wq_status, WQ_STATUS_ACTIVE);
648 	}
649 
650 	/*
651 	 * We must keep a reference for LR engines if engine is registered with
652 	 * the GuC as jobs signal immediately and can't destroy an engine if the
653 	 * GuC has a reference to it.
654 	 */
655 	if (xe_exec_queue_is_lr(q))
656 		xe_exec_queue_get(q);
657 
658 	set_exec_queue_registered(q);
659 	trace_xe_exec_queue_register(q);
660 	if (xe_exec_queue_is_parallel(q))
661 		__register_mlrc_exec_queue(guc, q, &info);
662 	else
663 		__register_exec_queue(guc, &info);
664 	init_policies(guc, q);
665 }
666 
667 static u32 wq_space_until_wrap(struct xe_exec_queue *q)
668 {
669 	return (WQ_SIZE - q->guc->wqi_tail);
670 }
671 
672 static int wq_wait_for_space(struct xe_exec_queue *q, u32 wqi_size)
673 {
674 	struct xe_guc *guc = exec_queue_to_guc(q);
675 	struct xe_device *xe = guc_to_xe(guc);
676 	struct iosys_map map = xe_lrc_parallel_map(q->lrc[0]);
677 	unsigned int sleep_period_ms = 1;
678 
679 #define AVAILABLE_SPACE \
680 	CIRC_SPACE(q->guc->wqi_tail, q->guc->wqi_head, WQ_SIZE)
681 	if (wqi_size > AVAILABLE_SPACE) {
682 try_again:
683 		q->guc->wqi_head = parallel_read(xe, map, wq_desc.head);
684 		if (wqi_size > AVAILABLE_SPACE) {
685 			if (sleep_period_ms == 1024) {
686 				xe_gt_reset_async(q->gt);
687 				return -ENODEV;
688 			}
689 
690 			msleep(sleep_period_ms);
691 			sleep_period_ms <<= 1;
692 			goto try_again;
693 		}
694 	}
695 #undef AVAILABLE_SPACE
696 
697 	return 0;
698 }
699 
700 static int wq_noop_append(struct xe_exec_queue *q)
701 {
702 	struct xe_guc *guc = exec_queue_to_guc(q);
703 	struct xe_device *xe = guc_to_xe(guc);
704 	struct iosys_map map = xe_lrc_parallel_map(q->lrc[0]);
705 	u32 len_dw = wq_space_until_wrap(q) / sizeof(u32) - 1;
706 
707 	if (wq_wait_for_space(q, wq_space_until_wrap(q)))
708 		return -ENODEV;
709 
710 	xe_gt_assert(guc_to_gt(guc), FIELD_FIT(WQ_LEN_MASK, len_dw));
711 
712 	parallel_write(xe, map, wq[q->guc->wqi_tail / sizeof(u32)],
713 		       FIELD_PREP(WQ_TYPE_MASK, WQ_TYPE_NOOP) |
714 		       FIELD_PREP(WQ_LEN_MASK, len_dw));
715 	q->guc->wqi_tail = 0;
716 
717 	return 0;
718 }
719 
720 static void wq_item_append(struct xe_exec_queue *q)
721 {
722 	struct xe_guc *guc = exec_queue_to_guc(q);
723 	struct xe_device *xe = guc_to_xe(guc);
724 	struct iosys_map map = xe_lrc_parallel_map(q->lrc[0]);
725 #define WQ_HEADER_SIZE	4	/* Includes 1 LRC address too */
726 	u32 wqi[XE_HW_ENGINE_MAX_INSTANCE + (WQ_HEADER_SIZE - 1)];
727 	u32 wqi_size = (q->width + (WQ_HEADER_SIZE - 1)) * sizeof(u32);
728 	u32 len_dw = (wqi_size / sizeof(u32)) - 1;
729 	int i = 0, j;
730 
731 	if (wqi_size > wq_space_until_wrap(q)) {
732 		if (wq_noop_append(q))
733 			return;
734 	}
735 	if (wq_wait_for_space(q, wqi_size))
736 		return;
737 
738 	xe_gt_assert(guc_to_gt(guc), i == XE_GUC_CONTEXT_WQ_HEADER_DATA_0_TYPE_LEN);
739 	wqi[i++] = FIELD_PREP(WQ_TYPE_MASK, WQ_TYPE_MULTI_LRC) |
740 		FIELD_PREP(WQ_LEN_MASK, len_dw);
741 	xe_gt_assert(guc_to_gt(guc), i == XE_GUC_CONTEXT_WQ_EL_INFO_DATA_1_CTX_DESC_LOW);
742 	wqi[i++] = xe_lrc_descriptor(q->lrc[0]);
743 	xe_gt_assert(guc_to_gt(guc), i ==
744 		     XE_GUC_CONTEXT_WQ_EL_INFO_DATA_2_GUCCTX_RINGTAIL_FREEZEPOCS);
745 	wqi[i++] = FIELD_PREP(WQ_GUC_ID_MASK, q->guc->id) |
746 		FIELD_PREP(WQ_RING_TAIL_MASK, q->lrc[0]->ring.tail / sizeof(u64));
747 	xe_gt_assert(guc_to_gt(guc), i == XE_GUC_CONTEXT_WQ_EL_INFO_DATA_3_WI_FENCE_ID);
748 	wqi[i++] = 0;
749 	xe_gt_assert(guc_to_gt(guc), i == XE_GUC_CONTEXT_WQ_EL_CHILD_LIST_DATA_4_RINGTAIL);
750 	for (j = 1; j < q->width; ++j) {
751 		struct xe_lrc *lrc = q->lrc[j];
752 
753 		wqi[i++] = lrc->ring.tail / sizeof(u64);
754 	}
755 
756 	xe_gt_assert(guc_to_gt(guc), i == wqi_size / sizeof(u32));
757 
758 	iosys_map_incr(&map, offsetof(struct guc_submit_parallel_scratch,
759 				      wq[q->guc->wqi_tail / sizeof(u32)]));
760 	xe_map_memcpy_to(xe, &map, 0, wqi, wqi_size);
761 	q->guc->wqi_tail += wqi_size;
762 	xe_gt_assert(guc_to_gt(guc), q->guc->wqi_tail <= WQ_SIZE);
763 
764 	xe_device_wmb(xe);
765 
766 	map = xe_lrc_parallel_map(q->lrc[0]);
767 	parallel_write(xe, map, wq_desc.tail, q->guc->wqi_tail);
768 }
769 
770 static int wq_items_rebase(struct xe_exec_queue *q)
771 {
772 	struct xe_guc *guc = exec_queue_to_guc(q);
773 	struct xe_device *xe = guc_to_xe(guc);
774 	struct iosys_map map = xe_lrc_parallel_map(q->lrc[0]);
775 	int i = q->guc->wqi_head;
776 
777 	/* the ring starts after a header struct */
778 	iosys_map_incr(&map, offsetof(struct guc_submit_parallel_scratch, wq[0]));
779 
780 	while ((i % WQ_SIZE) != (q->guc->wqi_tail % WQ_SIZE)) {
781 		u32 len_dw, type, val;
782 
783 		if (drm_WARN_ON_ONCE(&xe->drm, i < 0 || i > 2 * WQ_SIZE))
784 			break;
785 
786 		val = xe_map_rd_ring_u32(xe, &map, i / sizeof(u32) +
787 					 XE_GUC_CONTEXT_WQ_HEADER_DATA_0_TYPE_LEN,
788 					 WQ_SIZE / sizeof(u32));
789 		len_dw = FIELD_GET(WQ_LEN_MASK, val);
790 		type = FIELD_GET(WQ_TYPE_MASK, val);
791 
792 		if (drm_WARN_ON_ONCE(&xe->drm, len_dw >= WQ_SIZE / sizeof(u32)))
793 			break;
794 
795 		if (type == WQ_TYPE_MULTI_LRC) {
796 			val = xe_lrc_descriptor(q->lrc[0]);
797 			xe_map_wr_ring_u32(xe, &map, i / sizeof(u32) +
798 					   XE_GUC_CONTEXT_WQ_EL_INFO_DATA_1_CTX_DESC_LOW,
799 					   WQ_SIZE / sizeof(u32), val);
800 		} else if (drm_WARN_ON_ONCE(&xe->drm, type != WQ_TYPE_NOOP)) {
801 			break;
802 		}
803 
804 		i += (len_dw + 1) * sizeof(u32);
805 	}
806 
807 	if ((i % WQ_SIZE) != (q->guc->wqi_tail % WQ_SIZE)) {
808 		xe_gt_err(q->gt, "Exec queue fixups incomplete - wqi parse failed\n");
809 		return -EBADMSG;
810 	}
811 	return 0;
812 }
813 
814 #define RESUME_PENDING	~0x0ull
815 static void submit_exec_queue(struct xe_exec_queue *q)
816 {
817 	struct xe_guc *guc = exec_queue_to_guc(q);
818 	struct xe_lrc *lrc = q->lrc[0];
819 	u32 action[3];
820 	u32 g2h_len = 0;
821 	u32 num_g2h = 0;
822 	int len = 0;
823 	bool extra_submit = false;
824 
825 	xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q));
826 
827 	if (xe_exec_queue_is_parallel(q))
828 		wq_item_append(q);
829 	else
830 		xe_lrc_set_ring_tail(lrc, lrc->ring.tail);
831 
832 	if (exec_queue_suspended(q) && !xe_exec_queue_is_parallel(q))
833 		return;
834 
835 	if (!exec_queue_enabled(q) && !exec_queue_suspended(q)) {
836 		action[len++] = XE_GUC_ACTION_SCHED_CONTEXT_MODE_SET;
837 		action[len++] = q->guc->id;
838 		action[len++] = GUC_CONTEXT_ENABLE;
839 		g2h_len = G2H_LEN_DW_SCHED_CONTEXT_MODE_SET;
840 		num_g2h = 1;
841 		if (xe_exec_queue_is_parallel(q))
842 			extra_submit = true;
843 
844 		q->guc->resume_time = RESUME_PENDING;
845 		set_exec_queue_pending_enable(q);
846 		set_exec_queue_enabled(q);
847 		trace_xe_exec_queue_scheduling_enable(q);
848 	} else {
849 		action[len++] = XE_GUC_ACTION_SCHED_CONTEXT;
850 		action[len++] = q->guc->id;
851 		trace_xe_exec_queue_submit(q);
852 	}
853 
854 	xe_guc_ct_send(&guc->ct, action, len, g2h_len, num_g2h);
855 
856 	if (extra_submit) {
857 		len = 0;
858 		action[len++] = XE_GUC_ACTION_SCHED_CONTEXT;
859 		action[len++] = q->guc->id;
860 		trace_xe_exec_queue_submit(q);
861 
862 		xe_guc_ct_send(&guc->ct, action, len, 0, 0);
863 	}
864 }
865 
866 static struct dma_fence *
867 guc_exec_queue_run_job(struct drm_sched_job *drm_job)
868 {
869 	struct xe_sched_job *job = to_xe_sched_job(drm_job);
870 	struct xe_exec_queue *q = job->q;
871 	struct xe_guc *guc = exec_queue_to_guc(q);
872 	struct dma_fence *fence = NULL;
873 	bool lr = xe_exec_queue_is_lr(q);
874 
875 	xe_gt_assert(guc_to_gt(guc), !(exec_queue_destroyed(q) || exec_queue_pending_disable(q)) ||
876 		     exec_queue_banned(q) || exec_queue_suspended(q));
877 
878 	trace_xe_sched_job_run(job);
879 
880 	if (!exec_queue_killed_or_banned_or_wedged(q) && !xe_sched_job_is_error(job)) {
881 		if (!exec_queue_registered(q))
882 			register_exec_queue(q, GUC_CONTEXT_NORMAL);
883 		if (!lr)	/* LR jobs are emitted in the exec IOCTL */
884 			q->ring_ops->emit_job(job);
885 		submit_exec_queue(q);
886 	}
887 
888 	if (lr) {
889 		xe_sched_job_set_error(job, -EOPNOTSUPP);
890 		dma_fence_put(job->fence);	/* Drop ref from xe_sched_job_arm */
891 	} else {
892 		fence = job->fence;
893 	}
894 
895 	return fence;
896 }
897 
898 /**
899  * xe_guc_jobs_ring_rebase - Re-emit ring commands of requests pending
900  * on all queues under a guc.
901  * @guc: the &xe_guc struct instance
902  */
903 void xe_guc_jobs_ring_rebase(struct xe_guc *guc)
904 {
905 	struct xe_exec_queue *q;
906 	unsigned long index;
907 
908 	/*
909 	 * This routine is used within VF migration recovery. This means
910 	 * using the lock here introduces a restriction: we cannot wait
911 	 * for any GFX HW response while the lock is taken.
912 	 */
913 	mutex_lock(&guc->submission_state.lock);
914 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
915 		if (exec_queue_killed_or_banned_or_wedged(q))
916 			continue;
917 		xe_exec_queue_jobs_ring_restore(q);
918 	}
919 	mutex_unlock(&guc->submission_state.lock);
920 }
921 
922 static void guc_exec_queue_free_job(struct drm_sched_job *drm_job)
923 {
924 	struct xe_sched_job *job = to_xe_sched_job(drm_job);
925 
926 	trace_xe_sched_job_free(job);
927 	xe_sched_job_put(job);
928 }
929 
930 int xe_guc_read_stopped(struct xe_guc *guc)
931 {
932 	return atomic_read(&guc->submission_state.stopped);
933 }
934 
935 #define MAKE_SCHED_CONTEXT_ACTION(q, enable_disable)			\
936 	u32 action[] = {						\
937 		XE_GUC_ACTION_SCHED_CONTEXT_MODE_SET,			\
938 		q->guc->id,						\
939 		GUC_CONTEXT_##enable_disable,				\
940 	}
941 
942 static void disable_scheduling_deregister(struct xe_guc *guc,
943 					  struct xe_exec_queue *q)
944 {
945 	MAKE_SCHED_CONTEXT_ACTION(q, DISABLE);
946 	int ret;
947 
948 	set_min_preemption_timeout(guc, q);
949 	smp_rmb();
950 	ret = wait_event_timeout(guc->ct.wq,
951 				 (!exec_queue_pending_enable(q) &&
952 				  !exec_queue_pending_disable(q)) ||
953 					 xe_guc_read_stopped(guc),
954 				 HZ * 5);
955 	if (!ret) {
956 		struct xe_gpu_scheduler *sched = &q->guc->sched;
957 
958 		xe_gt_warn(q->gt, "Pending enable/disable failed to respond\n");
959 		xe_sched_submission_start(sched);
960 		xe_gt_reset_async(q->gt);
961 		xe_sched_tdr_queue_imm(sched);
962 		return;
963 	}
964 
965 	clear_exec_queue_enabled(q);
966 	set_exec_queue_pending_disable(q);
967 	set_exec_queue_destroyed(q);
968 	trace_xe_exec_queue_scheduling_disable(q);
969 
970 	/*
971 	 * Reserve space for both G2H here as the 2nd G2H is sent from a G2H
972 	 * handler and we are not allowed to reserved G2H space in handlers.
973 	 */
974 	xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action),
975 		       G2H_LEN_DW_SCHED_CONTEXT_MODE_SET +
976 		       G2H_LEN_DW_DEREGISTER_CONTEXT, 2);
977 }
978 
979 static void xe_guc_exec_queue_trigger_cleanup(struct xe_exec_queue *q)
980 {
981 	struct xe_guc *guc = exec_queue_to_guc(q);
982 	struct xe_device *xe = guc_to_xe(guc);
983 
984 	/** to wakeup xe_wait_user_fence ioctl if exec queue is reset */
985 	wake_up_all(&xe->ufence_wq);
986 
987 	if (xe_exec_queue_is_lr(q))
988 		queue_work(guc_to_gt(guc)->ordered_wq, &q->guc->lr_tdr);
989 	else
990 		xe_sched_tdr_queue_imm(&q->guc->sched);
991 }
992 
993 /**
994  * xe_guc_submit_wedge() - Wedge GuC submission
995  * @guc: the GuC object
996  *
997  * Save exec queue's registered with GuC state by taking a ref to each queue.
998  * Register a DRMM handler to drop refs upon driver unload.
999  */
1000 void xe_guc_submit_wedge(struct xe_guc *guc)
1001 {
1002 	struct xe_gt *gt = guc_to_gt(guc);
1003 	struct xe_exec_queue *q;
1004 	unsigned long index;
1005 	int err;
1006 
1007 	xe_gt_assert(guc_to_gt(guc), guc_to_xe(guc)->wedged.mode);
1008 
1009 	/*
1010 	 * If device is being wedged even before submission_state is
1011 	 * initialized, there's nothing to do here.
1012 	 */
1013 	if (!guc->submission_state.initialized)
1014 		return;
1015 
1016 	err = devm_add_action_or_reset(guc_to_xe(guc)->drm.dev,
1017 				       guc_submit_wedged_fini, guc);
1018 	if (err) {
1019 		xe_gt_err(gt, "Failed to register clean-up on wedged.mode=2; "
1020 			  "Although device is wedged.\n");
1021 		return;
1022 	}
1023 
1024 	mutex_lock(&guc->submission_state.lock);
1025 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
1026 		if (xe_exec_queue_get_unless_zero(q))
1027 			set_exec_queue_wedged(q);
1028 	mutex_unlock(&guc->submission_state.lock);
1029 }
1030 
1031 static bool guc_submit_hint_wedged(struct xe_guc *guc)
1032 {
1033 	struct xe_device *xe = guc_to_xe(guc);
1034 
1035 	if (xe->wedged.mode != 2)
1036 		return false;
1037 
1038 	if (xe_device_wedged(xe))
1039 		return true;
1040 
1041 	xe_device_declare_wedged(xe);
1042 
1043 	return true;
1044 }
1045 
1046 static void xe_guc_exec_queue_lr_cleanup(struct work_struct *w)
1047 {
1048 	struct xe_guc_exec_queue *ge =
1049 		container_of(w, struct xe_guc_exec_queue, lr_tdr);
1050 	struct xe_exec_queue *q = ge->q;
1051 	struct xe_guc *guc = exec_queue_to_guc(q);
1052 	struct xe_gpu_scheduler *sched = &ge->sched;
1053 	bool wedged = false;
1054 
1055 	xe_gt_assert(guc_to_gt(guc), xe_exec_queue_is_lr(q));
1056 	trace_xe_exec_queue_lr_cleanup(q);
1057 
1058 	if (!exec_queue_killed(q))
1059 		wedged = guc_submit_hint_wedged(exec_queue_to_guc(q));
1060 
1061 	/* Kill the run_job / process_msg entry points */
1062 	xe_sched_submission_stop(sched);
1063 
1064 	/*
1065 	 * Engine state now mostly stable, disable scheduling / deregister if
1066 	 * needed. This cleanup routine might be called multiple times, where
1067 	 * the actual async engine deregister drops the final engine ref.
1068 	 * Calling disable_scheduling_deregister will mark the engine as
1069 	 * destroyed and fire off the CT requests to disable scheduling /
1070 	 * deregister, which we only want to do once. We also don't want to mark
1071 	 * the engine as pending_disable again as this may race with the
1072 	 * xe_guc_deregister_done_handler() which treats it as an unexpected
1073 	 * state.
1074 	 */
1075 	if (!wedged && exec_queue_registered(q) && !exec_queue_destroyed(q)) {
1076 		struct xe_guc *guc = exec_queue_to_guc(q);
1077 		int ret;
1078 
1079 		set_exec_queue_banned(q);
1080 		disable_scheduling_deregister(guc, q);
1081 
1082 		/*
1083 		 * Must wait for scheduling to be disabled before signalling
1084 		 * any fences, if GT broken the GT reset code should signal us.
1085 		 */
1086 		ret = wait_event_timeout(guc->ct.wq,
1087 					 !exec_queue_pending_disable(q) ||
1088 					 xe_guc_read_stopped(guc), HZ * 5);
1089 		if (!ret) {
1090 			xe_gt_warn(q->gt, "Schedule disable failed to respond, guc_id=%d\n",
1091 				   q->guc->id);
1092 			xe_devcoredump(q, NULL, "Schedule disable failed to respond, guc_id=%d\n",
1093 				       q->guc->id);
1094 			xe_sched_submission_start(sched);
1095 			xe_gt_reset_async(q->gt);
1096 			return;
1097 		}
1098 	}
1099 
1100 	if (!exec_queue_killed(q) && !xe_lrc_ring_is_idle(q->lrc[0]))
1101 		xe_devcoredump(q, NULL, "LR job cleanup, guc_id=%d", q->guc->id);
1102 
1103 	xe_sched_submission_start(sched);
1104 }
1105 
1106 #define ADJUST_FIVE_PERCENT(__t)	mul_u64_u32_div(__t, 105, 100)
1107 
1108 static bool check_timeout(struct xe_exec_queue *q, struct xe_sched_job *job)
1109 {
1110 	struct xe_gt *gt = guc_to_gt(exec_queue_to_guc(q));
1111 	u32 ctx_timestamp, ctx_job_timestamp;
1112 	u32 timeout_ms = q->sched_props.job_timeout_ms;
1113 	u32 diff;
1114 	u64 running_time_ms;
1115 
1116 	if (!xe_sched_job_started(job)) {
1117 		xe_gt_warn(gt, "Check job timeout: seqno=%u, lrc_seqno=%u, guc_id=%d, not started",
1118 			   xe_sched_job_seqno(job), xe_sched_job_lrc_seqno(job),
1119 			   q->guc->id);
1120 
1121 		return xe_sched_invalidate_job(job, 2);
1122 	}
1123 
1124 	ctx_timestamp = lower_32_bits(xe_lrc_ctx_timestamp(q->lrc[0]));
1125 	ctx_job_timestamp = xe_lrc_ctx_job_timestamp(q->lrc[0]);
1126 
1127 	/*
1128 	 * Counter wraps at ~223s at the usual 19.2MHz, be paranoid catch
1129 	 * possible overflows with a high timeout.
1130 	 */
1131 	xe_gt_assert(gt, timeout_ms < 100 * MSEC_PER_SEC);
1132 
1133 	diff = ctx_timestamp - ctx_job_timestamp;
1134 
1135 	/*
1136 	 * Ensure timeout is within 5% to account for an GuC scheduling latency
1137 	 */
1138 	running_time_ms =
1139 		ADJUST_FIVE_PERCENT(xe_gt_clock_interval_to_ms(gt, diff));
1140 
1141 	xe_gt_dbg(gt,
1142 		  "Check job timeout: seqno=%u, lrc_seqno=%u, guc_id=%d, running_time_ms=%llu, timeout_ms=%u, diff=0x%08x",
1143 		  xe_sched_job_seqno(job), xe_sched_job_lrc_seqno(job),
1144 		  q->guc->id, running_time_ms, timeout_ms, diff);
1145 
1146 	return running_time_ms >= timeout_ms;
1147 }
1148 
1149 static void enable_scheduling(struct xe_exec_queue *q)
1150 {
1151 	MAKE_SCHED_CONTEXT_ACTION(q, ENABLE);
1152 	struct xe_guc *guc = exec_queue_to_guc(q);
1153 	int ret;
1154 
1155 	xe_gt_assert(guc_to_gt(guc), !exec_queue_destroyed(q));
1156 	xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q));
1157 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_disable(q));
1158 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_enable(q));
1159 
1160 	set_exec_queue_pending_enable(q);
1161 	set_exec_queue_enabled(q);
1162 	trace_xe_exec_queue_scheduling_enable(q);
1163 
1164 	xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action),
1165 		       G2H_LEN_DW_SCHED_CONTEXT_MODE_SET, 1);
1166 
1167 	ret = wait_event_timeout(guc->ct.wq,
1168 				 !exec_queue_pending_enable(q) ||
1169 				 xe_guc_read_stopped(guc), HZ * 5);
1170 	if (!ret || xe_guc_read_stopped(guc)) {
1171 		xe_gt_warn(guc_to_gt(guc), "Schedule enable failed to respond");
1172 		set_exec_queue_banned(q);
1173 		xe_gt_reset_async(q->gt);
1174 		xe_sched_tdr_queue_imm(&q->guc->sched);
1175 	}
1176 }
1177 
1178 static void disable_scheduling(struct xe_exec_queue *q, bool immediate)
1179 {
1180 	MAKE_SCHED_CONTEXT_ACTION(q, DISABLE);
1181 	struct xe_guc *guc = exec_queue_to_guc(q);
1182 
1183 	xe_gt_assert(guc_to_gt(guc), !exec_queue_destroyed(q));
1184 	xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q));
1185 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_disable(q));
1186 
1187 	if (immediate)
1188 		set_min_preemption_timeout(guc, q);
1189 	clear_exec_queue_enabled(q);
1190 	set_exec_queue_pending_disable(q);
1191 	trace_xe_exec_queue_scheduling_disable(q);
1192 
1193 	xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action),
1194 		       G2H_LEN_DW_SCHED_CONTEXT_MODE_SET, 1);
1195 }
1196 
1197 static void __deregister_exec_queue(struct xe_guc *guc, struct xe_exec_queue *q)
1198 {
1199 	u32 action[] = {
1200 		XE_GUC_ACTION_DEREGISTER_CONTEXT,
1201 		q->guc->id,
1202 	};
1203 
1204 	xe_gt_assert(guc_to_gt(guc), !exec_queue_destroyed(q));
1205 	xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q));
1206 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_enable(q));
1207 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_disable(q));
1208 
1209 	set_exec_queue_destroyed(q);
1210 	trace_xe_exec_queue_deregister(q);
1211 
1212 	xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action),
1213 		       G2H_LEN_DW_DEREGISTER_CONTEXT, 1);
1214 }
1215 
1216 static enum drm_gpu_sched_stat
1217 guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
1218 {
1219 	struct xe_sched_job *job = to_xe_sched_job(drm_job);
1220 	struct xe_sched_job *tmp_job;
1221 	struct xe_exec_queue *q = job->q;
1222 	struct xe_gpu_scheduler *sched = &q->guc->sched;
1223 	struct xe_guc *guc = exec_queue_to_guc(q);
1224 	const char *process_name = "no process";
1225 	struct xe_device *xe = guc_to_xe(guc);
1226 	unsigned int fw_ref;
1227 	int err = -ETIME;
1228 	pid_t pid = -1;
1229 	int i = 0;
1230 	bool wedged = false, skip_timeout_check;
1231 
1232 	/*
1233 	 * TDR has fired before free job worker. Common if exec queue
1234 	 * immediately closed after last fence signaled. Add back to pending
1235 	 * list so job can be freed and kick scheduler ensuring free job is not
1236 	 * lost.
1237 	 */
1238 	if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &job->fence->flags))
1239 		return DRM_GPU_SCHED_STAT_NO_HANG;
1240 
1241 	/* Kill the run_job entry point */
1242 	xe_sched_submission_stop(sched);
1243 
1244 	/* Must check all state after stopping scheduler */
1245 	skip_timeout_check = exec_queue_reset(q) ||
1246 		exec_queue_killed_or_banned_or_wedged(q) ||
1247 		exec_queue_destroyed(q);
1248 
1249 	/*
1250 	 * If devcoredump not captured and GuC capture for the job is not ready
1251 	 * do manual capture first and decide later if we need to use it
1252 	 */
1253 	if (!exec_queue_killed(q) && !xe->devcoredump.captured &&
1254 	    !xe_guc_capture_get_matching_and_lock(q)) {
1255 		/* take force wake before engine register manual capture */
1256 		fw_ref = xe_force_wake_get(gt_to_fw(q->gt), XE_FORCEWAKE_ALL);
1257 		if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL))
1258 			xe_gt_info(q->gt, "failed to get forcewake for coredump capture\n");
1259 
1260 		xe_engine_snapshot_capture_for_queue(q);
1261 
1262 		xe_force_wake_put(gt_to_fw(q->gt), fw_ref);
1263 	}
1264 
1265 	/*
1266 	 * XXX: Sampling timeout doesn't work in wedged mode as we have to
1267 	 * modify scheduling state to read timestamp. We could read the
1268 	 * timestamp from a register to accumulate current running time but this
1269 	 * doesn't work for SRIOV. For now assuming timeouts in wedged mode are
1270 	 * genuine timeouts.
1271 	 */
1272 	if (!exec_queue_killed(q))
1273 		wedged = guc_submit_hint_wedged(exec_queue_to_guc(q));
1274 
1275 	/* Engine state now stable, disable scheduling to check timestamp */
1276 	if (!wedged && exec_queue_registered(q)) {
1277 		int ret;
1278 
1279 		if (exec_queue_reset(q))
1280 			err = -EIO;
1281 
1282 		if (!exec_queue_destroyed(q)) {
1283 			/*
1284 			 * Wait for any pending G2H to flush out before
1285 			 * modifying state
1286 			 */
1287 			ret = wait_event_timeout(guc->ct.wq,
1288 						 (!exec_queue_pending_enable(q) &&
1289 						  !exec_queue_pending_disable(q)) ||
1290 						 xe_guc_read_stopped(guc), HZ * 5);
1291 			if (!ret || xe_guc_read_stopped(guc))
1292 				goto trigger_reset;
1293 
1294 			/*
1295 			 * Flag communicates to G2H handler that schedule
1296 			 * disable originated from a timeout check. The G2H then
1297 			 * avoid triggering cleanup or deregistering the exec
1298 			 * queue.
1299 			 */
1300 			set_exec_queue_check_timeout(q);
1301 			disable_scheduling(q, skip_timeout_check);
1302 		}
1303 
1304 		/*
1305 		 * Must wait for scheduling to be disabled before signalling
1306 		 * any fences, if GT broken the GT reset code should signal us.
1307 		 *
1308 		 * FIXME: Tests can generate a ton of 0x6000 (IOMMU CAT fault
1309 		 * error) messages which can cause the schedule disable to get
1310 		 * lost. If this occurs, trigger a GT reset to recover.
1311 		 */
1312 		smp_rmb();
1313 		ret = wait_event_timeout(guc->ct.wq,
1314 					 !exec_queue_pending_disable(q) ||
1315 					 xe_guc_read_stopped(guc), HZ * 5);
1316 		if (!ret || xe_guc_read_stopped(guc)) {
1317 trigger_reset:
1318 			if (!ret)
1319 				xe_gt_warn(guc_to_gt(guc),
1320 					   "Schedule disable failed to respond, guc_id=%d",
1321 					   q->guc->id);
1322 			xe_devcoredump(q, job,
1323 				       "Schedule disable failed to respond, guc_id=%d, ret=%d, guc_read=%d",
1324 				       q->guc->id, ret, xe_guc_read_stopped(guc));
1325 			set_exec_queue_extra_ref(q);
1326 			xe_exec_queue_get(q);	/* GT reset owns this */
1327 			set_exec_queue_banned(q);
1328 			xe_gt_reset_async(q->gt);
1329 			xe_sched_tdr_queue_imm(sched);
1330 			goto rearm;
1331 		}
1332 	}
1333 
1334 	/*
1335 	 * Check if job is actually timed out, if so restart job execution and TDR
1336 	 */
1337 	if (!wedged && !skip_timeout_check && !check_timeout(q, job) &&
1338 	    !exec_queue_reset(q) && exec_queue_registered(q)) {
1339 		clear_exec_queue_check_timeout(q);
1340 		goto sched_enable;
1341 	}
1342 
1343 	if (q->vm && q->vm->xef) {
1344 		process_name = q->vm->xef->process_name;
1345 		pid = q->vm->xef->pid;
1346 	}
1347 
1348 	if (!exec_queue_killed(q))
1349 		xe_gt_notice(guc_to_gt(guc),
1350 			     "Timedout job: seqno=%u, lrc_seqno=%u, guc_id=%d, flags=0x%lx in %s [%d]",
1351 			     xe_sched_job_seqno(job), xe_sched_job_lrc_seqno(job),
1352 			     q->guc->id, q->flags, process_name, pid);
1353 
1354 	trace_xe_sched_job_timedout(job);
1355 
1356 	if (!exec_queue_killed(q))
1357 		xe_devcoredump(q, job,
1358 			       "Timedout job - seqno=%u, lrc_seqno=%u, guc_id=%d, flags=0x%lx",
1359 			       xe_sched_job_seqno(job), xe_sched_job_lrc_seqno(job),
1360 			       q->guc->id, q->flags);
1361 
1362 	/*
1363 	 * Kernel jobs should never fail, nor should VM jobs if they do
1364 	 * somethings has gone wrong and the GT needs a reset
1365 	 */
1366 	xe_gt_WARN(q->gt, q->flags & EXEC_QUEUE_FLAG_KERNEL,
1367 		   "Kernel-submitted job timed out\n");
1368 	xe_gt_WARN(q->gt, q->flags & EXEC_QUEUE_FLAG_VM && !exec_queue_killed(q),
1369 		   "VM job timed out on non-killed execqueue\n");
1370 	if (!wedged && (q->flags & EXEC_QUEUE_FLAG_KERNEL ||
1371 			(q->flags & EXEC_QUEUE_FLAG_VM && !exec_queue_killed(q)))) {
1372 		if (!xe_sched_invalidate_job(job, 2)) {
1373 			clear_exec_queue_check_timeout(q);
1374 			xe_gt_reset_async(q->gt);
1375 			goto rearm;
1376 		}
1377 	}
1378 
1379 	/* Finish cleaning up exec queue via deregister */
1380 	set_exec_queue_banned(q);
1381 	if (!wedged && exec_queue_registered(q) && !exec_queue_destroyed(q)) {
1382 		set_exec_queue_extra_ref(q);
1383 		xe_exec_queue_get(q);
1384 		__deregister_exec_queue(guc, q);
1385 	}
1386 
1387 	/* Stop fence signaling */
1388 	xe_hw_fence_irq_stop(q->fence_irq);
1389 
1390 	/*
1391 	 * Fence state now stable, stop / start scheduler which cleans up any
1392 	 * fences that are complete
1393 	 */
1394 	xe_sched_add_pending_job(sched, job);
1395 	xe_sched_submission_start(sched);
1396 
1397 	xe_guc_exec_queue_trigger_cleanup(q);
1398 
1399 	/* Mark all outstanding jobs as bad, thus completing them */
1400 	spin_lock(&sched->base.job_list_lock);
1401 	list_for_each_entry(tmp_job, &sched->base.pending_list, drm.list)
1402 		xe_sched_job_set_error(tmp_job, !i++ ? err : -ECANCELED);
1403 	spin_unlock(&sched->base.job_list_lock);
1404 
1405 	/* Start fence signaling */
1406 	xe_hw_fence_irq_start(q->fence_irq);
1407 
1408 	return DRM_GPU_SCHED_STAT_RESET;
1409 
1410 sched_enable:
1411 	enable_scheduling(q);
1412 rearm:
1413 	/*
1414 	 * XXX: Ideally want to adjust timeout based on current execution time
1415 	 * but there is not currently an easy way to do in DRM scheduler. With
1416 	 * some thought, do this in a follow up.
1417 	 */
1418 	xe_sched_submission_start(sched);
1419 	return DRM_GPU_SCHED_STAT_NO_HANG;
1420 }
1421 
1422 static void __guc_exec_queue_fini_async(struct work_struct *w)
1423 {
1424 	struct xe_guc_exec_queue *ge =
1425 		container_of(w, struct xe_guc_exec_queue, fini_async);
1426 	struct xe_exec_queue *q = ge->q;
1427 	struct xe_guc *guc = exec_queue_to_guc(q);
1428 
1429 	xe_pm_runtime_get(guc_to_xe(guc));
1430 	trace_xe_exec_queue_destroy(q);
1431 
1432 	release_guc_id(guc, q);
1433 	if (xe_exec_queue_is_lr(q))
1434 		cancel_work_sync(&ge->lr_tdr);
1435 	/* Confirm no work left behind accessing device structures */
1436 	cancel_delayed_work_sync(&ge->sched.base.work_tdr);
1437 	xe_sched_entity_fini(&ge->entity);
1438 	xe_sched_fini(&ge->sched);
1439 
1440 	/*
1441 	 * RCU free due sched being exported via DRM scheduler fences
1442 	 * (timeline name).
1443 	 */
1444 	kfree_rcu(ge, rcu);
1445 	xe_exec_queue_fini(q);
1446 	xe_pm_runtime_put(guc_to_xe(guc));
1447 }
1448 
1449 static void guc_exec_queue_fini_async(struct xe_exec_queue *q)
1450 {
1451 	struct xe_guc *guc = exec_queue_to_guc(q);
1452 	struct xe_device *xe = guc_to_xe(guc);
1453 
1454 	INIT_WORK(&q->guc->fini_async, __guc_exec_queue_fini_async);
1455 
1456 	/* We must block on kernel engines so slabs are empty on driver unload */
1457 	if (q->flags & EXEC_QUEUE_FLAG_PERMANENT || exec_queue_wedged(q))
1458 		__guc_exec_queue_fini_async(&q->guc->fini_async);
1459 	else
1460 		queue_work(xe->destroy_wq, &q->guc->fini_async);
1461 }
1462 
1463 static void __guc_exec_queue_fini(struct xe_guc *guc, struct xe_exec_queue *q)
1464 {
1465 	/*
1466 	 * Might be done from within the GPU scheduler, need to do async as we
1467 	 * fini the scheduler when the engine is fini'd, the scheduler can't
1468 	 * complete fini within itself (circular dependency). Async resolves
1469 	 * this we and don't really care when everything is fini'd, just that it
1470 	 * is.
1471 	 */
1472 	guc_exec_queue_fini_async(q);
1473 }
1474 
1475 static void __guc_exec_queue_process_msg_cleanup(struct xe_sched_msg *msg)
1476 {
1477 	struct xe_exec_queue *q = msg->private_data;
1478 	struct xe_guc *guc = exec_queue_to_guc(q);
1479 
1480 	xe_gt_assert(guc_to_gt(guc), !(q->flags & EXEC_QUEUE_FLAG_PERMANENT));
1481 	trace_xe_exec_queue_cleanup_entity(q);
1482 
1483 	if (exec_queue_registered(q))
1484 		disable_scheduling_deregister(guc, q);
1485 	else
1486 		__guc_exec_queue_fini(guc, q);
1487 }
1488 
1489 static bool guc_exec_queue_allowed_to_change_state(struct xe_exec_queue *q)
1490 {
1491 	return !exec_queue_killed_or_banned_or_wedged(q) && exec_queue_registered(q);
1492 }
1493 
1494 static void __guc_exec_queue_process_msg_set_sched_props(struct xe_sched_msg *msg)
1495 {
1496 	struct xe_exec_queue *q = msg->private_data;
1497 	struct xe_guc *guc = exec_queue_to_guc(q);
1498 
1499 	if (guc_exec_queue_allowed_to_change_state(q))
1500 		init_policies(guc, q);
1501 	kfree(msg);
1502 }
1503 
1504 static void __suspend_fence_signal(struct xe_exec_queue *q)
1505 {
1506 	if (!q->guc->suspend_pending)
1507 		return;
1508 
1509 	WRITE_ONCE(q->guc->suspend_pending, false);
1510 	wake_up(&q->guc->suspend_wait);
1511 }
1512 
1513 static void suspend_fence_signal(struct xe_exec_queue *q)
1514 {
1515 	struct xe_guc *guc = exec_queue_to_guc(q);
1516 
1517 	xe_gt_assert(guc_to_gt(guc), exec_queue_suspended(q) || exec_queue_killed(q) ||
1518 		     xe_guc_read_stopped(guc));
1519 	xe_gt_assert(guc_to_gt(guc), q->guc->suspend_pending);
1520 
1521 	__suspend_fence_signal(q);
1522 }
1523 
1524 static void __guc_exec_queue_process_msg_suspend(struct xe_sched_msg *msg)
1525 {
1526 	struct xe_exec_queue *q = msg->private_data;
1527 	struct xe_guc *guc = exec_queue_to_guc(q);
1528 
1529 	if (guc_exec_queue_allowed_to_change_state(q) && !exec_queue_suspended(q) &&
1530 	    exec_queue_enabled(q)) {
1531 		wait_event(guc->ct.wq, (q->guc->resume_time != RESUME_PENDING ||
1532 			   xe_guc_read_stopped(guc)) && !exec_queue_pending_disable(q));
1533 
1534 		if (!xe_guc_read_stopped(guc)) {
1535 			s64 since_resume_ms =
1536 				ktime_ms_delta(ktime_get(),
1537 					       q->guc->resume_time);
1538 			s64 wait_ms = q->vm->preempt.min_run_period_ms -
1539 				since_resume_ms;
1540 
1541 			if (wait_ms > 0 && q->guc->resume_time)
1542 				msleep(wait_ms);
1543 
1544 			set_exec_queue_suspended(q);
1545 			disable_scheduling(q, false);
1546 		}
1547 	} else if (q->guc->suspend_pending) {
1548 		set_exec_queue_suspended(q);
1549 		suspend_fence_signal(q);
1550 	}
1551 }
1552 
1553 static void __guc_exec_queue_process_msg_resume(struct xe_sched_msg *msg)
1554 {
1555 	struct xe_exec_queue *q = msg->private_data;
1556 
1557 	if (guc_exec_queue_allowed_to_change_state(q)) {
1558 		clear_exec_queue_suspended(q);
1559 		if (!exec_queue_enabled(q)) {
1560 			q->guc->resume_time = RESUME_PENDING;
1561 			enable_scheduling(q);
1562 		}
1563 	} else {
1564 		clear_exec_queue_suspended(q);
1565 	}
1566 }
1567 
1568 #define CLEANUP		1	/* Non-zero values to catch uninitialized msg */
1569 #define SET_SCHED_PROPS	2
1570 #define SUSPEND		3
1571 #define RESUME		4
1572 #define OPCODE_MASK	0xf
1573 #define MSG_LOCKED	BIT(8)
1574 
1575 static void guc_exec_queue_process_msg(struct xe_sched_msg *msg)
1576 {
1577 	struct xe_device *xe = guc_to_xe(exec_queue_to_guc(msg->private_data));
1578 
1579 	trace_xe_sched_msg_recv(msg);
1580 
1581 	switch (msg->opcode) {
1582 	case CLEANUP:
1583 		__guc_exec_queue_process_msg_cleanup(msg);
1584 		break;
1585 	case SET_SCHED_PROPS:
1586 		__guc_exec_queue_process_msg_set_sched_props(msg);
1587 		break;
1588 	case SUSPEND:
1589 		__guc_exec_queue_process_msg_suspend(msg);
1590 		break;
1591 	case RESUME:
1592 		__guc_exec_queue_process_msg_resume(msg);
1593 		break;
1594 	default:
1595 		XE_WARN_ON("Unknown message type");
1596 	}
1597 
1598 	xe_pm_runtime_put(xe);
1599 }
1600 
1601 static const struct drm_sched_backend_ops drm_sched_ops = {
1602 	.run_job = guc_exec_queue_run_job,
1603 	.free_job = guc_exec_queue_free_job,
1604 	.timedout_job = guc_exec_queue_timedout_job,
1605 };
1606 
1607 static const struct xe_sched_backend_ops xe_sched_ops = {
1608 	.process_msg = guc_exec_queue_process_msg,
1609 };
1610 
1611 static int guc_exec_queue_init(struct xe_exec_queue *q)
1612 {
1613 	struct xe_gpu_scheduler *sched;
1614 	struct xe_guc *guc = exec_queue_to_guc(q);
1615 	struct xe_guc_exec_queue *ge;
1616 	long timeout;
1617 	int err, i;
1618 
1619 	xe_gt_assert(guc_to_gt(guc), xe_device_uc_enabled(guc_to_xe(guc)));
1620 
1621 	ge = kzalloc(sizeof(*ge), GFP_KERNEL);
1622 	if (!ge)
1623 		return -ENOMEM;
1624 
1625 	q->guc = ge;
1626 	ge->q = q;
1627 	init_rcu_head(&ge->rcu);
1628 	init_waitqueue_head(&ge->suspend_wait);
1629 
1630 	for (i = 0; i < MAX_STATIC_MSG_TYPE; ++i)
1631 		INIT_LIST_HEAD(&ge->static_msgs[i].link);
1632 
1633 	timeout = (q->vm && xe_vm_in_lr_mode(q->vm)) ? MAX_SCHEDULE_TIMEOUT :
1634 		  msecs_to_jiffies(q->sched_props.job_timeout_ms);
1635 	err = xe_sched_init(&ge->sched, &drm_sched_ops, &xe_sched_ops,
1636 			    NULL, q->lrc[0]->ring.size / MAX_JOB_SIZE_BYTES, 64,
1637 			    timeout, guc_to_gt(guc)->ordered_wq, NULL,
1638 			    q->name, gt_to_xe(q->gt)->drm.dev);
1639 	if (err)
1640 		goto err_free;
1641 
1642 	sched = &ge->sched;
1643 	err = xe_sched_entity_init(&ge->entity, sched);
1644 	if (err)
1645 		goto err_sched;
1646 
1647 	if (xe_exec_queue_is_lr(q))
1648 		INIT_WORK(&q->guc->lr_tdr, xe_guc_exec_queue_lr_cleanup);
1649 
1650 	mutex_lock(&guc->submission_state.lock);
1651 
1652 	err = alloc_guc_id(guc, q);
1653 	if (err)
1654 		goto err_entity;
1655 
1656 	q->entity = &ge->entity;
1657 
1658 	if (xe_guc_read_stopped(guc))
1659 		xe_sched_stop(sched);
1660 
1661 	mutex_unlock(&guc->submission_state.lock);
1662 
1663 	xe_exec_queue_assign_name(q, q->guc->id);
1664 
1665 	trace_xe_exec_queue_create(q);
1666 
1667 	return 0;
1668 
1669 err_entity:
1670 	mutex_unlock(&guc->submission_state.lock);
1671 	xe_sched_entity_fini(&ge->entity);
1672 err_sched:
1673 	xe_sched_fini(&ge->sched);
1674 err_free:
1675 	kfree(ge);
1676 
1677 	return err;
1678 }
1679 
1680 static void guc_exec_queue_kill(struct xe_exec_queue *q)
1681 {
1682 	trace_xe_exec_queue_kill(q);
1683 	set_exec_queue_killed(q);
1684 	__suspend_fence_signal(q);
1685 	xe_guc_exec_queue_trigger_cleanup(q);
1686 }
1687 
1688 static void guc_exec_queue_add_msg(struct xe_exec_queue *q, struct xe_sched_msg *msg,
1689 				   u32 opcode)
1690 {
1691 	xe_pm_runtime_get_noresume(guc_to_xe(exec_queue_to_guc(q)));
1692 
1693 	INIT_LIST_HEAD(&msg->link);
1694 	msg->opcode = opcode & OPCODE_MASK;
1695 	msg->private_data = q;
1696 
1697 	trace_xe_sched_msg_add(msg);
1698 	if (opcode & MSG_LOCKED)
1699 		xe_sched_add_msg_locked(&q->guc->sched, msg);
1700 	else
1701 		xe_sched_add_msg(&q->guc->sched, msg);
1702 }
1703 
1704 static bool guc_exec_queue_try_add_msg(struct xe_exec_queue *q,
1705 				       struct xe_sched_msg *msg,
1706 				       u32 opcode)
1707 {
1708 	if (!list_empty(&msg->link))
1709 		return false;
1710 
1711 	guc_exec_queue_add_msg(q, msg, opcode | MSG_LOCKED);
1712 
1713 	return true;
1714 }
1715 
1716 #define STATIC_MSG_CLEANUP	0
1717 #define STATIC_MSG_SUSPEND	1
1718 #define STATIC_MSG_RESUME	2
1719 static void guc_exec_queue_fini(struct xe_exec_queue *q)
1720 {
1721 	struct xe_sched_msg *msg = q->guc->static_msgs + STATIC_MSG_CLEANUP;
1722 
1723 	if (!(q->flags & EXEC_QUEUE_FLAG_PERMANENT) && !exec_queue_wedged(q))
1724 		guc_exec_queue_add_msg(q, msg, CLEANUP);
1725 	else
1726 		__guc_exec_queue_fini(exec_queue_to_guc(q), q);
1727 }
1728 
1729 static int guc_exec_queue_set_priority(struct xe_exec_queue *q,
1730 				       enum xe_exec_queue_priority priority)
1731 {
1732 	struct xe_sched_msg *msg;
1733 
1734 	if (q->sched_props.priority == priority ||
1735 	    exec_queue_killed_or_banned_or_wedged(q))
1736 		return 0;
1737 
1738 	msg = kmalloc(sizeof(*msg), GFP_KERNEL);
1739 	if (!msg)
1740 		return -ENOMEM;
1741 
1742 	q->sched_props.priority = priority;
1743 	guc_exec_queue_add_msg(q, msg, SET_SCHED_PROPS);
1744 
1745 	return 0;
1746 }
1747 
1748 static int guc_exec_queue_set_timeslice(struct xe_exec_queue *q, u32 timeslice_us)
1749 {
1750 	struct xe_sched_msg *msg;
1751 
1752 	if (q->sched_props.timeslice_us == timeslice_us ||
1753 	    exec_queue_killed_or_banned_or_wedged(q))
1754 		return 0;
1755 
1756 	msg = kmalloc(sizeof(*msg), GFP_KERNEL);
1757 	if (!msg)
1758 		return -ENOMEM;
1759 
1760 	q->sched_props.timeslice_us = timeslice_us;
1761 	guc_exec_queue_add_msg(q, msg, SET_SCHED_PROPS);
1762 
1763 	return 0;
1764 }
1765 
1766 static int guc_exec_queue_set_preempt_timeout(struct xe_exec_queue *q,
1767 					      u32 preempt_timeout_us)
1768 {
1769 	struct xe_sched_msg *msg;
1770 
1771 	if (q->sched_props.preempt_timeout_us == preempt_timeout_us ||
1772 	    exec_queue_killed_or_banned_or_wedged(q))
1773 		return 0;
1774 
1775 	msg = kmalloc(sizeof(*msg), GFP_KERNEL);
1776 	if (!msg)
1777 		return -ENOMEM;
1778 
1779 	q->sched_props.preempt_timeout_us = preempt_timeout_us;
1780 	guc_exec_queue_add_msg(q, msg, SET_SCHED_PROPS);
1781 
1782 	return 0;
1783 }
1784 
1785 static int guc_exec_queue_suspend(struct xe_exec_queue *q)
1786 {
1787 	struct xe_gpu_scheduler *sched = &q->guc->sched;
1788 	struct xe_sched_msg *msg = q->guc->static_msgs + STATIC_MSG_SUSPEND;
1789 
1790 	if (exec_queue_killed_or_banned_or_wedged(q))
1791 		return -EINVAL;
1792 
1793 	xe_sched_msg_lock(sched);
1794 	if (guc_exec_queue_try_add_msg(q, msg, SUSPEND))
1795 		q->guc->suspend_pending = true;
1796 	xe_sched_msg_unlock(sched);
1797 
1798 	return 0;
1799 }
1800 
1801 static int guc_exec_queue_suspend_wait(struct xe_exec_queue *q)
1802 {
1803 	struct xe_guc *guc = exec_queue_to_guc(q);
1804 	int ret;
1805 
1806 	/*
1807 	 * Likely don't need to check exec_queue_killed() as we clear
1808 	 * suspend_pending upon kill but to be paranoid but races in which
1809 	 * suspend_pending is set after kill also check kill here.
1810 	 */
1811 	ret = wait_event_interruptible_timeout(q->guc->suspend_wait,
1812 					       !READ_ONCE(q->guc->suspend_pending) ||
1813 					       exec_queue_killed(q) ||
1814 					       xe_guc_read_stopped(guc),
1815 					       HZ * 5);
1816 
1817 	if (!ret) {
1818 		xe_gt_warn(guc_to_gt(guc),
1819 			   "Suspend fence, guc_id=%d, failed to respond",
1820 			   q->guc->id);
1821 		/* XXX: Trigger GT reset? */
1822 		return -ETIME;
1823 	}
1824 
1825 	return ret < 0 ? ret : 0;
1826 }
1827 
1828 static void guc_exec_queue_resume(struct xe_exec_queue *q)
1829 {
1830 	struct xe_gpu_scheduler *sched = &q->guc->sched;
1831 	struct xe_sched_msg *msg = q->guc->static_msgs + STATIC_MSG_RESUME;
1832 	struct xe_guc *guc = exec_queue_to_guc(q);
1833 
1834 	xe_gt_assert(guc_to_gt(guc), !q->guc->suspend_pending);
1835 
1836 	xe_sched_msg_lock(sched);
1837 	guc_exec_queue_try_add_msg(q, msg, RESUME);
1838 	xe_sched_msg_unlock(sched);
1839 }
1840 
1841 static bool guc_exec_queue_reset_status(struct xe_exec_queue *q)
1842 {
1843 	return exec_queue_reset(q) || exec_queue_killed_or_banned_or_wedged(q);
1844 }
1845 
1846 /*
1847  * All of these functions are an abstraction layer which other parts of XE can
1848  * use to trap into the GuC backend. All of these functions, aside from init,
1849  * really shouldn't do much other than trap into the DRM scheduler which
1850  * synchronizes these operations.
1851  */
1852 static const struct xe_exec_queue_ops guc_exec_queue_ops = {
1853 	.init = guc_exec_queue_init,
1854 	.kill = guc_exec_queue_kill,
1855 	.fini = guc_exec_queue_fini,
1856 	.set_priority = guc_exec_queue_set_priority,
1857 	.set_timeslice = guc_exec_queue_set_timeslice,
1858 	.set_preempt_timeout = guc_exec_queue_set_preempt_timeout,
1859 	.suspend = guc_exec_queue_suspend,
1860 	.suspend_wait = guc_exec_queue_suspend_wait,
1861 	.resume = guc_exec_queue_resume,
1862 	.reset_status = guc_exec_queue_reset_status,
1863 };
1864 
1865 static void guc_exec_queue_stop(struct xe_guc *guc, struct xe_exec_queue *q)
1866 {
1867 	struct xe_gpu_scheduler *sched = &q->guc->sched;
1868 
1869 	/* Stop scheduling + flush any DRM scheduler operations */
1870 	xe_sched_submission_stop(sched);
1871 
1872 	/* Clean up lost G2H + reset engine state */
1873 	if (exec_queue_registered(q)) {
1874 		if (exec_queue_extra_ref(q) || xe_exec_queue_is_lr(q))
1875 			xe_exec_queue_put(q);
1876 		else if (exec_queue_destroyed(q))
1877 			__guc_exec_queue_fini(guc, q);
1878 	}
1879 	if (q->guc->suspend_pending) {
1880 		set_exec_queue_suspended(q);
1881 		suspend_fence_signal(q);
1882 	}
1883 	atomic_and(EXEC_QUEUE_STATE_WEDGED | EXEC_QUEUE_STATE_BANNED |
1884 		   EXEC_QUEUE_STATE_KILLED | EXEC_QUEUE_STATE_DESTROYED |
1885 		   EXEC_QUEUE_STATE_SUSPENDED,
1886 		   &q->guc->state);
1887 	q->guc->resume_time = 0;
1888 	trace_xe_exec_queue_stop(q);
1889 
1890 	/*
1891 	 * Ban any engine (aside from kernel and engines used for VM ops) with a
1892 	 * started but not complete job or if a job has gone through a GT reset
1893 	 * more than twice.
1894 	 */
1895 	if (!(q->flags & (EXEC_QUEUE_FLAG_KERNEL | EXEC_QUEUE_FLAG_VM))) {
1896 		struct xe_sched_job *job = xe_sched_first_pending_job(sched);
1897 		bool ban = false;
1898 
1899 		if (job) {
1900 			if ((xe_sched_job_started(job) &&
1901 			    !xe_sched_job_completed(job)) ||
1902 			    xe_sched_invalidate_job(job, 2)) {
1903 				trace_xe_sched_job_ban(job);
1904 				ban = true;
1905 			}
1906 		} else if (xe_exec_queue_is_lr(q) &&
1907 			   !xe_lrc_ring_is_idle(q->lrc[0])) {
1908 			ban = true;
1909 		}
1910 
1911 		if (ban) {
1912 			set_exec_queue_banned(q);
1913 			xe_guc_exec_queue_trigger_cleanup(q);
1914 		}
1915 	}
1916 }
1917 
1918 /**
1919  * xe_guc_submit_reset_block - Disallow reset calls on given GuC.
1920  * @guc: the &xe_guc struct instance
1921  */
1922 int xe_guc_submit_reset_block(struct xe_guc *guc)
1923 {
1924 	return atomic_fetch_or(1, &guc->submission_state.reset_blocked);
1925 }
1926 
1927 /**
1928  * xe_guc_submit_reset_unblock - Allow back reset calls on given GuC.
1929  * @guc: the &xe_guc struct instance
1930  */
1931 void xe_guc_submit_reset_unblock(struct xe_guc *guc)
1932 {
1933 	atomic_set_release(&guc->submission_state.reset_blocked, 0);
1934 	wake_up_all(&guc->ct.wq);
1935 }
1936 
1937 static int guc_submit_reset_is_blocked(struct xe_guc *guc)
1938 {
1939 	return atomic_read_acquire(&guc->submission_state.reset_blocked);
1940 }
1941 
1942 /* Maximum time of blocking reset */
1943 #define RESET_BLOCK_PERIOD_MAX (HZ * 5)
1944 
1945 /**
1946  * xe_guc_wait_reset_unblock - Wait until reset blocking flag is lifted, or timeout.
1947  * @guc: the &xe_guc struct instance
1948  */
1949 int xe_guc_wait_reset_unblock(struct xe_guc *guc)
1950 {
1951 	return wait_event_timeout(guc->ct.wq,
1952 				  !guc_submit_reset_is_blocked(guc), RESET_BLOCK_PERIOD_MAX);
1953 }
1954 
1955 int xe_guc_submit_reset_prepare(struct xe_guc *guc)
1956 {
1957 	int ret;
1958 
1959 	if (!guc->submission_state.initialized)
1960 		return 0;
1961 
1962 	/*
1963 	 * Using an atomic here rather than submission_state.lock as this
1964 	 * function can be called while holding the CT lock (engine reset
1965 	 * failure). submission_state.lock needs the CT lock to resubmit jobs.
1966 	 * Atomic is not ideal, but it works to prevent against concurrent reset
1967 	 * and releasing any TDRs waiting on guc->submission_state.stopped.
1968 	 */
1969 	ret = atomic_fetch_or(1, &guc->submission_state.stopped);
1970 	smp_wmb();
1971 	wake_up_all(&guc->ct.wq);
1972 
1973 	return ret;
1974 }
1975 
1976 void xe_guc_submit_reset_wait(struct xe_guc *guc)
1977 {
1978 	wait_event(guc->ct.wq, xe_device_wedged(guc_to_xe(guc)) ||
1979 		   !xe_guc_read_stopped(guc));
1980 }
1981 
1982 void xe_guc_submit_stop(struct xe_guc *guc)
1983 {
1984 	struct xe_exec_queue *q;
1985 	unsigned long index;
1986 
1987 	xe_gt_assert(guc_to_gt(guc), xe_guc_read_stopped(guc) == 1);
1988 
1989 	mutex_lock(&guc->submission_state.lock);
1990 
1991 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
1992 		/* Prevent redundant attempts to stop parallel queues */
1993 		if (q->guc->id != index)
1994 			continue;
1995 
1996 		guc_exec_queue_stop(guc, q);
1997 	}
1998 
1999 	mutex_unlock(&guc->submission_state.lock);
2000 
2001 	/*
2002 	 * No one can enter the backend at this point, aside from new engine
2003 	 * creation which is protected by guc->submission_state.lock.
2004 	 */
2005 
2006 }
2007 
2008 /**
2009  * xe_guc_submit_pause - Stop further runs of submission tasks on given GuC.
2010  * @guc: the &xe_guc struct instance whose scheduler is to be disabled
2011  */
2012 void xe_guc_submit_pause(struct xe_guc *guc)
2013 {
2014 	struct xe_exec_queue *q;
2015 	unsigned long index;
2016 
2017 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
2018 		xe_sched_submission_stop_async(&q->guc->sched);
2019 }
2020 
2021 static void guc_exec_queue_start(struct xe_exec_queue *q)
2022 {
2023 	struct xe_gpu_scheduler *sched = &q->guc->sched;
2024 
2025 	if (!exec_queue_killed_or_banned_or_wedged(q)) {
2026 		int i;
2027 
2028 		trace_xe_exec_queue_resubmit(q);
2029 		for (i = 0; i < q->width; ++i)
2030 			xe_lrc_set_ring_head(q->lrc[i], q->lrc[i]->ring.tail);
2031 		xe_sched_resubmit_jobs(sched);
2032 	}
2033 
2034 	xe_sched_submission_start(sched);
2035 	xe_sched_submission_resume_tdr(sched);
2036 }
2037 
2038 int xe_guc_submit_start(struct xe_guc *guc)
2039 {
2040 	struct xe_exec_queue *q;
2041 	unsigned long index;
2042 
2043 	xe_gt_assert(guc_to_gt(guc), xe_guc_read_stopped(guc) == 1);
2044 
2045 	mutex_lock(&guc->submission_state.lock);
2046 	atomic_dec(&guc->submission_state.stopped);
2047 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
2048 		/* Prevent redundant attempts to start parallel queues */
2049 		if (q->guc->id != index)
2050 			continue;
2051 
2052 		guc_exec_queue_start(q);
2053 	}
2054 	mutex_unlock(&guc->submission_state.lock);
2055 
2056 	wake_up_all(&guc->ct.wq);
2057 
2058 	return 0;
2059 }
2060 
2061 static void guc_exec_queue_unpause(struct xe_exec_queue *q)
2062 {
2063 	struct xe_gpu_scheduler *sched = &q->guc->sched;
2064 
2065 	xe_sched_submission_start(sched);
2066 }
2067 
2068 /**
2069  * xe_guc_submit_unpause - Allow further runs of submission tasks on given GuC.
2070  * @guc: the &xe_guc struct instance whose scheduler is to be enabled
2071  */
2072 void xe_guc_submit_unpause(struct xe_guc *guc)
2073 {
2074 	struct xe_exec_queue *q;
2075 	unsigned long index;
2076 
2077 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
2078 		guc_exec_queue_unpause(q);
2079 
2080 	wake_up_all(&guc->ct.wq);
2081 }
2082 
2083 static struct xe_exec_queue *
2084 g2h_exec_queue_lookup(struct xe_guc *guc, u32 guc_id)
2085 {
2086 	struct xe_gt *gt = guc_to_gt(guc);
2087 	struct xe_exec_queue *q;
2088 
2089 	if (unlikely(guc_id >= GUC_ID_MAX)) {
2090 		xe_gt_err(gt, "Invalid guc_id %u\n", guc_id);
2091 		return NULL;
2092 	}
2093 
2094 	q = xa_load(&guc->submission_state.exec_queue_lookup, guc_id);
2095 	if (unlikely(!q)) {
2096 		xe_gt_err(gt, "No exec queue found for guc_id %u\n", guc_id);
2097 		return NULL;
2098 	}
2099 
2100 	xe_gt_assert(guc_to_gt(guc), guc_id >= q->guc->id);
2101 	xe_gt_assert(guc_to_gt(guc), guc_id < (q->guc->id + q->width));
2102 
2103 	return q;
2104 }
2105 
2106 static void deregister_exec_queue(struct xe_guc *guc, struct xe_exec_queue *q)
2107 {
2108 	u32 action[] = {
2109 		XE_GUC_ACTION_DEREGISTER_CONTEXT,
2110 		q->guc->id,
2111 	};
2112 
2113 	xe_gt_assert(guc_to_gt(guc), exec_queue_destroyed(q));
2114 	xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q));
2115 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_disable(q));
2116 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_enable(q));
2117 
2118 	trace_xe_exec_queue_deregister(q);
2119 
2120 	xe_guc_ct_send_g2h_handler(&guc->ct, action, ARRAY_SIZE(action));
2121 }
2122 
2123 static void handle_sched_done(struct xe_guc *guc, struct xe_exec_queue *q,
2124 			      u32 runnable_state)
2125 {
2126 	trace_xe_exec_queue_scheduling_done(q);
2127 
2128 	if (runnable_state == 1) {
2129 		xe_gt_assert(guc_to_gt(guc), exec_queue_pending_enable(q));
2130 
2131 		q->guc->resume_time = ktime_get();
2132 		clear_exec_queue_pending_enable(q);
2133 		smp_wmb();
2134 		wake_up_all(&guc->ct.wq);
2135 	} else {
2136 		bool check_timeout = exec_queue_check_timeout(q);
2137 
2138 		xe_gt_assert(guc_to_gt(guc), runnable_state == 0);
2139 		xe_gt_assert(guc_to_gt(guc), exec_queue_pending_disable(q));
2140 
2141 		if (q->guc->suspend_pending) {
2142 			suspend_fence_signal(q);
2143 			clear_exec_queue_pending_disable(q);
2144 		} else {
2145 			if (exec_queue_banned(q) || check_timeout) {
2146 				smp_wmb();
2147 				wake_up_all(&guc->ct.wq);
2148 			}
2149 			if (!check_timeout && exec_queue_destroyed(q)) {
2150 				/*
2151 				 * Make sure to clear the pending_disable only
2152 				 * after sampling the destroyed state. We want
2153 				 * to ensure we don't trigger the unregister too
2154 				 * early with something intending to only
2155 				 * disable scheduling. The caller doing the
2156 				 * destroy must wait for an ongoing
2157 				 * pending_disable before marking as destroyed.
2158 				 */
2159 				clear_exec_queue_pending_disable(q);
2160 				deregister_exec_queue(guc, q);
2161 			} else {
2162 				clear_exec_queue_pending_disable(q);
2163 			}
2164 		}
2165 	}
2166 }
2167 
2168 int xe_guc_sched_done_handler(struct xe_guc *guc, u32 *msg, u32 len)
2169 {
2170 	struct xe_exec_queue *q;
2171 	u32 guc_id, runnable_state;
2172 
2173 	if (unlikely(len < 2))
2174 		return -EPROTO;
2175 
2176 	guc_id = msg[0];
2177 	runnable_state = msg[1];
2178 
2179 	q = g2h_exec_queue_lookup(guc, guc_id);
2180 	if (unlikely(!q))
2181 		return -EPROTO;
2182 
2183 	if (unlikely(!exec_queue_pending_enable(q) &&
2184 		     !exec_queue_pending_disable(q))) {
2185 		xe_gt_err(guc_to_gt(guc),
2186 			  "SCHED_DONE: Unexpected engine state 0x%04x, guc_id=%d, runnable_state=%u",
2187 			  atomic_read(&q->guc->state), q->guc->id,
2188 			  runnable_state);
2189 		return -EPROTO;
2190 	}
2191 
2192 	handle_sched_done(guc, q, runnable_state);
2193 
2194 	return 0;
2195 }
2196 
2197 static void handle_deregister_done(struct xe_guc *guc, struct xe_exec_queue *q)
2198 {
2199 	trace_xe_exec_queue_deregister_done(q);
2200 
2201 	clear_exec_queue_registered(q);
2202 
2203 	if (exec_queue_extra_ref(q) || xe_exec_queue_is_lr(q))
2204 		xe_exec_queue_put(q);
2205 	else
2206 		__guc_exec_queue_fini(guc, q);
2207 }
2208 
2209 int xe_guc_deregister_done_handler(struct xe_guc *guc, u32 *msg, u32 len)
2210 {
2211 	struct xe_exec_queue *q;
2212 	u32 guc_id;
2213 
2214 	if (unlikely(len < 1))
2215 		return -EPROTO;
2216 
2217 	guc_id = msg[0];
2218 
2219 	q = g2h_exec_queue_lookup(guc, guc_id);
2220 	if (unlikely(!q))
2221 		return -EPROTO;
2222 
2223 	if (!exec_queue_destroyed(q) || exec_queue_pending_disable(q) ||
2224 	    exec_queue_pending_enable(q) || exec_queue_enabled(q)) {
2225 		xe_gt_err(guc_to_gt(guc),
2226 			  "DEREGISTER_DONE: Unexpected engine state 0x%04x, guc_id=%d",
2227 			  atomic_read(&q->guc->state), q->guc->id);
2228 		return -EPROTO;
2229 	}
2230 
2231 	handle_deregister_done(guc, q);
2232 
2233 	return 0;
2234 }
2235 
2236 int xe_guc_exec_queue_reset_handler(struct xe_guc *guc, u32 *msg, u32 len)
2237 {
2238 	struct xe_gt *gt = guc_to_gt(guc);
2239 	struct xe_exec_queue *q;
2240 	u32 guc_id;
2241 
2242 	if (unlikely(len < 1))
2243 		return -EPROTO;
2244 
2245 	guc_id = msg[0];
2246 
2247 	q = g2h_exec_queue_lookup(guc, guc_id);
2248 	if (unlikely(!q))
2249 		return -EPROTO;
2250 
2251 	xe_gt_info(gt, "Engine reset: engine_class=%s, logical_mask: 0x%x, guc_id=%d",
2252 		   xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id);
2253 
2254 	trace_xe_exec_queue_reset(q);
2255 
2256 	/*
2257 	 * A banned engine is a NOP at this point (came from
2258 	 * guc_exec_queue_timedout_job). Otherwise, kick drm scheduler to cancel
2259 	 * jobs by setting timeout of the job to the minimum value kicking
2260 	 * guc_exec_queue_timedout_job.
2261 	 */
2262 	set_exec_queue_reset(q);
2263 	if (!exec_queue_banned(q) && !exec_queue_check_timeout(q))
2264 		xe_guc_exec_queue_trigger_cleanup(q);
2265 
2266 	return 0;
2267 }
2268 
2269 /*
2270  * xe_guc_error_capture_handler - Handler of GuC captured message
2271  * @guc: The GuC object
2272  * @msg: Point to the message
2273  * @len: The message length
2274  *
2275  * When GuC captured data is ready, GuC will send message
2276  * XE_GUC_ACTION_STATE_CAPTURE_NOTIFICATION to host, this function will be
2277  * called 1st to check status before process the data comes with the message.
2278  *
2279  * Returns: error code. 0 if success
2280  */
2281 int xe_guc_error_capture_handler(struct xe_guc *guc, u32 *msg, u32 len)
2282 {
2283 	u32 status;
2284 
2285 	if (unlikely(len != XE_GUC_ACTION_STATE_CAPTURE_NOTIFICATION_DATA_LEN))
2286 		return -EPROTO;
2287 
2288 	status = msg[0] & XE_GUC_STATE_CAPTURE_EVENT_STATUS_MASK;
2289 	if (status == XE_GUC_STATE_CAPTURE_EVENT_STATUS_NOSPACE)
2290 		xe_gt_warn(guc_to_gt(guc), "G2H-Error capture no space");
2291 
2292 	xe_guc_capture_process(guc);
2293 
2294 	return 0;
2295 }
2296 
2297 int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg,
2298 					       u32 len)
2299 {
2300 	struct xe_gt *gt = guc_to_gt(guc);
2301 	struct xe_exec_queue *q;
2302 	u32 guc_id;
2303 	u32 type = XE_GUC_CAT_ERR_TYPE_INVALID;
2304 
2305 	if (unlikely(!len || len > 2))
2306 		return -EPROTO;
2307 
2308 	guc_id = msg[0];
2309 
2310 	if (len == 2)
2311 		type = msg[1];
2312 
2313 	if (guc_id == GUC_ID_UNKNOWN) {
2314 		/*
2315 		 * GuC uses GUC_ID_UNKNOWN if it can not map the CAT fault to any PF/VF
2316 		 * context. In such case only PF will be notified about that fault.
2317 		 */
2318 		xe_gt_err_ratelimited(gt, "Memory CAT error reported by GuC!\n");
2319 		return 0;
2320 	}
2321 
2322 	q = g2h_exec_queue_lookup(guc, guc_id);
2323 	if (unlikely(!q))
2324 		return -EPROTO;
2325 
2326 	/*
2327 	 * The type is HW-defined and changes based on platform, so we don't
2328 	 * decode it in the kernel and only check if it is valid.
2329 	 * See bspec 54047 and 72187 for details.
2330 	 */
2331 	if (type != XE_GUC_CAT_ERR_TYPE_INVALID)
2332 		xe_gt_dbg(gt,
2333 			  "Engine memory CAT error [%u]: class=%s, logical_mask: 0x%x, guc_id=%d",
2334 			  type, xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id);
2335 	else
2336 		xe_gt_dbg(gt,
2337 			  "Engine memory CAT error: class=%s, logical_mask: 0x%x, guc_id=%d",
2338 			  xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id);
2339 
2340 	trace_xe_exec_queue_memory_cat_error(q);
2341 
2342 	/* Treat the same as engine reset */
2343 	set_exec_queue_reset(q);
2344 	if (!exec_queue_banned(q) && !exec_queue_check_timeout(q))
2345 		xe_guc_exec_queue_trigger_cleanup(q);
2346 
2347 	return 0;
2348 }
2349 
2350 int xe_guc_exec_queue_reset_failure_handler(struct xe_guc *guc, u32 *msg, u32 len)
2351 {
2352 	struct xe_gt *gt = guc_to_gt(guc);
2353 	u8 guc_class, instance;
2354 	u32 reason;
2355 
2356 	if (unlikely(len != 3))
2357 		return -EPROTO;
2358 
2359 	guc_class = msg[0];
2360 	instance = msg[1];
2361 	reason = msg[2];
2362 
2363 	/* Unexpected failure of a hardware feature, log an actual error */
2364 	xe_gt_err(gt, "GuC engine reset request failed on %d:%d because 0x%08X",
2365 		  guc_class, instance, reason);
2366 
2367 	xe_gt_reset_async(gt);
2368 
2369 	return 0;
2370 }
2371 
2372 static void
2373 guc_exec_queue_wq_snapshot_capture(struct xe_exec_queue *q,
2374 				   struct xe_guc_submit_exec_queue_snapshot *snapshot)
2375 {
2376 	struct xe_guc *guc = exec_queue_to_guc(q);
2377 	struct xe_device *xe = guc_to_xe(guc);
2378 	struct iosys_map map = xe_lrc_parallel_map(q->lrc[0]);
2379 	int i;
2380 
2381 	snapshot->guc.wqi_head = q->guc->wqi_head;
2382 	snapshot->guc.wqi_tail = q->guc->wqi_tail;
2383 	snapshot->parallel.wq_desc.head = parallel_read(xe, map, wq_desc.head);
2384 	snapshot->parallel.wq_desc.tail = parallel_read(xe, map, wq_desc.tail);
2385 	snapshot->parallel.wq_desc.status = parallel_read(xe, map,
2386 							  wq_desc.wq_status);
2387 
2388 	if (snapshot->parallel.wq_desc.head !=
2389 	    snapshot->parallel.wq_desc.tail) {
2390 		for (i = snapshot->parallel.wq_desc.head;
2391 		     i != snapshot->parallel.wq_desc.tail;
2392 		     i = (i + sizeof(u32)) % WQ_SIZE)
2393 			snapshot->parallel.wq[i / sizeof(u32)] =
2394 				parallel_read(xe, map, wq[i / sizeof(u32)]);
2395 	}
2396 }
2397 
2398 static void
2399 guc_exec_queue_wq_snapshot_print(struct xe_guc_submit_exec_queue_snapshot *snapshot,
2400 				 struct drm_printer *p)
2401 {
2402 	int i;
2403 
2404 	drm_printf(p, "\tWQ head: %u (internal), %d (memory)\n",
2405 		   snapshot->guc.wqi_head, snapshot->parallel.wq_desc.head);
2406 	drm_printf(p, "\tWQ tail: %u (internal), %d (memory)\n",
2407 		   snapshot->guc.wqi_tail, snapshot->parallel.wq_desc.tail);
2408 	drm_printf(p, "\tWQ status: %u\n", snapshot->parallel.wq_desc.status);
2409 
2410 	if (snapshot->parallel.wq_desc.head !=
2411 	    snapshot->parallel.wq_desc.tail) {
2412 		for (i = snapshot->parallel.wq_desc.head;
2413 		     i != snapshot->parallel.wq_desc.tail;
2414 		     i = (i + sizeof(u32)) % WQ_SIZE)
2415 			drm_printf(p, "\tWQ[%zu]: 0x%08x\n", i / sizeof(u32),
2416 				   snapshot->parallel.wq[i / sizeof(u32)]);
2417 	}
2418 }
2419 
2420 /**
2421  * xe_guc_exec_queue_snapshot_capture - Take a quick snapshot of the GuC Engine.
2422  * @q: faulty exec queue
2423  *
2424  * This can be printed out in a later stage like during dev_coredump
2425  * analysis.
2426  *
2427  * Returns: a GuC Submit Engine snapshot object that must be freed by the
2428  * caller, using `xe_guc_exec_queue_snapshot_free`.
2429  */
2430 struct xe_guc_submit_exec_queue_snapshot *
2431 xe_guc_exec_queue_snapshot_capture(struct xe_exec_queue *q)
2432 {
2433 	struct xe_gpu_scheduler *sched = &q->guc->sched;
2434 	struct xe_guc_submit_exec_queue_snapshot *snapshot;
2435 	int i;
2436 
2437 	snapshot = kzalloc(sizeof(*snapshot), GFP_ATOMIC);
2438 
2439 	if (!snapshot)
2440 		return NULL;
2441 
2442 	snapshot->guc.id = q->guc->id;
2443 	memcpy(&snapshot->name, &q->name, sizeof(snapshot->name));
2444 	snapshot->class = q->class;
2445 	snapshot->logical_mask = q->logical_mask;
2446 	snapshot->width = q->width;
2447 	snapshot->refcount = kref_read(&q->refcount);
2448 	snapshot->sched_timeout = sched->base.timeout;
2449 	snapshot->sched_props.timeslice_us = q->sched_props.timeslice_us;
2450 	snapshot->sched_props.preempt_timeout_us =
2451 		q->sched_props.preempt_timeout_us;
2452 
2453 	snapshot->lrc = kmalloc_array(q->width, sizeof(struct xe_lrc_snapshot *),
2454 				      GFP_ATOMIC);
2455 
2456 	if (snapshot->lrc) {
2457 		for (i = 0; i < q->width; ++i) {
2458 			struct xe_lrc *lrc = q->lrc[i];
2459 
2460 			snapshot->lrc[i] = xe_lrc_snapshot_capture(lrc);
2461 		}
2462 	}
2463 
2464 	snapshot->schedule_state = atomic_read(&q->guc->state);
2465 	snapshot->exec_queue_flags = q->flags;
2466 
2467 	snapshot->parallel_execution = xe_exec_queue_is_parallel(q);
2468 	if (snapshot->parallel_execution)
2469 		guc_exec_queue_wq_snapshot_capture(q, snapshot);
2470 
2471 	spin_lock(&sched->base.job_list_lock);
2472 	snapshot->pending_list_size = list_count_nodes(&sched->base.pending_list);
2473 	snapshot->pending_list = kmalloc_array(snapshot->pending_list_size,
2474 					       sizeof(struct pending_list_snapshot),
2475 					       GFP_ATOMIC);
2476 
2477 	if (snapshot->pending_list) {
2478 		struct xe_sched_job *job_iter;
2479 
2480 		i = 0;
2481 		list_for_each_entry(job_iter, &sched->base.pending_list, drm.list) {
2482 			snapshot->pending_list[i].seqno =
2483 				xe_sched_job_seqno(job_iter);
2484 			snapshot->pending_list[i].fence =
2485 				dma_fence_is_signaled(job_iter->fence) ? 1 : 0;
2486 			snapshot->pending_list[i].finished =
2487 				dma_fence_is_signaled(&job_iter->drm.s_fence->finished)
2488 				? 1 : 0;
2489 			i++;
2490 		}
2491 	}
2492 
2493 	spin_unlock(&sched->base.job_list_lock);
2494 
2495 	return snapshot;
2496 }
2497 
2498 /**
2499  * xe_guc_exec_queue_snapshot_capture_delayed - Take delayed part of snapshot of the GuC Engine.
2500  * @snapshot: Previously captured snapshot of job.
2501  *
2502  * This captures some data that requires taking some locks, so it cannot be done in signaling path.
2503  */
2504 void
2505 xe_guc_exec_queue_snapshot_capture_delayed(struct xe_guc_submit_exec_queue_snapshot *snapshot)
2506 {
2507 	int i;
2508 
2509 	if (!snapshot || !snapshot->lrc)
2510 		return;
2511 
2512 	for (i = 0; i < snapshot->width; ++i)
2513 		xe_lrc_snapshot_capture_delayed(snapshot->lrc[i]);
2514 }
2515 
2516 /**
2517  * xe_guc_exec_queue_snapshot_print - Print out a given GuC Engine snapshot.
2518  * @snapshot: GuC Submit Engine snapshot object.
2519  * @p: drm_printer where it will be printed out.
2520  *
2521  * This function prints out a given GuC Submit Engine snapshot object.
2522  */
2523 void
2524 xe_guc_exec_queue_snapshot_print(struct xe_guc_submit_exec_queue_snapshot *snapshot,
2525 				 struct drm_printer *p)
2526 {
2527 	int i;
2528 
2529 	if (!snapshot)
2530 		return;
2531 
2532 	drm_printf(p, "GuC ID: %d\n", snapshot->guc.id);
2533 	drm_printf(p, "\tName: %s\n", snapshot->name);
2534 	drm_printf(p, "\tClass: %d\n", snapshot->class);
2535 	drm_printf(p, "\tLogical mask: 0x%x\n", snapshot->logical_mask);
2536 	drm_printf(p, "\tWidth: %d\n", snapshot->width);
2537 	drm_printf(p, "\tRef: %d\n", snapshot->refcount);
2538 	drm_printf(p, "\tTimeout: %ld (ms)\n", snapshot->sched_timeout);
2539 	drm_printf(p, "\tTimeslice: %u (us)\n",
2540 		   snapshot->sched_props.timeslice_us);
2541 	drm_printf(p, "\tPreempt timeout: %u (us)\n",
2542 		   snapshot->sched_props.preempt_timeout_us);
2543 
2544 	for (i = 0; snapshot->lrc && i < snapshot->width; ++i)
2545 		xe_lrc_snapshot_print(snapshot->lrc[i], p);
2546 
2547 	drm_printf(p, "\tSchedule State: 0x%x\n", snapshot->schedule_state);
2548 	drm_printf(p, "\tFlags: 0x%lx\n", snapshot->exec_queue_flags);
2549 
2550 	if (snapshot->parallel_execution)
2551 		guc_exec_queue_wq_snapshot_print(snapshot, p);
2552 
2553 	for (i = 0; snapshot->pending_list && i < snapshot->pending_list_size;
2554 	     i++)
2555 		drm_printf(p, "\tJob: seqno=%d, fence=%d, finished=%d\n",
2556 			   snapshot->pending_list[i].seqno,
2557 			   snapshot->pending_list[i].fence,
2558 			   snapshot->pending_list[i].finished);
2559 }
2560 
2561 /**
2562  * xe_guc_exec_queue_snapshot_free - Free all allocated objects for a given
2563  * snapshot.
2564  * @snapshot: GuC Submit Engine snapshot object.
2565  *
2566  * This function free all the memory that needed to be allocated at capture
2567  * time.
2568  */
2569 void xe_guc_exec_queue_snapshot_free(struct xe_guc_submit_exec_queue_snapshot *snapshot)
2570 {
2571 	int i;
2572 
2573 	if (!snapshot)
2574 		return;
2575 
2576 	if (snapshot->lrc) {
2577 		for (i = 0; i < snapshot->width; i++)
2578 			xe_lrc_snapshot_free(snapshot->lrc[i]);
2579 		kfree(snapshot->lrc);
2580 	}
2581 	kfree(snapshot->pending_list);
2582 	kfree(snapshot);
2583 }
2584 
2585 static void guc_exec_queue_print(struct xe_exec_queue *q, struct drm_printer *p)
2586 {
2587 	struct xe_guc_submit_exec_queue_snapshot *snapshot;
2588 
2589 	snapshot = xe_guc_exec_queue_snapshot_capture(q);
2590 	xe_guc_exec_queue_snapshot_print(snapshot, p);
2591 	xe_guc_exec_queue_snapshot_free(snapshot);
2592 }
2593 
2594 /**
2595  * xe_guc_register_vf_exec_queue - Register exec queue for a given context type.
2596  * @q: Execution queue
2597  * @ctx_type: Type of the context
2598  *
2599  * This function registers the execution queue with the guc. Special context
2600  * types like GUC_CONTEXT_COMPRESSION_SAVE and GUC_CONTEXT_COMPRESSION_RESTORE
2601  * are only applicable for IGPU and in the VF.
2602  * Submits the execution queue to GUC after registering it.
2603  *
2604  * Returns - None.
2605  */
2606 void xe_guc_register_vf_exec_queue(struct xe_exec_queue *q, int ctx_type)
2607 {
2608 	struct xe_guc *guc = exec_queue_to_guc(q);
2609 	struct xe_device *xe = guc_to_xe(guc);
2610 	struct xe_gt *gt = guc_to_gt(guc);
2611 
2612 	xe_gt_assert(gt, IS_SRIOV_VF(xe));
2613 	xe_gt_assert(gt, !IS_DGFX(xe));
2614 	xe_gt_assert(gt, ctx_type == GUC_CONTEXT_COMPRESSION_SAVE ||
2615 		     ctx_type == GUC_CONTEXT_COMPRESSION_RESTORE);
2616 	xe_gt_assert(gt, GUC_SUBMIT_VER(guc) >= MAKE_GUC_VER(1, 23, 0));
2617 
2618 	register_exec_queue(q, ctx_type);
2619 	enable_scheduling(q);
2620 }
2621 
2622 /**
2623  * xe_guc_submit_print - GuC Submit Print.
2624  * @guc: GuC.
2625  * @p: drm_printer where it will be printed out.
2626  *
2627  * This function capture and prints snapshots of **all** GuC Engines.
2628  */
2629 void xe_guc_submit_print(struct xe_guc *guc, struct drm_printer *p)
2630 {
2631 	struct xe_exec_queue *q;
2632 	unsigned long index;
2633 
2634 	if (!xe_device_uc_enabled(guc_to_xe(guc)))
2635 		return;
2636 
2637 	mutex_lock(&guc->submission_state.lock);
2638 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
2639 		guc_exec_queue_print(q, p);
2640 	mutex_unlock(&guc->submission_state.lock);
2641 }
2642 
2643 /**
2644  * xe_guc_contexts_hwsp_rebase - Re-compute GGTT references within all
2645  * exec queues registered to given GuC.
2646  * @guc: the &xe_guc struct instance
2647  * @scratch: scratch buffer to be used as temporary storage
2648  *
2649  * Returns: zero on success, negative error code on failure.
2650  */
2651 int xe_guc_contexts_hwsp_rebase(struct xe_guc *guc, void *scratch)
2652 {
2653 	struct xe_exec_queue *q;
2654 	unsigned long index;
2655 	int err = 0;
2656 
2657 	mutex_lock(&guc->submission_state.lock);
2658 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
2659 		err = xe_exec_queue_contexts_hwsp_rebase(q, scratch);
2660 		if (err)
2661 			break;
2662 		if (xe_exec_queue_is_parallel(q))
2663 			err = wq_items_rebase(q);
2664 		if (err)
2665 			break;
2666 	}
2667 	mutex_unlock(&guc->submission_state.lock);
2668 
2669 	return err;
2670 }
2671