xref: /linux/drivers/gpu/drm/xe/xe_guc_submit.c (revision 6f17ab9a63e670bd62a287f95e3982f99eafd77e)
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2022 Intel Corporation
4  */
5 
6 #include "xe_guc_submit.h"
7 
8 #include <linux/bitfield.h>
9 #include <linux/bitmap.h>
10 #include <linux/circ_buf.h>
11 #include <linux/delay.h>
12 #include <linux/dma-fence-array.h>
13 #include <linux/math64.h>
14 
15 #include <drm/drm_managed.h>
16 
17 #include "abi/guc_actions_abi.h"
18 #include "abi/guc_actions_slpc_abi.h"
19 #include "abi/guc_klvs_abi.h"
20 #include "regs/xe_lrc_layout.h"
21 #include "xe_assert.h"
22 #include "xe_devcoredump.h"
23 #include "xe_device.h"
24 #include "xe_exec_queue.h"
25 #include "xe_force_wake.h"
26 #include "xe_gpu_scheduler.h"
27 #include "xe_gt.h"
28 #include "xe_gt_clock.h"
29 #include "xe_gt_printk.h"
30 #include "xe_guc.h"
31 #include "xe_guc_capture.h"
32 #include "xe_guc_ct.h"
33 #include "xe_guc_exec_queue_types.h"
34 #include "xe_guc_id_mgr.h"
35 #include "xe_guc_submit_types.h"
36 #include "xe_hw_engine.h"
37 #include "xe_hw_fence.h"
38 #include "xe_lrc.h"
39 #include "xe_macros.h"
40 #include "xe_map.h"
41 #include "xe_mocs.h"
42 #include "xe_pm.h"
43 #include "xe_ring_ops_types.h"
44 #include "xe_sched_job.h"
45 #include "xe_trace.h"
46 #include "xe_vm.h"
47 
48 static struct xe_guc *
49 exec_queue_to_guc(struct xe_exec_queue *q)
50 {
51 	return &q->gt->uc.guc;
52 }
53 
54 /*
55  * Helpers for engine state, using an atomic as some of the bits can transition
56  * as the same time (e.g. a suspend can be happning at the same time as schedule
57  * engine done being processed).
58  */
59 #define EXEC_QUEUE_STATE_REGISTERED		(1 << 0)
60 #define EXEC_QUEUE_STATE_ENABLED		(1 << 1)
61 #define EXEC_QUEUE_STATE_PENDING_ENABLE		(1 << 2)
62 #define EXEC_QUEUE_STATE_PENDING_DISABLE	(1 << 3)
63 #define EXEC_QUEUE_STATE_DESTROYED		(1 << 4)
64 #define EXEC_QUEUE_STATE_SUSPENDED		(1 << 5)
65 #define EXEC_QUEUE_STATE_RESET			(1 << 6)
66 #define EXEC_QUEUE_STATE_KILLED			(1 << 7)
67 #define EXEC_QUEUE_STATE_WEDGED			(1 << 8)
68 #define EXEC_QUEUE_STATE_BANNED			(1 << 9)
69 #define EXEC_QUEUE_STATE_CHECK_TIMEOUT		(1 << 10)
70 #define EXEC_QUEUE_STATE_EXTRA_REF		(1 << 11)
71 
72 static bool exec_queue_registered(struct xe_exec_queue *q)
73 {
74 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_REGISTERED;
75 }
76 
77 static void set_exec_queue_registered(struct xe_exec_queue *q)
78 {
79 	atomic_or(EXEC_QUEUE_STATE_REGISTERED, &q->guc->state);
80 }
81 
82 static void clear_exec_queue_registered(struct xe_exec_queue *q)
83 {
84 	atomic_and(~EXEC_QUEUE_STATE_REGISTERED, &q->guc->state);
85 }
86 
87 static bool exec_queue_enabled(struct xe_exec_queue *q)
88 {
89 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_ENABLED;
90 }
91 
92 static void set_exec_queue_enabled(struct xe_exec_queue *q)
93 {
94 	atomic_or(EXEC_QUEUE_STATE_ENABLED, &q->guc->state);
95 }
96 
97 static void clear_exec_queue_enabled(struct xe_exec_queue *q)
98 {
99 	atomic_and(~EXEC_QUEUE_STATE_ENABLED, &q->guc->state);
100 }
101 
102 static bool exec_queue_pending_enable(struct xe_exec_queue *q)
103 {
104 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_PENDING_ENABLE;
105 }
106 
107 static void set_exec_queue_pending_enable(struct xe_exec_queue *q)
108 {
109 	atomic_or(EXEC_QUEUE_STATE_PENDING_ENABLE, &q->guc->state);
110 }
111 
112 static void clear_exec_queue_pending_enable(struct xe_exec_queue *q)
113 {
114 	atomic_and(~EXEC_QUEUE_STATE_PENDING_ENABLE, &q->guc->state);
115 }
116 
117 static bool exec_queue_pending_disable(struct xe_exec_queue *q)
118 {
119 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_PENDING_DISABLE;
120 }
121 
122 static void set_exec_queue_pending_disable(struct xe_exec_queue *q)
123 {
124 	atomic_or(EXEC_QUEUE_STATE_PENDING_DISABLE, &q->guc->state);
125 }
126 
127 static void clear_exec_queue_pending_disable(struct xe_exec_queue *q)
128 {
129 	atomic_and(~EXEC_QUEUE_STATE_PENDING_DISABLE, &q->guc->state);
130 }
131 
132 static bool exec_queue_destroyed(struct xe_exec_queue *q)
133 {
134 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_DESTROYED;
135 }
136 
137 static void set_exec_queue_destroyed(struct xe_exec_queue *q)
138 {
139 	atomic_or(EXEC_QUEUE_STATE_DESTROYED, &q->guc->state);
140 }
141 
142 static bool exec_queue_banned(struct xe_exec_queue *q)
143 {
144 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_BANNED;
145 }
146 
147 static void set_exec_queue_banned(struct xe_exec_queue *q)
148 {
149 	atomic_or(EXEC_QUEUE_STATE_BANNED, &q->guc->state);
150 }
151 
152 static bool exec_queue_suspended(struct xe_exec_queue *q)
153 {
154 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_SUSPENDED;
155 }
156 
157 static void set_exec_queue_suspended(struct xe_exec_queue *q)
158 {
159 	atomic_or(EXEC_QUEUE_STATE_SUSPENDED, &q->guc->state);
160 }
161 
162 static void clear_exec_queue_suspended(struct xe_exec_queue *q)
163 {
164 	atomic_and(~EXEC_QUEUE_STATE_SUSPENDED, &q->guc->state);
165 }
166 
167 static bool exec_queue_reset(struct xe_exec_queue *q)
168 {
169 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_RESET;
170 }
171 
172 static void set_exec_queue_reset(struct xe_exec_queue *q)
173 {
174 	atomic_or(EXEC_QUEUE_STATE_RESET, &q->guc->state);
175 }
176 
177 static bool exec_queue_killed(struct xe_exec_queue *q)
178 {
179 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_KILLED;
180 }
181 
182 static void set_exec_queue_killed(struct xe_exec_queue *q)
183 {
184 	atomic_or(EXEC_QUEUE_STATE_KILLED, &q->guc->state);
185 }
186 
187 static bool exec_queue_wedged(struct xe_exec_queue *q)
188 {
189 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_WEDGED;
190 }
191 
192 static void set_exec_queue_wedged(struct xe_exec_queue *q)
193 {
194 	atomic_or(EXEC_QUEUE_STATE_WEDGED, &q->guc->state);
195 }
196 
197 static bool exec_queue_check_timeout(struct xe_exec_queue *q)
198 {
199 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_CHECK_TIMEOUT;
200 }
201 
202 static void set_exec_queue_check_timeout(struct xe_exec_queue *q)
203 {
204 	atomic_or(EXEC_QUEUE_STATE_CHECK_TIMEOUT, &q->guc->state);
205 }
206 
207 static void clear_exec_queue_check_timeout(struct xe_exec_queue *q)
208 {
209 	atomic_and(~EXEC_QUEUE_STATE_CHECK_TIMEOUT, &q->guc->state);
210 }
211 
212 static bool exec_queue_extra_ref(struct xe_exec_queue *q)
213 {
214 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_EXTRA_REF;
215 }
216 
217 static void set_exec_queue_extra_ref(struct xe_exec_queue *q)
218 {
219 	atomic_or(EXEC_QUEUE_STATE_EXTRA_REF, &q->guc->state);
220 }
221 
222 static bool exec_queue_killed_or_banned_or_wedged(struct xe_exec_queue *q)
223 {
224 	return (atomic_read(&q->guc->state) &
225 		(EXEC_QUEUE_STATE_WEDGED | EXEC_QUEUE_STATE_KILLED |
226 		 EXEC_QUEUE_STATE_BANNED));
227 }
228 
229 static void guc_submit_fini(struct drm_device *drm, void *arg)
230 {
231 	struct xe_guc *guc = arg;
232 	struct xe_device *xe = guc_to_xe(guc);
233 	struct xe_gt *gt = guc_to_gt(guc);
234 	int ret;
235 
236 	ret = wait_event_timeout(guc->submission_state.fini_wq,
237 				 xa_empty(&guc->submission_state.exec_queue_lookup),
238 				 HZ * 5);
239 
240 	drain_workqueue(xe->destroy_wq);
241 
242 	xe_gt_assert(gt, ret);
243 
244 	xa_destroy(&guc->submission_state.exec_queue_lookup);
245 }
246 
247 static void guc_submit_wedged_fini(void *arg)
248 {
249 	struct xe_guc *guc = arg;
250 	struct xe_exec_queue *q;
251 	unsigned long index;
252 
253 	mutex_lock(&guc->submission_state.lock);
254 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
255 		if (exec_queue_wedged(q)) {
256 			mutex_unlock(&guc->submission_state.lock);
257 			xe_exec_queue_put(q);
258 			mutex_lock(&guc->submission_state.lock);
259 		}
260 	}
261 	mutex_unlock(&guc->submission_state.lock);
262 }
263 
264 static const struct xe_exec_queue_ops guc_exec_queue_ops;
265 
266 static void primelockdep(struct xe_guc *guc)
267 {
268 	if (!IS_ENABLED(CONFIG_LOCKDEP))
269 		return;
270 
271 	fs_reclaim_acquire(GFP_KERNEL);
272 
273 	mutex_lock(&guc->submission_state.lock);
274 	mutex_unlock(&guc->submission_state.lock);
275 
276 	fs_reclaim_release(GFP_KERNEL);
277 }
278 
279 /**
280  * xe_guc_submit_init() - Initialize GuC submission.
281  * @guc: the &xe_guc to initialize
282  * @num_ids: number of GuC context IDs to use
283  *
284  * The bare-metal or PF driver can pass ~0 as &num_ids to indicate that all
285  * GuC context IDs supported by the GuC firmware should be used for submission.
286  *
287  * Only VF drivers will have to provide explicit number of GuC context IDs
288  * that they can use for submission.
289  *
290  * Return: 0 on success or a negative error code on failure.
291  */
292 int xe_guc_submit_init(struct xe_guc *guc, unsigned int num_ids)
293 {
294 	struct xe_device *xe = guc_to_xe(guc);
295 	struct xe_gt *gt = guc_to_gt(guc);
296 	int err;
297 
298 	err = drmm_mutex_init(&xe->drm, &guc->submission_state.lock);
299 	if (err)
300 		return err;
301 
302 	err = xe_guc_id_mgr_init(&guc->submission_state.idm, num_ids);
303 	if (err)
304 		return err;
305 
306 	gt->exec_queue_ops = &guc_exec_queue_ops;
307 
308 	xa_init(&guc->submission_state.exec_queue_lookup);
309 
310 	init_waitqueue_head(&guc->submission_state.fini_wq);
311 
312 	primelockdep(guc);
313 
314 	guc->submission_state.initialized = true;
315 
316 	return drmm_add_action_or_reset(&xe->drm, guc_submit_fini, guc);
317 }
318 
319 static void __release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q, u32 xa_count)
320 {
321 	int i;
322 
323 	lockdep_assert_held(&guc->submission_state.lock);
324 
325 	for (i = 0; i < xa_count; ++i)
326 		xa_erase(&guc->submission_state.exec_queue_lookup, q->guc->id + i);
327 
328 	xe_guc_id_mgr_release_locked(&guc->submission_state.idm,
329 				     q->guc->id, q->width);
330 
331 	if (xa_empty(&guc->submission_state.exec_queue_lookup))
332 		wake_up(&guc->submission_state.fini_wq);
333 }
334 
335 static int alloc_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
336 {
337 	int ret;
338 	int i;
339 
340 	/*
341 	 * Must use GFP_NOWAIT as this lock is in the dma fence signalling path,
342 	 * worse case user gets -ENOMEM on engine create and has to try again.
343 	 *
344 	 * FIXME: Have caller pre-alloc or post-alloc /w GFP_KERNEL to prevent
345 	 * failure.
346 	 */
347 	lockdep_assert_held(&guc->submission_state.lock);
348 
349 	ret = xe_guc_id_mgr_reserve_locked(&guc->submission_state.idm,
350 					   q->width);
351 	if (ret < 0)
352 		return ret;
353 
354 	q->guc->id = ret;
355 
356 	for (i = 0; i < q->width; ++i) {
357 		ret = xa_err(xa_store(&guc->submission_state.exec_queue_lookup,
358 				      q->guc->id + i, q, GFP_NOWAIT));
359 		if (ret)
360 			goto err_release;
361 	}
362 
363 	return 0;
364 
365 err_release:
366 	__release_guc_id(guc, q, i);
367 
368 	return ret;
369 }
370 
371 static void release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
372 {
373 	mutex_lock(&guc->submission_state.lock);
374 	__release_guc_id(guc, q, q->width);
375 	mutex_unlock(&guc->submission_state.lock);
376 }
377 
378 struct exec_queue_policy {
379 	u32 count;
380 	struct guc_update_exec_queue_policy h2g;
381 };
382 
383 static u32 __guc_exec_queue_policy_action_size(struct exec_queue_policy *policy)
384 {
385 	size_t bytes = sizeof(policy->h2g.header) +
386 		       (sizeof(policy->h2g.klv[0]) * policy->count);
387 
388 	return bytes / sizeof(u32);
389 }
390 
391 static void __guc_exec_queue_policy_start_klv(struct exec_queue_policy *policy,
392 					      u16 guc_id)
393 {
394 	policy->h2g.header.action =
395 		XE_GUC_ACTION_HOST2GUC_UPDATE_CONTEXT_POLICIES;
396 	policy->h2g.header.guc_id = guc_id;
397 	policy->count = 0;
398 }
399 
400 #define MAKE_EXEC_QUEUE_POLICY_ADD(func, id) \
401 static void __guc_exec_queue_policy_add_##func(struct exec_queue_policy *policy, \
402 					   u32 data) \
403 { \
404 	XE_WARN_ON(policy->count >= GUC_CONTEXT_POLICIES_KLV_NUM_IDS); \
405 \
406 	policy->h2g.klv[policy->count].kl = \
407 		FIELD_PREP(GUC_KLV_0_KEY, \
408 			   GUC_CONTEXT_POLICIES_KLV_ID_##id) | \
409 		FIELD_PREP(GUC_KLV_0_LEN, 1); \
410 	policy->h2g.klv[policy->count].value = data; \
411 	policy->count++; \
412 }
413 
414 MAKE_EXEC_QUEUE_POLICY_ADD(execution_quantum, EXECUTION_QUANTUM)
415 MAKE_EXEC_QUEUE_POLICY_ADD(preemption_timeout, PREEMPTION_TIMEOUT)
416 MAKE_EXEC_QUEUE_POLICY_ADD(priority, SCHEDULING_PRIORITY)
417 MAKE_EXEC_QUEUE_POLICY_ADD(slpc_exec_queue_freq_req, SLPM_GT_FREQUENCY)
418 #undef MAKE_EXEC_QUEUE_POLICY_ADD
419 
420 static const int xe_exec_queue_prio_to_guc[] = {
421 	[XE_EXEC_QUEUE_PRIORITY_LOW] = GUC_CLIENT_PRIORITY_NORMAL,
422 	[XE_EXEC_QUEUE_PRIORITY_NORMAL] = GUC_CLIENT_PRIORITY_KMD_NORMAL,
423 	[XE_EXEC_QUEUE_PRIORITY_HIGH] = GUC_CLIENT_PRIORITY_HIGH,
424 	[XE_EXEC_QUEUE_PRIORITY_KERNEL] = GUC_CLIENT_PRIORITY_KMD_HIGH,
425 };
426 
427 static void init_policies(struct xe_guc *guc, struct xe_exec_queue *q)
428 {
429 	struct exec_queue_policy policy;
430 	enum xe_exec_queue_priority prio = q->sched_props.priority;
431 	u32 timeslice_us = q->sched_props.timeslice_us;
432 	u32 slpc_exec_queue_freq_req = 0;
433 	u32 preempt_timeout_us = q->sched_props.preempt_timeout_us;
434 
435 	xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q));
436 
437 	if (q->flags & EXEC_QUEUE_FLAG_LOW_LATENCY)
438 		slpc_exec_queue_freq_req |= SLPC_CTX_FREQ_REQ_IS_COMPUTE;
439 
440 	__guc_exec_queue_policy_start_klv(&policy, q->guc->id);
441 	__guc_exec_queue_policy_add_priority(&policy, xe_exec_queue_prio_to_guc[prio]);
442 	__guc_exec_queue_policy_add_execution_quantum(&policy, timeslice_us);
443 	__guc_exec_queue_policy_add_preemption_timeout(&policy, preempt_timeout_us);
444 	__guc_exec_queue_policy_add_slpc_exec_queue_freq_req(&policy,
445 							     slpc_exec_queue_freq_req);
446 
447 	xe_guc_ct_send(&guc->ct, (u32 *)&policy.h2g,
448 		       __guc_exec_queue_policy_action_size(&policy), 0, 0);
449 }
450 
451 static void set_min_preemption_timeout(struct xe_guc *guc, struct xe_exec_queue *q)
452 {
453 	struct exec_queue_policy policy;
454 
455 	__guc_exec_queue_policy_start_klv(&policy, q->guc->id);
456 	__guc_exec_queue_policy_add_preemption_timeout(&policy, 1);
457 
458 	xe_guc_ct_send(&guc->ct, (u32 *)&policy.h2g,
459 		       __guc_exec_queue_policy_action_size(&policy), 0, 0);
460 }
461 
462 #define parallel_read(xe_, map_, field_) \
463 	xe_map_rd_field(xe_, &map_, 0, struct guc_submit_parallel_scratch, \
464 			field_)
465 #define parallel_write(xe_, map_, field_, val_) \
466 	xe_map_wr_field(xe_, &map_, 0, struct guc_submit_parallel_scratch, \
467 			field_, val_)
468 
469 static void __register_mlrc_exec_queue(struct xe_guc *guc,
470 				       struct xe_exec_queue *q,
471 				       struct guc_ctxt_registration_info *info)
472 {
473 #define MAX_MLRC_REG_SIZE      (13 + XE_HW_ENGINE_MAX_INSTANCE * 2)
474 	u32 action[MAX_MLRC_REG_SIZE];
475 	int len = 0;
476 	int i;
477 
478 	xe_gt_assert(guc_to_gt(guc), xe_exec_queue_is_parallel(q));
479 
480 	action[len++] = XE_GUC_ACTION_REGISTER_CONTEXT_MULTI_LRC;
481 	action[len++] = info->flags;
482 	action[len++] = info->context_idx;
483 	action[len++] = info->engine_class;
484 	action[len++] = info->engine_submit_mask;
485 	action[len++] = info->wq_desc_lo;
486 	action[len++] = info->wq_desc_hi;
487 	action[len++] = info->wq_base_lo;
488 	action[len++] = info->wq_base_hi;
489 	action[len++] = info->wq_size;
490 	action[len++] = q->width;
491 	action[len++] = info->hwlrca_lo;
492 	action[len++] = info->hwlrca_hi;
493 
494 	for (i = 1; i < q->width; ++i) {
495 		struct xe_lrc *lrc = q->lrc[i];
496 
497 		action[len++] = lower_32_bits(xe_lrc_descriptor(lrc));
498 		action[len++] = upper_32_bits(xe_lrc_descriptor(lrc));
499 	}
500 
501 	/* explicitly checks some fields that we might fixup later */
502 	xe_gt_assert(guc_to_gt(guc), info->wq_desc_lo ==
503 		     action[XE_GUC_REGISTER_CONTEXT_MULTI_LRC_DATA_5_WQ_DESC_ADDR_LOWER]);
504 	xe_gt_assert(guc_to_gt(guc), info->wq_base_lo ==
505 		     action[XE_GUC_REGISTER_CONTEXT_MULTI_LRC_DATA_7_WQ_BUF_BASE_LOWER]);
506 	xe_gt_assert(guc_to_gt(guc), q->width ==
507 		     action[XE_GUC_REGISTER_CONTEXT_MULTI_LRC_DATA_10_NUM_CTXS]);
508 	xe_gt_assert(guc_to_gt(guc), info->hwlrca_lo ==
509 		     action[XE_GUC_REGISTER_CONTEXT_MULTI_LRC_DATA_11_HW_LRC_ADDR]);
510 	xe_gt_assert(guc_to_gt(guc), len <= MAX_MLRC_REG_SIZE);
511 #undef MAX_MLRC_REG_SIZE
512 
513 	xe_guc_ct_send(&guc->ct, action, len, 0, 0);
514 }
515 
516 static void __register_exec_queue(struct xe_guc *guc,
517 				  struct guc_ctxt_registration_info *info)
518 {
519 	u32 action[] = {
520 		XE_GUC_ACTION_REGISTER_CONTEXT,
521 		info->flags,
522 		info->context_idx,
523 		info->engine_class,
524 		info->engine_submit_mask,
525 		info->wq_desc_lo,
526 		info->wq_desc_hi,
527 		info->wq_base_lo,
528 		info->wq_base_hi,
529 		info->wq_size,
530 		info->hwlrca_lo,
531 		info->hwlrca_hi,
532 	};
533 
534 	/* explicitly checks some fields that we might fixup later */
535 	xe_gt_assert(guc_to_gt(guc), info->wq_desc_lo ==
536 		     action[XE_GUC_REGISTER_CONTEXT_DATA_5_WQ_DESC_ADDR_LOWER]);
537 	xe_gt_assert(guc_to_gt(guc), info->wq_base_lo ==
538 		     action[XE_GUC_REGISTER_CONTEXT_DATA_7_WQ_BUF_BASE_LOWER]);
539 	xe_gt_assert(guc_to_gt(guc), info->hwlrca_lo ==
540 		     action[XE_GUC_REGISTER_CONTEXT_DATA_10_HW_LRC_ADDR]);
541 
542 	xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action), 0, 0);
543 }
544 
545 static void register_exec_queue(struct xe_exec_queue *q, int ctx_type)
546 {
547 	struct xe_guc *guc = exec_queue_to_guc(q);
548 	struct xe_device *xe = guc_to_xe(guc);
549 	struct xe_lrc *lrc = q->lrc[0];
550 	struct guc_ctxt_registration_info info;
551 
552 	xe_gt_assert(guc_to_gt(guc), !exec_queue_registered(q));
553 	xe_gt_assert(guc_to_gt(guc), ctx_type < GUC_CONTEXT_COUNT);
554 
555 	memset(&info, 0, sizeof(info));
556 	info.context_idx = q->guc->id;
557 	info.engine_class = xe_engine_class_to_guc_class(q->class);
558 	info.engine_submit_mask = q->logical_mask;
559 	info.hwlrca_lo = lower_32_bits(xe_lrc_descriptor(lrc));
560 	info.hwlrca_hi = upper_32_bits(xe_lrc_descriptor(lrc));
561 	info.flags = CONTEXT_REGISTRATION_FLAG_KMD;
562 
563 	if (ctx_type != GUC_CONTEXT_NORMAL)
564 		info.flags |= BIT(ctx_type);
565 
566 	if (xe_exec_queue_is_parallel(q)) {
567 		u64 ggtt_addr = xe_lrc_parallel_ggtt_addr(lrc);
568 		struct iosys_map map = xe_lrc_parallel_map(lrc);
569 
570 		info.wq_desc_lo = lower_32_bits(ggtt_addr +
571 			offsetof(struct guc_submit_parallel_scratch, wq_desc));
572 		info.wq_desc_hi = upper_32_bits(ggtt_addr +
573 			offsetof(struct guc_submit_parallel_scratch, wq_desc));
574 		info.wq_base_lo = lower_32_bits(ggtt_addr +
575 			offsetof(struct guc_submit_parallel_scratch, wq[0]));
576 		info.wq_base_hi = upper_32_bits(ggtt_addr +
577 			offsetof(struct guc_submit_parallel_scratch, wq[0]));
578 		info.wq_size = WQ_SIZE;
579 
580 		q->guc->wqi_head = 0;
581 		q->guc->wqi_tail = 0;
582 		xe_map_memset(xe, &map, 0, 0, PARALLEL_SCRATCH_SIZE - WQ_SIZE);
583 		parallel_write(xe, map, wq_desc.wq_status, WQ_STATUS_ACTIVE);
584 	}
585 
586 	/*
587 	 * We must keep a reference for LR engines if engine is registered with
588 	 * the GuC as jobs signal immediately and can't destroy an engine if the
589 	 * GuC has a reference to it.
590 	 */
591 	if (xe_exec_queue_is_lr(q))
592 		xe_exec_queue_get(q);
593 
594 	set_exec_queue_registered(q);
595 	trace_xe_exec_queue_register(q);
596 	if (xe_exec_queue_is_parallel(q))
597 		__register_mlrc_exec_queue(guc, q, &info);
598 	else
599 		__register_exec_queue(guc, &info);
600 	init_policies(guc, q);
601 }
602 
603 static u32 wq_space_until_wrap(struct xe_exec_queue *q)
604 {
605 	return (WQ_SIZE - q->guc->wqi_tail);
606 }
607 
608 static int wq_wait_for_space(struct xe_exec_queue *q, u32 wqi_size)
609 {
610 	struct xe_guc *guc = exec_queue_to_guc(q);
611 	struct xe_device *xe = guc_to_xe(guc);
612 	struct iosys_map map = xe_lrc_parallel_map(q->lrc[0]);
613 	unsigned int sleep_period_ms = 1;
614 
615 #define AVAILABLE_SPACE \
616 	CIRC_SPACE(q->guc->wqi_tail, q->guc->wqi_head, WQ_SIZE)
617 	if (wqi_size > AVAILABLE_SPACE) {
618 try_again:
619 		q->guc->wqi_head = parallel_read(xe, map, wq_desc.head);
620 		if (wqi_size > AVAILABLE_SPACE) {
621 			if (sleep_period_ms == 1024) {
622 				xe_gt_reset_async(q->gt);
623 				return -ENODEV;
624 			}
625 
626 			msleep(sleep_period_ms);
627 			sleep_period_ms <<= 1;
628 			goto try_again;
629 		}
630 	}
631 #undef AVAILABLE_SPACE
632 
633 	return 0;
634 }
635 
636 static int wq_noop_append(struct xe_exec_queue *q)
637 {
638 	struct xe_guc *guc = exec_queue_to_guc(q);
639 	struct xe_device *xe = guc_to_xe(guc);
640 	struct iosys_map map = xe_lrc_parallel_map(q->lrc[0]);
641 	u32 len_dw = wq_space_until_wrap(q) / sizeof(u32) - 1;
642 
643 	if (wq_wait_for_space(q, wq_space_until_wrap(q)))
644 		return -ENODEV;
645 
646 	xe_gt_assert(guc_to_gt(guc), FIELD_FIT(WQ_LEN_MASK, len_dw));
647 
648 	parallel_write(xe, map, wq[q->guc->wqi_tail / sizeof(u32)],
649 		       FIELD_PREP(WQ_TYPE_MASK, WQ_TYPE_NOOP) |
650 		       FIELD_PREP(WQ_LEN_MASK, len_dw));
651 	q->guc->wqi_tail = 0;
652 
653 	return 0;
654 }
655 
656 static void wq_item_append(struct xe_exec_queue *q)
657 {
658 	struct xe_guc *guc = exec_queue_to_guc(q);
659 	struct xe_device *xe = guc_to_xe(guc);
660 	struct iosys_map map = xe_lrc_parallel_map(q->lrc[0]);
661 #define WQ_HEADER_SIZE	4	/* Includes 1 LRC address too */
662 	u32 wqi[XE_HW_ENGINE_MAX_INSTANCE + (WQ_HEADER_SIZE - 1)];
663 	u32 wqi_size = (q->width + (WQ_HEADER_SIZE - 1)) * sizeof(u32);
664 	u32 len_dw = (wqi_size / sizeof(u32)) - 1;
665 	int i = 0, j;
666 
667 	if (wqi_size > wq_space_until_wrap(q)) {
668 		if (wq_noop_append(q))
669 			return;
670 	}
671 	if (wq_wait_for_space(q, wqi_size))
672 		return;
673 
674 	xe_gt_assert(guc_to_gt(guc), i == XE_GUC_CONTEXT_WQ_HEADER_DATA_0_TYPE_LEN);
675 	wqi[i++] = FIELD_PREP(WQ_TYPE_MASK, WQ_TYPE_MULTI_LRC) |
676 		FIELD_PREP(WQ_LEN_MASK, len_dw);
677 	xe_gt_assert(guc_to_gt(guc), i == XE_GUC_CONTEXT_WQ_EL_INFO_DATA_1_CTX_DESC_LOW);
678 	wqi[i++] = xe_lrc_descriptor(q->lrc[0]);
679 	xe_gt_assert(guc_to_gt(guc), i ==
680 		     XE_GUC_CONTEXT_WQ_EL_INFO_DATA_2_GUCCTX_RINGTAIL_FREEZEPOCS);
681 	wqi[i++] = FIELD_PREP(WQ_GUC_ID_MASK, q->guc->id) |
682 		FIELD_PREP(WQ_RING_TAIL_MASK, q->lrc[0]->ring.tail / sizeof(u64));
683 	xe_gt_assert(guc_to_gt(guc), i == XE_GUC_CONTEXT_WQ_EL_INFO_DATA_3_WI_FENCE_ID);
684 	wqi[i++] = 0;
685 	xe_gt_assert(guc_to_gt(guc), i == XE_GUC_CONTEXT_WQ_EL_CHILD_LIST_DATA_4_RINGTAIL);
686 	for (j = 1; j < q->width; ++j) {
687 		struct xe_lrc *lrc = q->lrc[j];
688 
689 		wqi[i++] = lrc->ring.tail / sizeof(u64);
690 	}
691 
692 	xe_gt_assert(guc_to_gt(guc), i == wqi_size / sizeof(u32));
693 
694 	iosys_map_incr(&map, offsetof(struct guc_submit_parallel_scratch,
695 				      wq[q->guc->wqi_tail / sizeof(u32)]));
696 	xe_map_memcpy_to(xe, &map, 0, wqi, wqi_size);
697 	q->guc->wqi_tail += wqi_size;
698 	xe_gt_assert(guc_to_gt(guc), q->guc->wqi_tail <= WQ_SIZE);
699 
700 	xe_device_wmb(xe);
701 
702 	map = xe_lrc_parallel_map(q->lrc[0]);
703 	parallel_write(xe, map, wq_desc.tail, q->guc->wqi_tail);
704 }
705 
706 static int wq_items_rebase(struct xe_exec_queue *q)
707 {
708 	struct xe_guc *guc = exec_queue_to_guc(q);
709 	struct xe_device *xe = guc_to_xe(guc);
710 	struct iosys_map map = xe_lrc_parallel_map(q->lrc[0]);
711 	int i = q->guc->wqi_head;
712 
713 	/* the ring starts after a header struct */
714 	iosys_map_incr(&map, offsetof(struct guc_submit_parallel_scratch, wq[0]));
715 
716 	while ((i % WQ_SIZE) != (q->guc->wqi_tail % WQ_SIZE)) {
717 		u32 len_dw, type, val;
718 
719 		if (drm_WARN_ON_ONCE(&xe->drm, i < 0 || i > 2 * WQ_SIZE))
720 			break;
721 
722 		val = xe_map_rd_ring_u32(xe, &map, i / sizeof(u32) +
723 					 XE_GUC_CONTEXT_WQ_HEADER_DATA_0_TYPE_LEN,
724 					 WQ_SIZE / sizeof(u32));
725 		len_dw = FIELD_GET(WQ_LEN_MASK, val);
726 		type = FIELD_GET(WQ_TYPE_MASK, val);
727 
728 		if (drm_WARN_ON_ONCE(&xe->drm, len_dw >= WQ_SIZE / sizeof(u32)))
729 			break;
730 
731 		if (type == WQ_TYPE_MULTI_LRC) {
732 			val = xe_lrc_descriptor(q->lrc[0]);
733 			xe_map_wr_ring_u32(xe, &map, i / sizeof(u32) +
734 					   XE_GUC_CONTEXT_WQ_EL_INFO_DATA_1_CTX_DESC_LOW,
735 					   WQ_SIZE / sizeof(u32), val);
736 		} else if (drm_WARN_ON_ONCE(&xe->drm, type != WQ_TYPE_NOOP)) {
737 			break;
738 		}
739 
740 		i += (len_dw + 1) * sizeof(u32);
741 	}
742 
743 	if ((i % WQ_SIZE) != (q->guc->wqi_tail % WQ_SIZE)) {
744 		xe_gt_err(q->gt, "Exec queue fixups incomplete - wqi parse failed\n");
745 		return -EBADMSG;
746 	}
747 	return 0;
748 }
749 
750 #define RESUME_PENDING	~0x0ull
751 static void submit_exec_queue(struct xe_exec_queue *q)
752 {
753 	struct xe_guc *guc = exec_queue_to_guc(q);
754 	struct xe_lrc *lrc = q->lrc[0];
755 	u32 action[3];
756 	u32 g2h_len = 0;
757 	u32 num_g2h = 0;
758 	int len = 0;
759 	bool extra_submit = false;
760 
761 	xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q));
762 
763 	if (xe_exec_queue_is_parallel(q))
764 		wq_item_append(q);
765 	else
766 		xe_lrc_set_ring_tail(lrc, lrc->ring.tail);
767 
768 	if (exec_queue_suspended(q) && !xe_exec_queue_is_parallel(q))
769 		return;
770 
771 	if (!exec_queue_enabled(q) && !exec_queue_suspended(q)) {
772 		action[len++] = XE_GUC_ACTION_SCHED_CONTEXT_MODE_SET;
773 		action[len++] = q->guc->id;
774 		action[len++] = GUC_CONTEXT_ENABLE;
775 		g2h_len = G2H_LEN_DW_SCHED_CONTEXT_MODE_SET;
776 		num_g2h = 1;
777 		if (xe_exec_queue_is_parallel(q))
778 			extra_submit = true;
779 
780 		q->guc->resume_time = RESUME_PENDING;
781 		set_exec_queue_pending_enable(q);
782 		set_exec_queue_enabled(q);
783 		trace_xe_exec_queue_scheduling_enable(q);
784 	} else {
785 		action[len++] = XE_GUC_ACTION_SCHED_CONTEXT;
786 		action[len++] = q->guc->id;
787 		trace_xe_exec_queue_submit(q);
788 	}
789 
790 	xe_guc_ct_send(&guc->ct, action, len, g2h_len, num_g2h);
791 
792 	if (extra_submit) {
793 		len = 0;
794 		action[len++] = XE_GUC_ACTION_SCHED_CONTEXT;
795 		action[len++] = q->guc->id;
796 		trace_xe_exec_queue_submit(q);
797 
798 		xe_guc_ct_send(&guc->ct, action, len, 0, 0);
799 	}
800 }
801 
802 static struct dma_fence *
803 guc_exec_queue_run_job(struct drm_sched_job *drm_job)
804 {
805 	struct xe_sched_job *job = to_xe_sched_job(drm_job);
806 	struct xe_exec_queue *q = job->q;
807 	struct xe_guc *guc = exec_queue_to_guc(q);
808 	struct dma_fence *fence = NULL;
809 	bool lr = xe_exec_queue_is_lr(q);
810 
811 	xe_gt_assert(guc_to_gt(guc), !(exec_queue_destroyed(q) || exec_queue_pending_disable(q)) ||
812 		     exec_queue_banned(q) || exec_queue_suspended(q));
813 
814 	trace_xe_sched_job_run(job);
815 
816 	if (!exec_queue_killed_or_banned_or_wedged(q) && !xe_sched_job_is_error(job)) {
817 		if (!exec_queue_registered(q))
818 			register_exec_queue(q, GUC_CONTEXT_NORMAL);
819 		if (!lr)	/* LR jobs are emitted in the exec IOCTL */
820 			q->ring_ops->emit_job(job);
821 		submit_exec_queue(q);
822 	}
823 
824 	if (lr) {
825 		xe_sched_job_set_error(job, -EOPNOTSUPP);
826 		dma_fence_put(job->fence);	/* Drop ref from xe_sched_job_arm */
827 	} else {
828 		fence = job->fence;
829 	}
830 
831 	return fence;
832 }
833 
834 /**
835  * xe_guc_jobs_ring_rebase - Re-emit ring commands of requests pending
836  * on all queues under a guc.
837  * @guc: the &xe_guc struct instance
838  */
839 void xe_guc_jobs_ring_rebase(struct xe_guc *guc)
840 {
841 	struct xe_exec_queue *q;
842 	unsigned long index;
843 
844 	/*
845 	 * This routine is used within VF migration recovery. This means
846 	 * using the lock here introduces a restriction: we cannot wait
847 	 * for any GFX HW response while the lock is taken.
848 	 */
849 	mutex_lock(&guc->submission_state.lock);
850 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
851 		if (exec_queue_killed_or_banned_or_wedged(q))
852 			continue;
853 		xe_exec_queue_jobs_ring_restore(q);
854 	}
855 	mutex_unlock(&guc->submission_state.lock);
856 }
857 
858 static void guc_exec_queue_free_job(struct drm_sched_job *drm_job)
859 {
860 	struct xe_sched_job *job = to_xe_sched_job(drm_job);
861 
862 	trace_xe_sched_job_free(job);
863 	xe_sched_job_put(job);
864 }
865 
866 int xe_guc_read_stopped(struct xe_guc *guc)
867 {
868 	return atomic_read(&guc->submission_state.stopped);
869 }
870 
871 #define MAKE_SCHED_CONTEXT_ACTION(q, enable_disable)			\
872 	u32 action[] = {						\
873 		XE_GUC_ACTION_SCHED_CONTEXT_MODE_SET,			\
874 		q->guc->id,						\
875 		GUC_CONTEXT_##enable_disable,				\
876 	}
877 
878 static void disable_scheduling_deregister(struct xe_guc *guc,
879 					  struct xe_exec_queue *q)
880 {
881 	MAKE_SCHED_CONTEXT_ACTION(q, DISABLE);
882 	int ret;
883 
884 	set_min_preemption_timeout(guc, q);
885 	smp_rmb();
886 	ret = wait_event_timeout(guc->ct.wq,
887 				 (!exec_queue_pending_enable(q) &&
888 				  !exec_queue_pending_disable(q)) ||
889 					 xe_guc_read_stopped(guc),
890 				 HZ * 5);
891 	if (!ret) {
892 		struct xe_gpu_scheduler *sched = &q->guc->sched;
893 
894 		xe_gt_warn(q->gt, "Pending enable/disable failed to respond\n");
895 		xe_sched_submission_start(sched);
896 		xe_gt_reset_async(q->gt);
897 		xe_sched_tdr_queue_imm(sched);
898 		return;
899 	}
900 
901 	clear_exec_queue_enabled(q);
902 	set_exec_queue_pending_disable(q);
903 	set_exec_queue_destroyed(q);
904 	trace_xe_exec_queue_scheduling_disable(q);
905 
906 	/*
907 	 * Reserve space for both G2H here as the 2nd G2H is sent from a G2H
908 	 * handler and we are not allowed to reserved G2H space in handlers.
909 	 */
910 	xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action),
911 		       G2H_LEN_DW_SCHED_CONTEXT_MODE_SET +
912 		       G2H_LEN_DW_DEREGISTER_CONTEXT, 2);
913 }
914 
915 static void xe_guc_exec_queue_trigger_cleanup(struct xe_exec_queue *q)
916 {
917 	struct xe_guc *guc = exec_queue_to_guc(q);
918 	struct xe_device *xe = guc_to_xe(guc);
919 
920 	/** to wakeup xe_wait_user_fence ioctl if exec queue is reset */
921 	wake_up_all(&xe->ufence_wq);
922 
923 	if (xe_exec_queue_is_lr(q))
924 		queue_work(guc_to_gt(guc)->ordered_wq, &q->guc->lr_tdr);
925 	else
926 		xe_sched_tdr_queue_imm(&q->guc->sched);
927 }
928 
929 /**
930  * xe_guc_submit_wedge() - Wedge GuC submission
931  * @guc: the GuC object
932  *
933  * Save exec queue's registered with GuC state by taking a ref to each queue.
934  * Register a DRMM handler to drop refs upon driver unload.
935  */
936 void xe_guc_submit_wedge(struct xe_guc *guc)
937 {
938 	struct xe_gt *gt = guc_to_gt(guc);
939 	struct xe_exec_queue *q;
940 	unsigned long index;
941 	int err;
942 
943 	xe_gt_assert(guc_to_gt(guc), guc_to_xe(guc)->wedged.mode);
944 
945 	/*
946 	 * If device is being wedged even before submission_state is
947 	 * initialized, there's nothing to do here.
948 	 */
949 	if (!guc->submission_state.initialized)
950 		return;
951 
952 	err = devm_add_action_or_reset(guc_to_xe(guc)->drm.dev,
953 				       guc_submit_wedged_fini, guc);
954 	if (err) {
955 		xe_gt_err(gt, "Failed to register clean-up on wedged.mode=2; "
956 			  "Although device is wedged.\n");
957 		return;
958 	}
959 
960 	mutex_lock(&guc->submission_state.lock);
961 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
962 		if (xe_exec_queue_get_unless_zero(q))
963 			set_exec_queue_wedged(q);
964 	mutex_unlock(&guc->submission_state.lock);
965 }
966 
967 static bool guc_submit_hint_wedged(struct xe_guc *guc)
968 {
969 	struct xe_device *xe = guc_to_xe(guc);
970 
971 	if (xe->wedged.mode != 2)
972 		return false;
973 
974 	if (xe_device_wedged(xe))
975 		return true;
976 
977 	xe_device_declare_wedged(xe);
978 
979 	return true;
980 }
981 
982 static void xe_guc_exec_queue_lr_cleanup(struct work_struct *w)
983 {
984 	struct xe_guc_exec_queue *ge =
985 		container_of(w, struct xe_guc_exec_queue, lr_tdr);
986 	struct xe_exec_queue *q = ge->q;
987 	struct xe_guc *guc = exec_queue_to_guc(q);
988 	struct xe_gpu_scheduler *sched = &ge->sched;
989 	bool wedged = false;
990 
991 	xe_gt_assert(guc_to_gt(guc), xe_exec_queue_is_lr(q));
992 	trace_xe_exec_queue_lr_cleanup(q);
993 
994 	if (!exec_queue_killed(q))
995 		wedged = guc_submit_hint_wedged(exec_queue_to_guc(q));
996 
997 	/* Kill the run_job / process_msg entry points */
998 	xe_sched_submission_stop(sched);
999 
1000 	/*
1001 	 * Engine state now mostly stable, disable scheduling / deregister if
1002 	 * needed. This cleanup routine might be called multiple times, where
1003 	 * the actual async engine deregister drops the final engine ref.
1004 	 * Calling disable_scheduling_deregister will mark the engine as
1005 	 * destroyed and fire off the CT requests to disable scheduling /
1006 	 * deregister, which we only want to do once. We also don't want to mark
1007 	 * the engine as pending_disable again as this may race with the
1008 	 * xe_guc_deregister_done_handler() which treats it as an unexpected
1009 	 * state.
1010 	 */
1011 	if (!wedged && exec_queue_registered(q) && !exec_queue_destroyed(q)) {
1012 		struct xe_guc *guc = exec_queue_to_guc(q);
1013 		int ret;
1014 
1015 		set_exec_queue_banned(q);
1016 		disable_scheduling_deregister(guc, q);
1017 
1018 		/*
1019 		 * Must wait for scheduling to be disabled before signalling
1020 		 * any fences, if GT broken the GT reset code should signal us.
1021 		 */
1022 		ret = wait_event_timeout(guc->ct.wq,
1023 					 !exec_queue_pending_disable(q) ||
1024 					 xe_guc_read_stopped(guc), HZ * 5);
1025 		if (!ret) {
1026 			xe_gt_warn(q->gt, "Schedule disable failed to respond, guc_id=%d\n",
1027 				   q->guc->id);
1028 			xe_devcoredump(q, NULL, "Schedule disable failed to respond, guc_id=%d\n",
1029 				       q->guc->id);
1030 			xe_sched_submission_start(sched);
1031 			xe_gt_reset_async(q->gt);
1032 			return;
1033 		}
1034 	}
1035 
1036 	if (!exec_queue_killed(q) && !xe_lrc_ring_is_idle(q->lrc[0]))
1037 		xe_devcoredump(q, NULL, "LR job cleanup, guc_id=%d", q->guc->id);
1038 
1039 	xe_sched_submission_start(sched);
1040 }
1041 
1042 #define ADJUST_FIVE_PERCENT(__t)	mul_u64_u32_div(__t, 105, 100)
1043 
1044 static bool check_timeout(struct xe_exec_queue *q, struct xe_sched_job *job)
1045 {
1046 	struct xe_gt *gt = guc_to_gt(exec_queue_to_guc(q));
1047 	u32 ctx_timestamp, ctx_job_timestamp;
1048 	u32 timeout_ms = q->sched_props.job_timeout_ms;
1049 	u32 diff;
1050 	u64 running_time_ms;
1051 
1052 	if (!xe_sched_job_started(job)) {
1053 		xe_gt_warn(gt, "Check job timeout: seqno=%u, lrc_seqno=%u, guc_id=%d, not started",
1054 			   xe_sched_job_seqno(job), xe_sched_job_lrc_seqno(job),
1055 			   q->guc->id);
1056 
1057 		return xe_sched_invalidate_job(job, 2);
1058 	}
1059 
1060 	ctx_timestamp = lower_32_bits(xe_lrc_ctx_timestamp(q->lrc[0]));
1061 	ctx_job_timestamp = xe_lrc_ctx_job_timestamp(q->lrc[0]);
1062 
1063 	/*
1064 	 * Counter wraps at ~223s at the usual 19.2MHz, be paranoid catch
1065 	 * possible overflows with a high timeout.
1066 	 */
1067 	xe_gt_assert(gt, timeout_ms < 100 * MSEC_PER_SEC);
1068 
1069 	diff = ctx_timestamp - ctx_job_timestamp;
1070 
1071 	/*
1072 	 * Ensure timeout is within 5% to account for an GuC scheduling latency
1073 	 */
1074 	running_time_ms =
1075 		ADJUST_FIVE_PERCENT(xe_gt_clock_interval_to_ms(gt, diff));
1076 
1077 	xe_gt_dbg(gt,
1078 		  "Check job timeout: seqno=%u, lrc_seqno=%u, guc_id=%d, running_time_ms=%llu, timeout_ms=%u, diff=0x%08x",
1079 		  xe_sched_job_seqno(job), xe_sched_job_lrc_seqno(job),
1080 		  q->guc->id, running_time_ms, timeout_ms, diff);
1081 
1082 	return running_time_ms >= timeout_ms;
1083 }
1084 
1085 static void enable_scheduling(struct xe_exec_queue *q)
1086 {
1087 	MAKE_SCHED_CONTEXT_ACTION(q, ENABLE);
1088 	struct xe_guc *guc = exec_queue_to_guc(q);
1089 	int ret;
1090 
1091 	xe_gt_assert(guc_to_gt(guc), !exec_queue_destroyed(q));
1092 	xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q));
1093 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_disable(q));
1094 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_enable(q));
1095 
1096 	set_exec_queue_pending_enable(q);
1097 	set_exec_queue_enabled(q);
1098 	trace_xe_exec_queue_scheduling_enable(q);
1099 
1100 	xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action),
1101 		       G2H_LEN_DW_SCHED_CONTEXT_MODE_SET, 1);
1102 
1103 	ret = wait_event_timeout(guc->ct.wq,
1104 				 !exec_queue_pending_enable(q) ||
1105 				 xe_guc_read_stopped(guc), HZ * 5);
1106 	if (!ret || xe_guc_read_stopped(guc)) {
1107 		xe_gt_warn(guc_to_gt(guc), "Schedule enable failed to respond");
1108 		set_exec_queue_banned(q);
1109 		xe_gt_reset_async(q->gt);
1110 		xe_sched_tdr_queue_imm(&q->guc->sched);
1111 	}
1112 }
1113 
1114 static void disable_scheduling(struct xe_exec_queue *q, bool immediate)
1115 {
1116 	MAKE_SCHED_CONTEXT_ACTION(q, DISABLE);
1117 	struct xe_guc *guc = exec_queue_to_guc(q);
1118 
1119 	xe_gt_assert(guc_to_gt(guc), !exec_queue_destroyed(q));
1120 	xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q));
1121 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_disable(q));
1122 
1123 	if (immediate)
1124 		set_min_preemption_timeout(guc, q);
1125 	clear_exec_queue_enabled(q);
1126 	set_exec_queue_pending_disable(q);
1127 	trace_xe_exec_queue_scheduling_disable(q);
1128 
1129 	xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action),
1130 		       G2H_LEN_DW_SCHED_CONTEXT_MODE_SET, 1);
1131 }
1132 
1133 static void __deregister_exec_queue(struct xe_guc *guc, struct xe_exec_queue *q)
1134 {
1135 	u32 action[] = {
1136 		XE_GUC_ACTION_DEREGISTER_CONTEXT,
1137 		q->guc->id,
1138 	};
1139 
1140 	xe_gt_assert(guc_to_gt(guc), !exec_queue_destroyed(q));
1141 	xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q));
1142 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_enable(q));
1143 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_disable(q));
1144 
1145 	set_exec_queue_destroyed(q);
1146 	trace_xe_exec_queue_deregister(q);
1147 
1148 	xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action),
1149 		       G2H_LEN_DW_DEREGISTER_CONTEXT, 1);
1150 }
1151 
1152 static enum drm_gpu_sched_stat
1153 guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
1154 {
1155 	struct xe_sched_job *job = to_xe_sched_job(drm_job);
1156 	struct xe_sched_job *tmp_job;
1157 	struct xe_exec_queue *q = job->q;
1158 	struct xe_gpu_scheduler *sched = &q->guc->sched;
1159 	struct xe_guc *guc = exec_queue_to_guc(q);
1160 	const char *process_name = "no process";
1161 	struct xe_device *xe = guc_to_xe(guc);
1162 	unsigned int fw_ref;
1163 	int err = -ETIME;
1164 	pid_t pid = -1;
1165 	int i = 0;
1166 	bool wedged = false, skip_timeout_check;
1167 
1168 	/*
1169 	 * TDR has fired before free job worker. Common if exec queue
1170 	 * immediately closed after last fence signaled. Add back to pending
1171 	 * list so job can be freed and kick scheduler ensuring free job is not
1172 	 * lost.
1173 	 */
1174 	if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &job->fence->flags))
1175 		return DRM_GPU_SCHED_STAT_NO_HANG;
1176 
1177 	/* Kill the run_job entry point */
1178 	xe_sched_submission_stop(sched);
1179 
1180 	/* Must check all state after stopping scheduler */
1181 	skip_timeout_check = exec_queue_reset(q) ||
1182 		exec_queue_killed_or_banned_or_wedged(q) ||
1183 		exec_queue_destroyed(q);
1184 
1185 	/*
1186 	 * If devcoredump not captured and GuC capture for the job is not ready
1187 	 * do manual capture first and decide later if we need to use it
1188 	 */
1189 	if (!exec_queue_killed(q) && !xe->devcoredump.captured &&
1190 	    !xe_guc_capture_get_matching_and_lock(q)) {
1191 		/* take force wake before engine register manual capture */
1192 		fw_ref = xe_force_wake_get(gt_to_fw(q->gt), XE_FORCEWAKE_ALL);
1193 		if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL))
1194 			xe_gt_info(q->gt, "failed to get forcewake for coredump capture\n");
1195 
1196 		xe_engine_snapshot_capture_for_queue(q);
1197 
1198 		xe_force_wake_put(gt_to_fw(q->gt), fw_ref);
1199 	}
1200 
1201 	/*
1202 	 * XXX: Sampling timeout doesn't work in wedged mode as we have to
1203 	 * modify scheduling state to read timestamp. We could read the
1204 	 * timestamp from a register to accumulate current running time but this
1205 	 * doesn't work for SRIOV. For now assuming timeouts in wedged mode are
1206 	 * genuine timeouts.
1207 	 */
1208 	if (!exec_queue_killed(q))
1209 		wedged = guc_submit_hint_wedged(exec_queue_to_guc(q));
1210 
1211 	/* Engine state now stable, disable scheduling to check timestamp */
1212 	if (!wedged && exec_queue_registered(q)) {
1213 		int ret;
1214 
1215 		if (exec_queue_reset(q))
1216 			err = -EIO;
1217 
1218 		if (!exec_queue_destroyed(q)) {
1219 			/*
1220 			 * Wait for any pending G2H to flush out before
1221 			 * modifying state
1222 			 */
1223 			ret = wait_event_timeout(guc->ct.wq,
1224 						 (!exec_queue_pending_enable(q) &&
1225 						  !exec_queue_pending_disable(q)) ||
1226 						 xe_guc_read_stopped(guc), HZ * 5);
1227 			if (!ret || xe_guc_read_stopped(guc))
1228 				goto trigger_reset;
1229 
1230 			/*
1231 			 * Flag communicates to G2H handler that schedule
1232 			 * disable originated from a timeout check. The G2H then
1233 			 * avoid triggering cleanup or deregistering the exec
1234 			 * queue.
1235 			 */
1236 			set_exec_queue_check_timeout(q);
1237 			disable_scheduling(q, skip_timeout_check);
1238 		}
1239 
1240 		/*
1241 		 * Must wait for scheduling to be disabled before signalling
1242 		 * any fences, if GT broken the GT reset code should signal us.
1243 		 *
1244 		 * FIXME: Tests can generate a ton of 0x6000 (IOMMU CAT fault
1245 		 * error) messages which can cause the schedule disable to get
1246 		 * lost. If this occurs, trigger a GT reset to recover.
1247 		 */
1248 		smp_rmb();
1249 		ret = wait_event_timeout(guc->ct.wq,
1250 					 !exec_queue_pending_disable(q) ||
1251 					 xe_guc_read_stopped(guc), HZ * 5);
1252 		if (!ret || xe_guc_read_stopped(guc)) {
1253 trigger_reset:
1254 			if (!ret)
1255 				xe_gt_warn(guc_to_gt(guc),
1256 					   "Schedule disable failed to respond, guc_id=%d",
1257 					   q->guc->id);
1258 			xe_devcoredump(q, job,
1259 				       "Schedule disable failed to respond, guc_id=%d, ret=%d, guc_read=%d",
1260 				       q->guc->id, ret, xe_guc_read_stopped(guc));
1261 			set_exec_queue_extra_ref(q);
1262 			xe_exec_queue_get(q);	/* GT reset owns this */
1263 			set_exec_queue_banned(q);
1264 			xe_gt_reset_async(q->gt);
1265 			xe_sched_tdr_queue_imm(sched);
1266 			goto rearm;
1267 		}
1268 	}
1269 
1270 	/*
1271 	 * Check if job is actually timed out, if so restart job execution and TDR
1272 	 */
1273 	if (!wedged && !skip_timeout_check && !check_timeout(q, job) &&
1274 	    !exec_queue_reset(q) && exec_queue_registered(q)) {
1275 		clear_exec_queue_check_timeout(q);
1276 		goto sched_enable;
1277 	}
1278 
1279 	if (q->vm && q->vm->xef) {
1280 		process_name = q->vm->xef->process_name;
1281 		pid = q->vm->xef->pid;
1282 	}
1283 
1284 	if (!exec_queue_killed(q))
1285 		xe_gt_notice(guc_to_gt(guc),
1286 			     "Timedout job: seqno=%u, lrc_seqno=%u, guc_id=%d, flags=0x%lx in %s [%d]",
1287 			     xe_sched_job_seqno(job), xe_sched_job_lrc_seqno(job),
1288 			     q->guc->id, q->flags, process_name, pid);
1289 
1290 	trace_xe_sched_job_timedout(job);
1291 
1292 	if (!exec_queue_killed(q))
1293 		xe_devcoredump(q, job,
1294 			       "Timedout job - seqno=%u, lrc_seqno=%u, guc_id=%d, flags=0x%lx",
1295 			       xe_sched_job_seqno(job), xe_sched_job_lrc_seqno(job),
1296 			       q->guc->id, q->flags);
1297 
1298 	/*
1299 	 * Kernel jobs should never fail, nor should VM jobs if they do
1300 	 * somethings has gone wrong and the GT needs a reset
1301 	 */
1302 	xe_gt_WARN(q->gt, q->flags & EXEC_QUEUE_FLAG_KERNEL,
1303 		   "Kernel-submitted job timed out\n");
1304 	xe_gt_WARN(q->gt, q->flags & EXEC_QUEUE_FLAG_VM && !exec_queue_killed(q),
1305 		   "VM job timed out on non-killed execqueue\n");
1306 	if (!wedged && (q->flags & EXEC_QUEUE_FLAG_KERNEL ||
1307 			(q->flags & EXEC_QUEUE_FLAG_VM && !exec_queue_killed(q)))) {
1308 		if (!xe_sched_invalidate_job(job, 2)) {
1309 			clear_exec_queue_check_timeout(q);
1310 			xe_gt_reset_async(q->gt);
1311 			goto rearm;
1312 		}
1313 	}
1314 
1315 	/* Finish cleaning up exec queue via deregister */
1316 	set_exec_queue_banned(q);
1317 	if (!wedged && exec_queue_registered(q) && !exec_queue_destroyed(q)) {
1318 		set_exec_queue_extra_ref(q);
1319 		xe_exec_queue_get(q);
1320 		__deregister_exec_queue(guc, q);
1321 	}
1322 
1323 	/* Stop fence signaling */
1324 	xe_hw_fence_irq_stop(q->fence_irq);
1325 
1326 	/*
1327 	 * Fence state now stable, stop / start scheduler which cleans up any
1328 	 * fences that are complete
1329 	 */
1330 	xe_sched_add_pending_job(sched, job);
1331 	xe_sched_submission_start(sched);
1332 
1333 	xe_guc_exec_queue_trigger_cleanup(q);
1334 
1335 	/* Mark all outstanding jobs as bad, thus completing them */
1336 	spin_lock(&sched->base.job_list_lock);
1337 	list_for_each_entry(tmp_job, &sched->base.pending_list, drm.list)
1338 		xe_sched_job_set_error(tmp_job, !i++ ? err : -ECANCELED);
1339 	spin_unlock(&sched->base.job_list_lock);
1340 
1341 	/* Start fence signaling */
1342 	xe_hw_fence_irq_start(q->fence_irq);
1343 
1344 	return DRM_GPU_SCHED_STAT_RESET;
1345 
1346 sched_enable:
1347 	enable_scheduling(q);
1348 rearm:
1349 	/*
1350 	 * XXX: Ideally want to adjust timeout based on current execution time
1351 	 * but there is not currently an easy way to do in DRM scheduler. With
1352 	 * some thought, do this in a follow up.
1353 	 */
1354 	xe_sched_submission_start(sched);
1355 	return DRM_GPU_SCHED_STAT_NO_HANG;
1356 }
1357 
1358 static void __guc_exec_queue_fini_async(struct work_struct *w)
1359 {
1360 	struct xe_guc_exec_queue *ge =
1361 		container_of(w, struct xe_guc_exec_queue, fini_async);
1362 	struct xe_exec_queue *q = ge->q;
1363 	struct xe_guc *guc = exec_queue_to_guc(q);
1364 
1365 	xe_pm_runtime_get(guc_to_xe(guc));
1366 	trace_xe_exec_queue_destroy(q);
1367 
1368 	release_guc_id(guc, q);
1369 	if (xe_exec_queue_is_lr(q))
1370 		cancel_work_sync(&ge->lr_tdr);
1371 	/* Confirm no work left behind accessing device structures */
1372 	cancel_delayed_work_sync(&ge->sched.base.work_tdr);
1373 	xe_sched_entity_fini(&ge->entity);
1374 	xe_sched_fini(&ge->sched);
1375 
1376 	/*
1377 	 * RCU free due sched being exported via DRM scheduler fences
1378 	 * (timeline name).
1379 	 */
1380 	kfree_rcu(ge, rcu);
1381 	xe_exec_queue_fini(q);
1382 	xe_pm_runtime_put(guc_to_xe(guc));
1383 }
1384 
1385 static void guc_exec_queue_fini_async(struct xe_exec_queue *q)
1386 {
1387 	struct xe_guc *guc = exec_queue_to_guc(q);
1388 	struct xe_device *xe = guc_to_xe(guc);
1389 
1390 	INIT_WORK(&q->guc->fini_async, __guc_exec_queue_fini_async);
1391 
1392 	/* We must block on kernel engines so slabs are empty on driver unload */
1393 	if (q->flags & EXEC_QUEUE_FLAG_PERMANENT || exec_queue_wedged(q))
1394 		__guc_exec_queue_fini_async(&q->guc->fini_async);
1395 	else
1396 		queue_work(xe->destroy_wq, &q->guc->fini_async);
1397 }
1398 
1399 static void __guc_exec_queue_fini(struct xe_guc *guc, struct xe_exec_queue *q)
1400 {
1401 	/*
1402 	 * Might be done from within the GPU scheduler, need to do async as we
1403 	 * fini the scheduler when the engine is fini'd, the scheduler can't
1404 	 * complete fini within itself (circular dependency). Async resolves
1405 	 * this we and don't really care when everything is fini'd, just that it
1406 	 * is.
1407 	 */
1408 	guc_exec_queue_fini_async(q);
1409 }
1410 
1411 static void __guc_exec_queue_process_msg_cleanup(struct xe_sched_msg *msg)
1412 {
1413 	struct xe_exec_queue *q = msg->private_data;
1414 	struct xe_guc *guc = exec_queue_to_guc(q);
1415 
1416 	xe_gt_assert(guc_to_gt(guc), !(q->flags & EXEC_QUEUE_FLAG_PERMANENT));
1417 	trace_xe_exec_queue_cleanup_entity(q);
1418 
1419 	if (exec_queue_registered(q))
1420 		disable_scheduling_deregister(guc, q);
1421 	else
1422 		__guc_exec_queue_fini(guc, q);
1423 }
1424 
1425 static bool guc_exec_queue_allowed_to_change_state(struct xe_exec_queue *q)
1426 {
1427 	return !exec_queue_killed_or_banned_or_wedged(q) && exec_queue_registered(q);
1428 }
1429 
1430 static void __guc_exec_queue_process_msg_set_sched_props(struct xe_sched_msg *msg)
1431 {
1432 	struct xe_exec_queue *q = msg->private_data;
1433 	struct xe_guc *guc = exec_queue_to_guc(q);
1434 
1435 	if (guc_exec_queue_allowed_to_change_state(q))
1436 		init_policies(guc, q);
1437 	kfree(msg);
1438 }
1439 
1440 static void __suspend_fence_signal(struct xe_exec_queue *q)
1441 {
1442 	if (!q->guc->suspend_pending)
1443 		return;
1444 
1445 	WRITE_ONCE(q->guc->suspend_pending, false);
1446 	wake_up(&q->guc->suspend_wait);
1447 }
1448 
1449 static void suspend_fence_signal(struct xe_exec_queue *q)
1450 {
1451 	struct xe_guc *guc = exec_queue_to_guc(q);
1452 
1453 	xe_gt_assert(guc_to_gt(guc), exec_queue_suspended(q) || exec_queue_killed(q) ||
1454 		     xe_guc_read_stopped(guc));
1455 	xe_gt_assert(guc_to_gt(guc), q->guc->suspend_pending);
1456 
1457 	__suspend_fence_signal(q);
1458 }
1459 
1460 static void __guc_exec_queue_process_msg_suspend(struct xe_sched_msg *msg)
1461 {
1462 	struct xe_exec_queue *q = msg->private_data;
1463 	struct xe_guc *guc = exec_queue_to_guc(q);
1464 
1465 	if (guc_exec_queue_allowed_to_change_state(q) && !exec_queue_suspended(q) &&
1466 	    exec_queue_enabled(q)) {
1467 		wait_event(guc->ct.wq, (q->guc->resume_time != RESUME_PENDING ||
1468 			   xe_guc_read_stopped(guc)) && !exec_queue_pending_disable(q));
1469 
1470 		if (!xe_guc_read_stopped(guc)) {
1471 			s64 since_resume_ms =
1472 				ktime_ms_delta(ktime_get(),
1473 					       q->guc->resume_time);
1474 			s64 wait_ms = q->vm->preempt.min_run_period_ms -
1475 				since_resume_ms;
1476 
1477 			if (wait_ms > 0 && q->guc->resume_time)
1478 				msleep(wait_ms);
1479 
1480 			set_exec_queue_suspended(q);
1481 			disable_scheduling(q, false);
1482 		}
1483 	} else if (q->guc->suspend_pending) {
1484 		set_exec_queue_suspended(q);
1485 		suspend_fence_signal(q);
1486 	}
1487 }
1488 
1489 static void __guc_exec_queue_process_msg_resume(struct xe_sched_msg *msg)
1490 {
1491 	struct xe_exec_queue *q = msg->private_data;
1492 
1493 	if (guc_exec_queue_allowed_to_change_state(q)) {
1494 		clear_exec_queue_suspended(q);
1495 		if (!exec_queue_enabled(q)) {
1496 			q->guc->resume_time = RESUME_PENDING;
1497 			enable_scheduling(q);
1498 		}
1499 	} else {
1500 		clear_exec_queue_suspended(q);
1501 	}
1502 }
1503 
1504 #define CLEANUP		1	/* Non-zero values to catch uninitialized msg */
1505 #define SET_SCHED_PROPS	2
1506 #define SUSPEND		3
1507 #define RESUME		4
1508 #define OPCODE_MASK	0xf
1509 #define MSG_LOCKED	BIT(8)
1510 
1511 static void guc_exec_queue_process_msg(struct xe_sched_msg *msg)
1512 {
1513 	struct xe_device *xe = guc_to_xe(exec_queue_to_guc(msg->private_data));
1514 
1515 	trace_xe_sched_msg_recv(msg);
1516 
1517 	switch (msg->opcode) {
1518 	case CLEANUP:
1519 		__guc_exec_queue_process_msg_cleanup(msg);
1520 		break;
1521 	case SET_SCHED_PROPS:
1522 		__guc_exec_queue_process_msg_set_sched_props(msg);
1523 		break;
1524 	case SUSPEND:
1525 		__guc_exec_queue_process_msg_suspend(msg);
1526 		break;
1527 	case RESUME:
1528 		__guc_exec_queue_process_msg_resume(msg);
1529 		break;
1530 	default:
1531 		XE_WARN_ON("Unknown message type");
1532 	}
1533 
1534 	xe_pm_runtime_put(xe);
1535 }
1536 
1537 static const struct drm_sched_backend_ops drm_sched_ops = {
1538 	.run_job = guc_exec_queue_run_job,
1539 	.free_job = guc_exec_queue_free_job,
1540 	.timedout_job = guc_exec_queue_timedout_job,
1541 };
1542 
1543 static const struct xe_sched_backend_ops xe_sched_ops = {
1544 	.process_msg = guc_exec_queue_process_msg,
1545 };
1546 
1547 static int guc_exec_queue_init(struct xe_exec_queue *q)
1548 {
1549 	struct xe_gpu_scheduler *sched;
1550 	struct xe_guc *guc = exec_queue_to_guc(q);
1551 	struct xe_guc_exec_queue *ge;
1552 	long timeout;
1553 	int err, i;
1554 
1555 	xe_gt_assert(guc_to_gt(guc), xe_device_uc_enabled(guc_to_xe(guc)));
1556 
1557 	ge = kzalloc(sizeof(*ge), GFP_KERNEL);
1558 	if (!ge)
1559 		return -ENOMEM;
1560 
1561 	q->guc = ge;
1562 	ge->q = q;
1563 	init_rcu_head(&ge->rcu);
1564 	init_waitqueue_head(&ge->suspend_wait);
1565 
1566 	for (i = 0; i < MAX_STATIC_MSG_TYPE; ++i)
1567 		INIT_LIST_HEAD(&ge->static_msgs[i].link);
1568 
1569 	timeout = (q->vm && xe_vm_in_lr_mode(q->vm)) ? MAX_SCHEDULE_TIMEOUT :
1570 		  msecs_to_jiffies(q->sched_props.job_timeout_ms);
1571 	err = xe_sched_init(&ge->sched, &drm_sched_ops, &xe_sched_ops,
1572 			    NULL, q->lrc[0]->ring.size / MAX_JOB_SIZE_BYTES, 64,
1573 			    timeout, guc_to_gt(guc)->ordered_wq, NULL,
1574 			    q->name, gt_to_xe(q->gt)->drm.dev);
1575 	if (err)
1576 		goto err_free;
1577 
1578 	sched = &ge->sched;
1579 	err = xe_sched_entity_init(&ge->entity, sched);
1580 	if (err)
1581 		goto err_sched;
1582 
1583 	if (xe_exec_queue_is_lr(q))
1584 		INIT_WORK(&q->guc->lr_tdr, xe_guc_exec_queue_lr_cleanup);
1585 
1586 	mutex_lock(&guc->submission_state.lock);
1587 
1588 	err = alloc_guc_id(guc, q);
1589 	if (err)
1590 		goto err_entity;
1591 
1592 	q->entity = &ge->entity;
1593 
1594 	if (xe_guc_read_stopped(guc))
1595 		xe_sched_stop(sched);
1596 
1597 	mutex_unlock(&guc->submission_state.lock);
1598 
1599 	xe_exec_queue_assign_name(q, q->guc->id);
1600 
1601 	trace_xe_exec_queue_create(q);
1602 
1603 	return 0;
1604 
1605 err_entity:
1606 	mutex_unlock(&guc->submission_state.lock);
1607 	xe_sched_entity_fini(&ge->entity);
1608 err_sched:
1609 	xe_sched_fini(&ge->sched);
1610 err_free:
1611 	kfree(ge);
1612 
1613 	return err;
1614 }
1615 
1616 static void guc_exec_queue_kill(struct xe_exec_queue *q)
1617 {
1618 	trace_xe_exec_queue_kill(q);
1619 	set_exec_queue_killed(q);
1620 	__suspend_fence_signal(q);
1621 	xe_guc_exec_queue_trigger_cleanup(q);
1622 }
1623 
1624 static void guc_exec_queue_add_msg(struct xe_exec_queue *q, struct xe_sched_msg *msg,
1625 				   u32 opcode)
1626 {
1627 	xe_pm_runtime_get_noresume(guc_to_xe(exec_queue_to_guc(q)));
1628 
1629 	INIT_LIST_HEAD(&msg->link);
1630 	msg->opcode = opcode & OPCODE_MASK;
1631 	msg->private_data = q;
1632 
1633 	trace_xe_sched_msg_add(msg);
1634 	if (opcode & MSG_LOCKED)
1635 		xe_sched_add_msg_locked(&q->guc->sched, msg);
1636 	else
1637 		xe_sched_add_msg(&q->guc->sched, msg);
1638 }
1639 
1640 static bool guc_exec_queue_try_add_msg(struct xe_exec_queue *q,
1641 				       struct xe_sched_msg *msg,
1642 				       u32 opcode)
1643 {
1644 	if (!list_empty(&msg->link))
1645 		return false;
1646 
1647 	guc_exec_queue_add_msg(q, msg, opcode | MSG_LOCKED);
1648 
1649 	return true;
1650 }
1651 
1652 #define STATIC_MSG_CLEANUP	0
1653 #define STATIC_MSG_SUSPEND	1
1654 #define STATIC_MSG_RESUME	2
1655 static void guc_exec_queue_fini(struct xe_exec_queue *q)
1656 {
1657 	struct xe_sched_msg *msg = q->guc->static_msgs + STATIC_MSG_CLEANUP;
1658 
1659 	if (!(q->flags & EXEC_QUEUE_FLAG_PERMANENT) && !exec_queue_wedged(q))
1660 		guc_exec_queue_add_msg(q, msg, CLEANUP);
1661 	else
1662 		__guc_exec_queue_fini(exec_queue_to_guc(q), q);
1663 }
1664 
1665 static int guc_exec_queue_set_priority(struct xe_exec_queue *q,
1666 				       enum xe_exec_queue_priority priority)
1667 {
1668 	struct xe_sched_msg *msg;
1669 
1670 	if (q->sched_props.priority == priority ||
1671 	    exec_queue_killed_or_banned_or_wedged(q))
1672 		return 0;
1673 
1674 	msg = kmalloc(sizeof(*msg), GFP_KERNEL);
1675 	if (!msg)
1676 		return -ENOMEM;
1677 
1678 	q->sched_props.priority = priority;
1679 	guc_exec_queue_add_msg(q, msg, SET_SCHED_PROPS);
1680 
1681 	return 0;
1682 }
1683 
1684 static int guc_exec_queue_set_timeslice(struct xe_exec_queue *q, u32 timeslice_us)
1685 {
1686 	struct xe_sched_msg *msg;
1687 
1688 	if (q->sched_props.timeslice_us == timeslice_us ||
1689 	    exec_queue_killed_or_banned_or_wedged(q))
1690 		return 0;
1691 
1692 	msg = kmalloc(sizeof(*msg), GFP_KERNEL);
1693 	if (!msg)
1694 		return -ENOMEM;
1695 
1696 	q->sched_props.timeslice_us = timeslice_us;
1697 	guc_exec_queue_add_msg(q, msg, SET_SCHED_PROPS);
1698 
1699 	return 0;
1700 }
1701 
1702 static int guc_exec_queue_set_preempt_timeout(struct xe_exec_queue *q,
1703 					      u32 preempt_timeout_us)
1704 {
1705 	struct xe_sched_msg *msg;
1706 
1707 	if (q->sched_props.preempt_timeout_us == preempt_timeout_us ||
1708 	    exec_queue_killed_or_banned_or_wedged(q))
1709 		return 0;
1710 
1711 	msg = kmalloc(sizeof(*msg), GFP_KERNEL);
1712 	if (!msg)
1713 		return -ENOMEM;
1714 
1715 	q->sched_props.preempt_timeout_us = preempt_timeout_us;
1716 	guc_exec_queue_add_msg(q, msg, SET_SCHED_PROPS);
1717 
1718 	return 0;
1719 }
1720 
1721 static int guc_exec_queue_suspend(struct xe_exec_queue *q)
1722 {
1723 	struct xe_gpu_scheduler *sched = &q->guc->sched;
1724 	struct xe_sched_msg *msg = q->guc->static_msgs + STATIC_MSG_SUSPEND;
1725 
1726 	if (exec_queue_killed_or_banned_or_wedged(q))
1727 		return -EINVAL;
1728 
1729 	xe_sched_msg_lock(sched);
1730 	if (guc_exec_queue_try_add_msg(q, msg, SUSPEND))
1731 		q->guc->suspend_pending = true;
1732 	xe_sched_msg_unlock(sched);
1733 
1734 	return 0;
1735 }
1736 
1737 static int guc_exec_queue_suspend_wait(struct xe_exec_queue *q)
1738 {
1739 	struct xe_guc *guc = exec_queue_to_guc(q);
1740 	int ret;
1741 
1742 	/*
1743 	 * Likely don't need to check exec_queue_killed() as we clear
1744 	 * suspend_pending upon kill but to be paranoid but races in which
1745 	 * suspend_pending is set after kill also check kill here.
1746 	 */
1747 	ret = wait_event_interruptible_timeout(q->guc->suspend_wait,
1748 					       !READ_ONCE(q->guc->suspend_pending) ||
1749 					       exec_queue_killed(q) ||
1750 					       xe_guc_read_stopped(guc),
1751 					       HZ * 5);
1752 
1753 	if (!ret) {
1754 		xe_gt_warn(guc_to_gt(guc),
1755 			   "Suspend fence, guc_id=%d, failed to respond",
1756 			   q->guc->id);
1757 		/* XXX: Trigger GT reset? */
1758 		return -ETIME;
1759 	}
1760 
1761 	return ret < 0 ? ret : 0;
1762 }
1763 
1764 static void guc_exec_queue_resume(struct xe_exec_queue *q)
1765 {
1766 	struct xe_gpu_scheduler *sched = &q->guc->sched;
1767 	struct xe_sched_msg *msg = q->guc->static_msgs + STATIC_MSG_RESUME;
1768 	struct xe_guc *guc = exec_queue_to_guc(q);
1769 
1770 	xe_gt_assert(guc_to_gt(guc), !q->guc->suspend_pending);
1771 
1772 	xe_sched_msg_lock(sched);
1773 	guc_exec_queue_try_add_msg(q, msg, RESUME);
1774 	xe_sched_msg_unlock(sched);
1775 }
1776 
1777 static bool guc_exec_queue_reset_status(struct xe_exec_queue *q)
1778 {
1779 	return exec_queue_reset(q) || exec_queue_killed_or_banned_or_wedged(q);
1780 }
1781 
1782 /*
1783  * All of these functions are an abstraction layer which other parts of XE can
1784  * use to trap into the GuC backend. All of these functions, aside from init,
1785  * really shouldn't do much other than trap into the DRM scheduler which
1786  * synchronizes these operations.
1787  */
1788 static const struct xe_exec_queue_ops guc_exec_queue_ops = {
1789 	.init = guc_exec_queue_init,
1790 	.kill = guc_exec_queue_kill,
1791 	.fini = guc_exec_queue_fini,
1792 	.set_priority = guc_exec_queue_set_priority,
1793 	.set_timeslice = guc_exec_queue_set_timeslice,
1794 	.set_preempt_timeout = guc_exec_queue_set_preempt_timeout,
1795 	.suspend = guc_exec_queue_suspend,
1796 	.suspend_wait = guc_exec_queue_suspend_wait,
1797 	.resume = guc_exec_queue_resume,
1798 	.reset_status = guc_exec_queue_reset_status,
1799 };
1800 
1801 static void guc_exec_queue_stop(struct xe_guc *guc, struct xe_exec_queue *q)
1802 {
1803 	struct xe_gpu_scheduler *sched = &q->guc->sched;
1804 
1805 	/* Stop scheduling + flush any DRM scheduler operations */
1806 	xe_sched_submission_stop(sched);
1807 
1808 	/* Clean up lost G2H + reset engine state */
1809 	if (exec_queue_registered(q)) {
1810 		if (exec_queue_extra_ref(q) || xe_exec_queue_is_lr(q))
1811 			xe_exec_queue_put(q);
1812 		else if (exec_queue_destroyed(q))
1813 			__guc_exec_queue_fini(guc, q);
1814 	}
1815 	if (q->guc->suspend_pending) {
1816 		set_exec_queue_suspended(q);
1817 		suspend_fence_signal(q);
1818 	}
1819 	atomic_and(EXEC_QUEUE_STATE_WEDGED | EXEC_QUEUE_STATE_BANNED |
1820 		   EXEC_QUEUE_STATE_KILLED | EXEC_QUEUE_STATE_DESTROYED |
1821 		   EXEC_QUEUE_STATE_SUSPENDED,
1822 		   &q->guc->state);
1823 	q->guc->resume_time = 0;
1824 	trace_xe_exec_queue_stop(q);
1825 
1826 	/*
1827 	 * Ban any engine (aside from kernel and engines used for VM ops) with a
1828 	 * started but not complete job or if a job has gone through a GT reset
1829 	 * more than twice.
1830 	 */
1831 	if (!(q->flags & (EXEC_QUEUE_FLAG_KERNEL | EXEC_QUEUE_FLAG_VM))) {
1832 		struct xe_sched_job *job = xe_sched_first_pending_job(sched);
1833 		bool ban = false;
1834 
1835 		if (job) {
1836 			if ((xe_sched_job_started(job) &&
1837 			    !xe_sched_job_completed(job)) ||
1838 			    xe_sched_invalidate_job(job, 2)) {
1839 				trace_xe_sched_job_ban(job);
1840 				ban = true;
1841 			}
1842 		} else if (xe_exec_queue_is_lr(q) &&
1843 			   !xe_lrc_ring_is_idle(q->lrc[0])) {
1844 			ban = true;
1845 		}
1846 
1847 		if (ban) {
1848 			set_exec_queue_banned(q);
1849 			xe_guc_exec_queue_trigger_cleanup(q);
1850 		}
1851 	}
1852 }
1853 
1854 /**
1855  * xe_guc_submit_reset_block - Disallow reset calls on given GuC.
1856  * @guc: the &xe_guc struct instance
1857  */
1858 int xe_guc_submit_reset_block(struct xe_guc *guc)
1859 {
1860 	return atomic_fetch_or(1, &guc->submission_state.reset_blocked);
1861 }
1862 
1863 /**
1864  * xe_guc_submit_reset_unblock - Allow back reset calls on given GuC.
1865  * @guc: the &xe_guc struct instance
1866  */
1867 void xe_guc_submit_reset_unblock(struct xe_guc *guc)
1868 {
1869 	atomic_set_release(&guc->submission_state.reset_blocked, 0);
1870 	wake_up_all(&guc->ct.wq);
1871 }
1872 
1873 static int guc_submit_reset_is_blocked(struct xe_guc *guc)
1874 {
1875 	return atomic_read_acquire(&guc->submission_state.reset_blocked);
1876 }
1877 
1878 /* Maximum time of blocking reset */
1879 #define RESET_BLOCK_PERIOD_MAX (HZ * 5)
1880 
1881 /**
1882  * xe_guc_wait_reset_unblock - Wait until reset blocking flag is lifted, or timeout.
1883  * @guc: the &xe_guc struct instance
1884  */
1885 int xe_guc_wait_reset_unblock(struct xe_guc *guc)
1886 {
1887 	return wait_event_timeout(guc->ct.wq,
1888 				  !guc_submit_reset_is_blocked(guc), RESET_BLOCK_PERIOD_MAX);
1889 }
1890 
1891 int xe_guc_submit_reset_prepare(struct xe_guc *guc)
1892 {
1893 	int ret;
1894 
1895 	if (!guc->submission_state.initialized)
1896 		return 0;
1897 
1898 	/*
1899 	 * Using an atomic here rather than submission_state.lock as this
1900 	 * function can be called while holding the CT lock (engine reset
1901 	 * failure). submission_state.lock needs the CT lock to resubmit jobs.
1902 	 * Atomic is not ideal, but it works to prevent against concurrent reset
1903 	 * and releasing any TDRs waiting on guc->submission_state.stopped.
1904 	 */
1905 	ret = atomic_fetch_or(1, &guc->submission_state.stopped);
1906 	smp_wmb();
1907 	wake_up_all(&guc->ct.wq);
1908 
1909 	return ret;
1910 }
1911 
1912 void xe_guc_submit_reset_wait(struct xe_guc *guc)
1913 {
1914 	wait_event(guc->ct.wq, xe_device_wedged(guc_to_xe(guc)) ||
1915 		   !xe_guc_read_stopped(guc));
1916 }
1917 
1918 void xe_guc_submit_stop(struct xe_guc *guc)
1919 {
1920 	struct xe_exec_queue *q;
1921 	unsigned long index;
1922 
1923 	xe_gt_assert(guc_to_gt(guc), xe_guc_read_stopped(guc) == 1);
1924 
1925 	mutex_lock(&guc->submission_state.lock);
1926 
1927 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
1928 		/* Prevent redundant attempts to stop parallel queues */
1929 		if (q->guc->id != index)
1930 			continue;
1931 
1932 		guc_exec_queue_stop(guc, q);
1933 	}
1934 
1935 	mutex_unlock(&guc->submission_state.lock);
1936 
1937 	/*
1938 	 * No one can enter the backend at this point, aside from new engine
1939 	 * creation which is protected by guc->submission_state.lock.
1940 	 */
1941 
1942 }
1943 
1944 /**
1945  * xe_guc_submit_pause - Stop further runs of submission tasks on given GuC.
1946  * @guc: the &xe_guc struct instance whose scheduler is to be disabled
1947  */
1948 void xe_guc_submit_pause(struct xe_guc *guc)
1949 {
1950 	struct xe_exec_queue *q;
1951 	unsigned long index;
1952 
1953 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
1954 		xe_sched_submission_stop_async(&q->guc->sched);
1955 }
1956 
1957 static void guc_exec_queue_start(struct xe_exec_queue *q)
1958 {
1959 	struct xe_gpu_scheduler *sched = &q->guc->sched;
1960 
1961 	if (!exec_queue_killed_or_banned_or_wedged(q)) {
1962 		int i;
1963 
1964 		trace_xe_exec_queue_resubmit(q);
1965 		for (i = 0; i < q->width; ++i)
1966 			xe_lrc_set_ring_head(q->lrc[i], q->lrc[i]->ring.tail);
1967 		xe_sched_resubmit_jobs(sched);
1968 	}
1969 
1970 	xe_sched_submission_start(sched);
1971 	xe_sched_submission_resume_tdr(sched);
1972 }
1973 
1974 int xe_guc_submit_start(struct xe_guc *guc)
1975 {
1976 	struct xe_exec_queue *q;
1977 	unsigned long index;
1978 
1979 	xe_gt_assert(guc_to_gt(guc), xe_guc_read_stopped(guc) == 1);
1980 
1981 	mutex_lock(&guc->submission_state.lock);
1982 	atomic_dec(&guc->submission_state.stopped);
1983 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
1984 		/* Prevent redundant attempts to start parallel queues */
1985 		if (q->guc->id != index)
1986 			continue;
1987 
1988 		guc_exec_queue_start(q);
1989 	}
1990 	mutex_unlock(&guc->submission_state.lock);
1991 
1992 	wake_up_all(&guc->ct.wq);
1993 
1994 	return 0;
1995 }
1996 
1997 static void guc_exec_queue_unpause(struct xe_exec_queue *q)
1998 {
1999 	struct xe_gpu_scheduler *sched = &q->guc->sched;
2000 
2001 	xe_sched_submission_start(sched);
2002 }
2003 
2004 /**
2005  * xe_guc_submit_unpause - Allow further runs of submission tasks on given GuC.
2006  * @guc: the &xe_guc struct instance whose scheduler is to be enabled
2007  */
2008 void xe_guc_submit_unpause(struct xe_guc *guc)
2009 {
2010 	struct xe_exec_queue *q;
2011 	unsigned long index;
2012 
2013 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
2014 		guc_exec_queue_unpause(q);
2015 
2016 	wake_up_all(&guc->ct.wq);
2017 }
2018 
2019 static struct xe_exec_queue *
2020 g2h_exec_queue_lookup(struct xe_guc *guc, u32 guc_id)
2021 {
2022 	struct xe_gt *gt = guc_to_gt(guc);
2023 	struct xe_exec_queue *q;
2024 
2025 	if (unlikely(guc_id >= GUC_ID_MAX)) {
2026 		xe_gt_err(gt, "Invalid guc_id %u\n", guc_id);
2027 		return NULL;
2028 	}
2029 
2030 	q = xa_load(&guc->submission_state.exec_queue_lookup, guc_id);
2031 	if (unlikely(!q)) {
2032 		xe_gt_err(gt, "Not engine present for guc_id %u\n", guc_id);
2033 		return NULL;
2034 	}
2035 
2036 	xe_gt_assert(guc_to_gt(guc), guc_id >= q->guc->id);
2037 	xe_gt_assert(guc_to_gt(guc), guc_id < (q->guc->id + q->width));
2038 
2039 	return q;
2040 }
2041 
2042 static void deregister_exec_queue(struct xe_guc *guc, struct xe_exec_queue *q)
2043 {
2044 	u32 action[] = {
2045 		XE_GUC_ACTION_DEREGISTER_CONTEXT,
2046 		q->guc->id,
2047 	};
2048 
2049 	xe_gt_assert(guc_to_gt(guc), exec_queue_destroyed(q));
2050 	xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q));
2051 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_disable(q));
2052 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_enable(q));
2053 
2054 	trace_xe_exec_queue_deregister(q);
2055 
2056 	xe_guc_ct_send_g2h_handler(&guc->ct, action, ARRAY_SIZE(action));
2057 }
2058 
2059 static void handle_sched_done(struct xe_guc *guc, struct xe_exec_queue *q,
2060 			      u32 runnable_state)
2061 {
2062 	trace_xe_exec_queue_scheduling_done(q);
2063 
2064 	if (runnable_state == 1) {
2065 		xe_gt_assert(guc_to_gt(guc), exec_queue_pending_enable(q));
2066 
2067 		q->guc->resume_time = ktime_get();
2068 		clear_exec_queue_pending_enable(q);
2069 		smp_wmb();
2070 		wake_up_all(&guc->ct.wq);
2071 	} else {
2072 		bool check_timeout = exec_queue_check_timeout(q);
2073 
2074 		xe_gt_assert(guc_to_gt(guc), runnable_state == 0);
2075 		xe_gt_assert(guc_to_gt(guc), exec_queue_pending_disable(q));
2076 
2077 		if (q->guc->suspend_pending) {
2078 			suspend_fence_signal(q);
2079 			clear_exec_queue_pending_disable(q);
2080 		} else {
2081 			if (exec_queue_banned(q) || check_timeout) {
2082 				smp_wmb();
2083 				wake_up_all(&guc->ct.wq);
2084 			}
2085 			if (!check_timeout && exec_queue_destroyed(q)) {
2086 				/*
2087 				 * Make sure to clear the pending_disable only
2088 				 * after sampling the destroyed state. We want
2089 				 * to ensure we don't trigger the unregister too
2090 				 * early with something intending to only
2091 				 * disable scheduling. The caller doing the
2092 				 * destroy must wait for an ongoing
2093 				 * pending_disable before marking as destroyed.
2094 				 */
2095 				clear_exec_queue_pending_disable(q);
2096 				deregister_exec_queue(guc, q);
2097 			} else {
2098 				clear_exec_queue_pending_disable(q);
2099 			}
2100 		}
2101 	}
2102 }
2103 
2104 int xe_guc_sched_done_handler(struct xe_guc *guc, u32 *msg, u32 len)
2105 {
2106 	struct xe_exec_queue *q;
2107 	u32 guc_id, runnable_state;
2108 
2109 	if (unlikely(len < 2))
2110 		return -EPROTO;
2111 
2112 	guc_id = msg[0];
2113 	runnable_state = msg[1];
2114 
2115 	q = g2h_exec_queue_lookup(guc, guc_id);
2116 	if (unlikely(!q))
2117 		return -EPROTO;
2118 
2119 	if (unlikely(!exec_queue_pending_enable(q) &&
2120 		     !exec_queue_pending_disable(q))) {
2121 		xe_gt_err(guc_to_gt(guc),
2122 			  "SCHED_DONE: Unexpected engine state 0x%04x, guc_id=%d, runnable_state=%u",
2123 			  atomic_read(&q->guc->state), q->guc->id,
2124 			  runnable_state);
2125 		return -EPROTO;
2126 	}
2127 
2128 	handle_sched_done(guc, q, runnable_state);
2129 
2130 	return 0;
2131 }
2132 
2133 static void handle_deregister_done(struct xe_guc *guc, struct xe_exec_queue *q)
2134 {
2135 	trace_xe_exec_queue_deregister_done(q);
2136 
2137 	clear_exec_queue_registered(q);
2138 
2139 	if (exec_queue_extra_ref(q) || xe_exec_queue_is_lr(q))
2140 		xe_exec_queue_put(q);
2141 	else
2142 		__guc_exec_queue_fini(guc, q);
2143 }
2144 
2145 int xe_guc_deregister_done_handler(struct xe_guc *guc, u32 *msg, u32 len)
2146 {
2147 	struct xe_exec_queue *q;
2148 	u32 guc_id;
2149 
2150 	if (unlikely(len < 1))
2151 		return -EPROTO;
2152 
2153 	guc_id = msg[0];
2154 
2155 	q = g2h_exec_queue_lookup(guc, guc_id);
2156 	if (unlikely(!q))
2157 		return -EPROTO;
2158 
2159 	if (!exec_queue_destroyed(q) || exec_queue_pending_disable(q) ||
2160 	    exec_queue_pending_enable(q) || exec_queue_enabled(q)) {
2161 		xe_gt_err(guc_to_gt(guc),
2162 			  "DEREGISTER_DONE: Unexpected engine state 0x%04x, guc_id=%d",
2163 			  atomic_read(&q->guc->state), q->guc->id);
2164 		return -EPROTO;
2165 	}
2166 
2167 	handle_deregister_done(guc, q);
2168 
2169 	return 0;
2170 }
2171 
2172 int xe_guc_exec_queue_reset_handler(struct xe_guc *guc, u32 *msg, u32 len)
2173 {
2174 	struct xe_gt *gt = guc_to_gt(guc);
2175 	struct xe_exec_queue *q;
2176 	u32 guc_id;
2177 
2178 	if (unlikely(len < 1))
2179 		return -EPROTO;
2180 
2181 	guc_id = msg[0];
2182 
2183 	q = g2h_exec_queue_lookup(guc, guc_id);
2184 	if (unlikely(!q))
2185 		return -EPROTO;
2186 
2187 	xe_gt_info(gt, "Engine reset: engine_class=%s, logical_mask: 0x%x, guc_id=%d",
2188 		   xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id);
2189 
2190 	trace_xe_exec_queue_reset(q);
2191 
2192 	/*
2193 	 * A banned engine is a NOP at this point (came from
2194 	 * guc_exec_queue_timedout_job). Otherwise, kick drm scheduler to cancel
2195 	 * jobs by setting timeout of the job to the minimum value kicking
2196 	 * guc_exec_queue_timedout_job.
2197 	 */
2198 	set_exec_queue_reset(q);
2199 	if (!exec_queue_banned(q) && !exec_queue_check_timeout(q))
2200 		xe_guc_exec_queue_trigger_cleanup(q);
2201 
2202 	return 0;
2203 }
2204 
2205 /*
2206  * xe_guc_error_capture_handler - Handler of GuC captured message
2207  * @guc: The GuC object
2208  * @msg: Point to the message
2209  * @len: The message length
2210  *
2211  * When GuC captured data is ready, GuC will send message
2212  * XE_GUC_ACTION_STATE_CAPTURE_NOTIFICATION to host, this function will be
2213  * called 1st to check status before process the data comes with the message.
2214  *
2215  * Returns: error code. 0 if success
2216  */
2217 int xe_guc_error_capture_handler(struct xe_guc *guc, u32 *msg, u32 len)
2218 {
2219 	u32 status;
2220 
2221 	if (unlikely(len != XE_GUC_ACTION_STATE_CAPTURE_NOTIFICATION_DATA_LEN))
2222 		return -EPROTO;
2223 
2224 	status = msg[0] & XE_GUC_STATE_CAPTURE_EVENT_STATUS_MASK;
2225 	if (status == XE_GUC_STATE_CAPTURE_EVENT_STATUS_NOSPACE)
2226 		xe_gt_warn(guc_to_gt(guc), "G2H-Error capture no space");
2227 
2228 	xe_guc_capture_process(guc);
2229 
2230 	return 0;
2231 }
2232 
2233 int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg,
2234 					       u32 len)
2235 {
2236 	struct xe_gt *gt = guc_to_gt(guc);
2237 	struct xe_exec_queue *q;
2238 	u32 guc_id;
2239 	u32 type = XE_GUC_CAT_ERR_TYPE_INVALID;
2240 
2241 	if (unlikely(!len || len > 2))
2242 		return -EPROTO;
2243 
2244 	guc_id = msg[0];
2245 
2246 	if (len == 2)
2247 		type = msg[1];
2248 
2249 	if (guc_id == GUC_ID_UNKNOWN) {
2250 		/*
2251 		 * GuC uses GUC_ID_UNKNOWN if it can not map the CAT fault to any PF/VF
2252 		 * context. In such case only PF will be notified about that fault.
2253 		 */
2254 		xe_gt_err_ratelimited(gt, "Memory CAT error reported by GuC!\n");
2255 		return 0;
2256 	}
2257 
2258 	q = g2h_exec_queue_lookup(guc, guc_id);
2259 	if (unlikely(!q))
2260 		return -EPROTO;
2261 
2262 	/*
2263 	 * The type is HW-defined and changes based on platform, so we don't
2264 	 * decode it in the kernel and only check if it is valid.
2265 	 * See bspec 54047 and 72187 for details.
2266 	 */
2267 	if (type != XE_GUC_CAT_ERR_TYPE_INVALID)
2268 		xe_gt_dbg(gt,
2269 			  "Engine memory CAT error [%u]: class=%s, logical_mask: 0x%x, guc_id=%d",
2270 			  type, xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id);
2271 	else
2272 		xe_gt_dbg(gt,
2273 			  "Engine memory CAT error: class=%s, logical_mask: 0x%x, guc_id=%d",
2274 			  xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id);
2275 
2276 	trace_xe_exec_queue_memory_cat_error(q);
2277 
2278 	/* Treat the same as engine reset */
2279 	set_exec_queue_reset(q);
2280 	if (!exec_queue_banned(q) && !exec_queue_check_timeout(q))
2281 		xe_guc_exec_queue_trigger_cleanup(q);
2282 
2283 	return 0;
2284 }
2285 
2286 int xe_guc_exec_queue_reset_failure_handler(struct xe_guc *guc, u32 *msg, u32 len)
2287 {
2288 	struct xe_gt *gt = guc_to_gt(guc);
2289 	u8 guc_class, instance;
2290 	u32 reason;
2291 
2292 	if (unlikely(len != 3))
2293 		return -EPROTO;
2294 
2295 	guc_class = msg[0];
2296 	instance = msg[1];
2297 	reason = msg[2];
2298 
2299 	/* Unexpected failure of a hardware feature, log an actual error */
2300 	xe_gt_err(gt, "GuC engine reset request failed on %d:%d because 0x%08X",
2301 		  guc_class, instance, reason);
2302 
2303 	xe_gt_reset_async(gt);
2304 
2305 	return 0;
2306 }
2307 
2308 static void
2309 guc_exec_queue_wq_snapshot_capture(struct xe_exec_queue *q,
2310 				   struct xe_guc_submit_exec_queue_snapshot *snapshot)
2311 {
2312 	struct xe_guc *guc = exec_queue_to_guc(q);
2313 	struct xe_device *xe = guc_to_xe(guc);
2314 	struct iosys_map map = xe_lrc_parallel_map(q->lrc[0]);
2315 	int i;
2316 
2317 	snapshot->guc.wqi_head = q->guc->wqi_head;
2318 	snapshot->guc.wqi_tail = q->guc->wqi_tail;
2319 	snapshot->parallel.wq_desc.head = parallel_read(xe, map, wq_desc.head);
2320 	snapshot->parallel.wq_desc.tail = parallel_read(xe, map, wq_desc.tail);
2321 	snapshot->parallel.wq_desc.status = parallel_read(xe, map,
2322 							  wq_desc.wq_status);
2323 
2324 	if (snapshot->parallel.wq_desc.head !=
2325 	    snapshot->parallel.wq_desc.tail) {
2326 		for (i = snapshot->parallel.wq_desc.head;
2327 		     i != snapshot->parallel.wq_desc.tail;
2328 		     i = (i + sizeof(u32)) % WQ_SIZE)
2329 			snapshot->parallel.wq[i / sizeof(u32)] =
2330 				parallel_read(xe, map, wq[i / sizeof(u32)]);
2331 	}
2332 }
2333 
2334 static void
2335 guc_exec_queue_wq_snapshot_print(struct xe_guc_submit_exec_queue_snapshot *snapshot,
2336 				 struct drm_printer *p)
2337 {
2338 	int i;
2339 
2340 	drm_printf(p, "\tWQ head: %u (internal), %d (memory)\n",
2341 		   snapshot->guc.wqi_head, snapshot->parallel.wq_desc.head);
2342 	drm_printf(p, "\tWQ tail: %u (internal), %d (memory)\n",
2343 		   snapshot->guc.wqi_tail, snapshot->parallel.wq_desc.tail);
2344 	drm_printf(p, "\tWQ status: %u\n", snapshot->parallel.wq_desc.status);
2345 
2346 	if (snapshot->parallel.wq_desc.head !=
2347 	    snapshot->parallel.wq_desc.tail) {
2348 		for (i = snapshot->parallel.wq_desc.head;
2349 		     i != snapshot->parallel.wq_desc.tail;
2350 		     i = (i + sizeof(u32)) % WQ_SIZE)
2351 			drm_printf(p, "\tWQ[%zu]: 0x%08x\n", i / sizeof(u32),
2352 				   snapshot->parallel.wq[i / sizeof(u32)]);
2353 	}
2354 }
2355 
2356 /**
2357  * xe_guc_exec_queue_snapshot_capture - Take a quick snapshot of the GuC Engine.
2358  * @q: faulty exec queue
2359  *
2360  * This can be printed out in a later stage like during dev_coredump
2361  * analysis.
2362  *
2363  * Returns: a GuC Submit Engine snapshot object that must be freed by the
2364  * caller, using `xe_guc_exec_queue_snapshot_free`.
2365  */
2366 struct xe_guc_submit_exec_queue_snapshot *
2367 xe_guc_exec_queue_snapshot_capture(struct xe_exec_queue *q)
2368 {
2369 	struct xe_gpu_scheduler *sched = &q->guc->sched;
2370 	struct xe_guc_submit_exec_queue_snapshot *snapshot;
2371 	int i;
2372 
2373 	snapshot = kzalloc(sizeof(*snapshot), GFP_ATOMIC);
2374 
2375 	if (!snapshot)
2376 		return NULL;
2377 
2378 	snapshot->guc.id = q->guc->id;
2379 	memcpy(&snapshot->name, &q->name, sizeof(snapshot->name));
2380 	snapshot->class = q->class;
2381 	snapshot->logical_mask = q->logical_mask;
2382 	snapshot->width = q->width;
2383 	snapshot->refcount = kref_read(&q->refcount);
2384 	snapshot->sched_timeout = sched->base.timeout;
2385 	snapshot->sched_props.timeslice_us = q->sched_props.timeslice_us;
2386 	snapshot->sched_props.preempt_timeout_us =
2387 		q->sched_props.preempt_timeout_us;
2388 
2389 	snapshot->lrc = kmalloc_array(q->width, sizeof(struct xe_lrc_snapshot *),
2390 				      GFP_ATOMIC);
2391 
2392 	if (snapshot->lrc) {
2393 		for (i = 0; i < q->width; ++i) {
2394 			struct xe_lrc *lrc = q->lrc[i];
2395 
2396 			snapshot->lrc[i] = xe_lrc_snapshot_capture(lrc);
2397 		}
2398 	}
2399 
2400 	snapshot->schedule_state = atomic_read(&q->guc->state);
2401 	snapshot->exec_queue_flags = q->flags;
2402 
2403 	snapshot->parallel_execution = xe_exec_queue_is_parallel(q);
2404 	if (snapshot->parallel_execution)
2405 		guc_exec_queue_wq_snapshot_capture(q, snapshot);
2406 
2407 	spin_lock(&sched->base.job_list_lock);
2408 	snapshot->pending_list_size = list_count_nodes(&sched->base.pending_list);
2409 	snapshot->pending_list = kmalloc_array(snapshot->pending_list_size,
2410 					       sizeof(struct pending_list_snapshot),
2411 					       GFP_ATOMIC);
2412 
2413 	if (snapshot->pending_list) {
2414 		struct xe_sched_job *job_iter;
2415 
2416 		i = 0;
2417 		list_for_each_entry(job_iter, &sched->base.pending_list, drm.list) {
2418 			snapshot->pending_list[i].seqno =
2419 				xe_sched_job_seqno(job_iter);
2420 			snapshot->pending_list[i].fence =
2421 				dma_fence_is_signaled(job_iter->fence) ? 1 : 0;
2422 			snapshot->pending_list[i].finished =
2423 				dma_fence_is_signaled(&job_iter->drm.s_fence->finished)
2424 				? 1 : 0;
2425 			i++;
2426 		}
2427 	}
2428 
2429 	spin_unlock(&sched->base.job_list_lock);
2430 
2431 	return snapshot;
2432 }
2433 
2434 /**
2435  * xe_guc_exec_queue_snapshot_capture_delayed - Take delayed part of snapshot of the GuC Engine.
2436  * @snapshot: Previously captured snapshot of job.
2437  *
2438  * This captures some data that requires taking some locks, so it cannot be done in signaling path.
2439  */
2440 void
2441 xe_guc_exec_queue_snapshot_capture_delayed(struct xe_guc_submit_exec_queue_snapshot *snapshot)
2442 {
2443 	int i;
2444 
2445 	if (!snapshot || !snapshot->lrc)
2446 		return;
2447 
2448 	for (i = 0; i < snapshot->width; ++i)
2449 		xe_lrc_snapshot_capture_delayed(snapshot->lrc[i]);
2450 }
2451 
2452 /**
2453  * xe_guc_exec_queue_snapshot_print - Print out a given GuC Engine snapshot.
2454  * @snapshot: GuC Submit Engine snapshot object.
2455  * @p: drm_printer where it will be printed out.
2456  *
2457  * This function prints out a given GuC Submit Engine snapshot object.
2458  */
2459 void
2460 xe_guc_exec_queue_snapshot_print(struct xe_guc_submit_exec_queue_snapshot *snapshot,
2461 				 struct drm_printer *p)
2462 {
2463 	int i;
2464 
2465 	if (!snapshot)
2466 		return;
2467 
2468 	drm_printf(p, "GuC ID: %d\n", snapshot->guc.id);
2469 	drm_printf(p, "\tName: %s\n", snapshot->name);
2470 	drm_printf(p, "\tClass: %d\n", snapshot->class);
2471 	drm_printf(p, "\tLogical mask: 0x%x\n", snapshot->logical_mask);
2472 	drm_printf(p, "\tWidth: %d\n", snapshot->width);
2473 	drm_printf(p, "\tRef: %d\n", snapshot->refcount);
2474 	drm_printf(p, "\tTimeout: %ld (ms)\n", snapshot->sched_timeout);
2475 	drm_printf(p, "\tTimeslice: %u (us)\n",
2476 		   snapshot->sched_props.timeslice_us);
2477 	drm_printf(p, "\tPreempt timeout: %u (us)\n",
2478 		   snapshot->sched_props.preempt_timeout_us);
2479 
2480 	for (i = 0; snapshot->lrc && i < snapshot->width; ++i)
2481 		xe_lrc_snapshot_print(snapshot->lrc[i], p);
2482 
2483 	drm_printf(p, "\tSchedule State: 0x%x\n", snapshot->schedule_state);
2484 	drm_printf(p, "\tFlags: 0x%lx\n", snapshot->exec_queue_flags);
2485 
2486 	if (snapshot->parallel_execution)
2487 		guc_exec_queue_wq_snapshot_print(snapshot, p);
2488 
2489 	for (i = 0; snapshot->pending_list && i < snapshot->pending_list_size;
2490 	     i++)
2491 		drm_printf(p, "\tJob: seqno=%d, fence=%d, finished=%d\n",
2492 			   snapshot->pending_list[i].seqno,
2493 			   snapshot->pending_list[i].fence,
2494 			   snapshot->pending_list[i].finished);
2495 }
2496 
2497 /**
2498  * xe_guc_exec_queue_snapshot_free - Free all allocated objects for a given
2499  * snapshot.
2500  * @snapshot: GuC Submit Engine snapshot object.
2501  *
2502  * This function free all the memory that needed to be allocated at capture
2503  * time.
2504  */
2505 void xe_guc_exec_queue_snapshot_free(struct xe_guc_submit_exec_queue_snapshot *snapshot)
2506 {
2507 	int i;
2508 
2509 	if (!snapshot)
2510 		return;
2511 
2512 	if (snapshot->lrc) {
2513 		for (i = 0; i < snapshot->width; i++)
2514 			xe_lrc_snapshot_free(snapshot->lrc[i]);
2515 		kfree(snapshot->lrc);
2516 	}
2517 	kfree(snapshot->pending_list);
2518 	kfree(snapshot);
2519 }
2520 
2521 static void guc_exec_queue_print(struct xe_exec_queue *q, struct drm_printer *p)
2522 {
2523 	struct xe_guc_submit_exec_queue_snapshot *snapshot;
2524 
2525 	snapshot = xe_guc_exec_queue_snapshot_capture(q);
2526 	xe_guc_exec_queue_snapshot_print(snapshot, p);
2527 	xe_guc_exec_queue_snapshot_free(snapshot);
2528 }
2529 
2530 /**
2531  * xe_guc_register_exec_queue - Register exec queue for a given context type.
2532  * @q: Execution queue
2533  * @ctx_type: Type of the context
2534  *
2535  * This function registers the execution queue with the guc. Special context
2536  * types like GUC_CONTEXT_COMPRESSION_SAVE and GUC_CONTEXT_COMPRESSION_RESTORE
2537  * are only applicable for IGPU and in the VF.
2538  * Submits the execution queue to GUC after registering it.
2539  *
2540  * Returns - None.
2541  */
2542 void xe_guc_register_exec_queue(struct xe_exec_queue *q, int ctx_type)
2543 {
2544 	struct xe_guc *guc = exec_queue_to_guc(q);
2545 	struct xe_device *xe = guc_to_xe(guc);
2546 
2547 	xe_assert(xe, IS_SRIOV_VF(xe));
2548 	xe_assert(xe, !IS_DGFX(xe));
2549 	xe_assert(xe, (ctx_type > GUC_CONTEXT_NORMAL &&
2550 		       ctx_type < GUC_CONTEXT_COUNT));
2551 
2552 	register_exec_queue(q, ctx_type);
2553 	enable_scheduling(q);
2554 }
2555 
2556 /**
2557  * xe_guc_submit_print - GuC Submit Print.
2558  * @guc: GuC.
2559  * @p: drm_printer where it will be printed out.
2560  *
2561  * This function capture and prints snapshots of **all** GuC Engines.
2562  */
2563 void xe_guc_submit_print(struct xe_guc *guc, struct drm_printer *p)
2564 {
2565 	struct xe_exec_queue *q;
2566 	unsigned long index;
2567 
2568 	if (!xe_device_uc_enabled(guc_to_xe(guc)))
2569 		return;
2570 
2571 	mutex_lock(&guc->submission_state.lock);
2572 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
2573 		guc_exec_queue_print(q, p);
2574 	mutex_unlock(&guc->submission_state.lock);
2575 }
2576 
2577 /**
2578  * xe_guc_contexts_hwsp_rebase - Re-compute GGTT references within all
2579  * exec queues registered to given GuC.
2580  * @guc: the &xe_guc struct instance
2581  * @scratch: scratch buffer to be used as temporary storage
2582  *
2583  * Returns: zero on success, negative error code on failure.
2584  */
2585 int xe_guc_contexts_hwsp_rebase(struct xe_guc *guc, void *scratch)
2586 {
2587 	struct xe_exec_queue *q;
2588 	unsigned long index;
2589 	int err = 0;
2590 
2591 	mutex_lock(&guc->submission_state.lock);
2592 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
2593 		err = xe_exec_queue_contexts_hwsp_rebase(q, scratch);
2594 		if (err)
2595 			break;
2596 		if (xe_exec_queue_is_parallel(q))
2597 			err = wq_items_rebase(q);
2598 		if (err)
2599 			break;
2600 	}
2601 	mutex_unlock(&guc->submission_state.lock);
2602 
2603 	return err;
2604 }
2605