1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2022 Intel Corporation 4 */ 5 6 #include "xe_guc_submit.h" 7 8 #include <linux/bitfield.h> 9 #include <linux/bitmap.h> 10 #include <linux/circ_buf.h> 11 #include <linux/delay.h> 12 #include <linux/dma-fence-array.h> 13 #include <linux/math64.h> 14 15 #include <drm/drm_managed.h> 16 17 #include "abi/guc_actions_abi.h" 18 #include "abi/guc_actions_slpc_abi.h" 19 #include "abi/guc_klvs_abi.h" 20 #include "regs/xe_lrc_layout.h" 21 #include "xe_assert.h" 22 #include "xe_devcoredump.h" 23 #include "xe_device.h" 24 #include "xe_exec_queue.h" 25 #include "xe_force_wake.h" 26 #include "xe_gpu_scheduler.h" 27 #include "xe_gt.h" 28 #include "xe_gt_clock.h" 29 #include "xe_gt_printk.h" 30 #include "xe_guc.h" 31 #include "xe_guc_capture.h" 32 #include "xe_guc_ct.h" 33 #include "xe_guc_exec_queue_types.h" 34 #include "xe_guc_id_mgr.h" 35 #include "xe_guc_submit_types.h" 36 #include "xe_hw_engine.h" 37 #include "xe_hw_fence.h" 38 #include "xe_lrc.h" 39 #include "xe_macros.h" 40 #include "xe_map.h" 41 #include "xe_mocs.h" 42 #include "xe_pm.h" 43 #include "xe_ring_ops_types.h" 44 #include "xe_sched_job.h" 45 #include "xe_trace.h" 46 #include "xe_vm.h" 47 48 static struct xe_guc * 49 exec_queue_to_guc(struct xe_exec_queue *q) 50 { 51 return &q->gt->uc.guc; 52 } 53 54 /* 55 * Helpers for engine state, using an atomic as some of the bits can transition 56 * as the same time (e.g. a suspend can be happning at the same time as schedule 57 * engine done being processed). 58 */ 59 #define EXEC_QUEUE_STATE_REGISTERED (1 << 0) 60 #define EXEC_QUEUE_STATE_ENABLED (1 << 1) 61 #define EXEC_QUEUE_STATE_PENDING_ENABLE (1 << 2) 62 #define EXEC_QUEUE_STATE_PENDING_DISABLE (1 << 3) 63 #define EXEC_QUEUE_STATE_DESTROYED (1 << 4) 64 #define EXEC_QUEUE_STATE_SUSPENDED (1 << 5) 65 #define EXEC_QUEUE_STATE_RESET (1 << 6) 66 #define EXEC_QUEUE_STATE_KILLED (1 << 7) 67 #define EXEC_QUEUE_STATE_WEDGED (1 << 8) 68 #define EXEC_QUEUE_STATE_BANNED (1 << 9) 69 #define EXEC_QUEUE_STATE_CHECK_TIMEOUT (1 << 10) 70 #define EXEC_QUEUE_STATE_EXTRA_REF (1 << 11) 71 72 static bool exec_queue_registered(struct xe_exec_queue *q) 73 { 74 return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_REGISTERED; 75 } 76 77 static void set_exec_queue_registered(struct xe_exec_queue *q) 78 { 79 atomic_or(EXEC_QUEUE_STATE_REGISTERED, &q->guc->state); 80 } 81 82 static void clear_exec_queue_registered(struct xe_exec_queue *q) 83 { 84 atomic_and(~EXEC_QUEUE_STATE_REGISTERED, &q->guc->state); 85 } 86 87 static bool exec_queue_enabled(struct xe_exec_queue *q) 88 { 89 return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_ENABLED; 90 } 91 92 static void set_exec_queue_enabled(struct xe_exec_queue *q) 93 { 94 atomic_or(EXEC_QUEUE_STATE_ENABLED, &q->guc->state); 95 } 96 97 static void clear_exec_queue_enabled(struct xe_exec_queue *q) 98 { 99 atomic_and(~EXEC_QUEUE_STATE_ENABLED, &q->guc->state); 100 } 101 102 static bool exec_queue_pending_enable(struct xe_exec_queue *q) 103 { 104 return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_PENDING_ENABLE; 105 } 106 107 static void set_exec_queue_pending_enable(struct xe_exec_queue *q) 108 { 109 atomic_or(EXEC_QUEUE_STATE_PENDING_ENABLE, &q->guc->state); 110 } 111 112 static void clear_exec_queue_pending_enable(struct xe_exec_queue *q) 113 { 114 atomic_and(~EXEC_QUEUE_STATE_PENDING_ENABLE, &q->guc->state); 115 } 116 117 static bool exec_queue_pending_disable(struct xe_exec_queue *q) 118 { 119 return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_PENDING_DISABLE; 120 } 121 122 static void set_exec_queue_pending_disable(struct xe_exec_queue *q) 123 { 124 atomic_or(EXEC_QUEUE_STATE_PENDING_DISABLE, &q->guc->state); 125 } 126 127 static void clear_exec_queue_pending_disable(struct xe_exec_queue *q) 128 { 129 atomic_and(~EXEC_QUEUE_STATE_PENDING_DISABLE, &q->guc->state); 130 } 131 132 static bool exec_queue_destroyed(struct xe_exec_queue *q) 133 { 134 return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_DESTROYED; 135 } 136 137 static void set_exec_queue_destroyed(struct xe_exec_queue *q) 138 { 139 atomic_or(EXEC_QUEUE_STATE_DESTROYED, &q->guc->state); 140 } 141 142 static bool exec_queue_banned(struct xe_exec_queue *q) 143 { 144 return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_BANNED; 145 } 146 147 static void set_exec_queue_banned(struct xe_exec_queue *q) 148 { 149 atomic_or(EXEC_QUEUE_STATE_BANNED, &q->guc->state); 150 } 151 152 static bool exec_queue_suspended(struct xe_exec_queue *q) 153 { 154 return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_SUSPENDED; 155 } 156 157 static void set_exec_queue_suspended(struct xe_exec_queue *q) 158 { 159 atomic_or(EXEC_QUEUE_STATE_SUSPENDED, &q->guc->state); 160 } 161 162 static void clear_exec_queue_suspended(struct xe_exec_queue *q) 163 { 164 atomic_and(~EXEC_QUEUE_STATE_SUSPENDED, &q->guc->state); 165 } 166 167 static bool exec_queue_reset(struct xe_exec_queue *q) 168 { 169 return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_RESET; 170 } 171 172 static void set_exec_queue_reset(struct xe_exec_queue *q) 173 { 174 atomic_or(EXEC_QUEUE_STATE_RESET, &q->guc->state); 175 } 176 177 static bool exec_queue_killed(struct xe_exec_queue *q) 178 { 179 return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_KILLED; 180 } 181 182 static void set_exec_queue_killed(struct xe_exec_queue *q) 183 { 184 atomic_or(EXEC_QUEUE_STATE_KILLED, &q->guc->state); 185 } 186 187 static bool exec_queue_wedged(struct xe_exec_queue *q) 188 { 189 return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_WEDGED; 190 } 191 192 static void set_exec_queue_wedged(struct xe_exec_queue *q) 193 { 194 atomic_or(EXEC_QUEUE_STATE_WEDGED, &q->guc->state); 195 } 196 197 static bool exec_queue_check_timeout(struct xe_exec_queue *q) 198 { 199 return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_CHECK_TIMEOUT; 200 } 201 202 static void set_exec_queue_check_timeout(struct xe_exec_queue *q) 203 { 204 atomic_or(EXEC_QUEUE_STATE_CHECK_TIMEOUT, &q->guc->state); 205 } 206 207 static void clear_exec_queue_check_timeout(struct xe_exec_queue *q) 208 { 209 atomic_and(~EXEC_QUEUE_STATE_CHECK_TIMEOUT, &q->guc->state); 210 } 211 212 static bool exec_queue_extra_ref(struct xe_exec_queue *q) 213 { 214 return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_EXTRA_REF; 215 } 216 217 static void set_exec_queue_extra_ref(struct xe_exec_queue *q) 218 { 219 atomic_or(EXEC_QUEUE_STATE_EXTRA_REF, &q->guc->state); 220 } 221 222 static bool exec_queue_killed_or_banned_or_wedged(struct xe_exec_queue *q) 223 { 224 return (atomic_read(&q->guc->state) & 225 (EXEC_QUEUE_STATE_WEDGED | EXEC_QUEUE_STATE_KILLED | 226 EXEC_QUEUE_STATE_BANNED)); 227 } 228 229 static void guc_submit_fini(struct drm_device *drm, void *arg) 230 { 231 struct xe_guc *guc = arg; 232 233 xa_destroy(&guc->submission_state.exec_queue_lookup); 234 } 235 236 static void guc_submit_wedged_fini(void *arg) 237 { 238 struct xe_guc *guc = arg; 239 struct xe_exec_queue *q; 240 unsigned long index; 241 242 mutex_lock(&guc->submission_state.lock); 243 xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) { 244 if (exec_queue_wedged(q)) { 245 mutex_unlock(&guc->submission_state.lock); 246 xe_exec_queue_put(q); 247 mutex_lock(&guc->submission_state.lock); 248 } 249 } 250 mutex_unlock(&guc->submission_state.lock); 251 } 252 253 static const struct xe_exec_queue_ops guc_exec_queue_ops; 254 255 static void primelockdep(struct xe_guc *guc) 256 { 257 if (!IS_ENABLED(CONFIG_LOCKDEP)) 258 return; 259 260 fs_reclaim_acquire(GFP_KERNEL); 261 262 mutex_lock(&guc->submission_state.lock); 263 mutex_unlock(&guc->submission_state.lock); 264 265 fs_reclaim_release(GFP_KERNEL); 266 } 267 268 /** 269 * xe_guc_submit_init() - Initialize GuC submission. 270 * @guc: the &xe_guc to initialize 271 * @num_ids: number of GuC context IDs to use 272 * 273 * The bare-metal or PF driver can pass ~0 as &num_ids to indicate that all 274 * GuC context IDs supported by the GuC firmware should be used for submission. 275 * 276 * Only VF drivers will have to provide explicit number of GuC context IDs 277 * that they can use for submission. 278 * 279 * Return: 0 on success or a negative error code on failure. 280 */ 281 int xe_guc_submit_init(struct xe_guc *guc, unsigned int num_ids) 282 { 283 struct xe_device *xe = guc_to_xe(guc); 284 struct xe_gt *gt = guc_to_gt(guc); 285 int err; 286 287 err = drmm_mutex_init(&xe->drm, &guc->submission_state.lock); 288 if (err) 289 return err; 290 291 err = xe_guc_id_mgr_init(&guc->submission_state.idm, num_ids); 292 if (err) 293 return err; 294 295 gt->exec_queue_ops = &guc_exec_queue_ops; 296 297 xa_init(&guc->submission_state.exec_queue_lookup); 298 299 init_waitqueue_head(&guc->submission_state.fini_wq); 300 301 primelockdep(guc); 302 303 guc->submission_state.initialized = true; 304 305 return drmm_add_action_or_reset(&xe->drm, guc_submit_fini, guc); 306 } 307 308 static void __release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q, u32 xa_count) 309 { 310 int i; 311 312 lockdep_assert_held(&guc->submission_state.lock); 313 314 for (i = 0; i < xa_count; ++i) 315 xa_erase(&guc->submission_state.exec_queue_lookup, q->guc->id + i); 316 317 xe_guc_id_mgr_release_locked(&guc->submission_state.idm, 318 q->guc->id, q->width); 319 320 if (xa_empty(&guc->submission_state.exec_queue_lookup)) 321 wake_up(&guc->submission_state.fini_wq); 322 } 323 324 static int alloc_guc_id(struct xe_guc *guc, struct xe_exec_queue *q) 325 { 326 int ret; 327 int i; 328 329 /* 330 * Must use GFP_NOWAIT as this lock is in the dma fence signalling path, 331 * worse case user gets -ENOMEM on engine create and has to try again. 332 * 333 * FIXME: Have caller pre-alloc or post-alloc /w GFP_KERNEL to prevent 334 * failure. 335 */ 336 lockdep_assert_held(&guc->submission_state.lock); 337 338 ret = xe_guc_id_mgr_reserve_locked(&guc->submission_state.idm, 339 q->width); 340 if (ret < 0) 341 return ret; 342 343 q->guc->id = ret; 344 345 for (i = 0; i < q->width; ++i) { 346 ret = xa_err(xa_store(&guc->submission_state.exec_queue_lookup, 347 q->guc->id + i, q, GFP_NOWAIT)); 348 if (ret) 349 goto err_release; 350 } 351 352 return 0; 353 354 err_release: 355 __release_guc_id(guc, q, i); 356 357 return ret; 358 } 359 360 static void release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q) 361 { 362 mutex_lock(&guc->submission_state.lock); 363 __release_guc_id(guc, q, q->width); 364 mutex_unlock(&guc->submission_state.lock); 365 } 366 367 struct exec_queue_policy { 368 u32 count; 369 struct guc_update_exec_queue_policy h2g; 370 }; 371 372 static u32 __guc_exec_queue_policy_action_size(struct exec_queue_policy *policy) 373 { 374 size_t bytes = sizeof(policy->h2g.header) + 375 (sizeof(policy->h2g.klv[0]) * policy->count); 376 377 return bytes / sizeof(u32); 378 } 379 380 static void __guc_exec_queue_policy_start_klv(struct exec_queue_policy *policy, 381 u16 guc_id) 382 { 383 policy->h2g.header.action = 384 XE_GUC_ACTION_HOST2GUC_UPDATE_CONTEXT_POLICIES; 385 policy->h2g.header.guc_id = guc_id; 386 policy->count = 0; 387 } 388 389 #define MAKE_EXEC_QUEUE_POLICY_ADD(func, id) \ 390 static void __guc_exec_queue_policy_add_##func(struct exec_queue_policy *policy, \ 391 u32 data) \ 392 { \ 393 XE_WARN_ON(policy->count >= GUC_CONTEXT_POLICIES_KLV_NUM_IDS); \ 394 \ 395 policy->h2g.klv[policy->count].kl = \ 396 FIELD_PREP(GUC_KLV_0_KEY, \ 397 GUC_CONTEXT_POLICIES_KLV_ID_##id) | \ 398 FIELD_PREP(GUC_KLV_0_LEN, 1); \ 399 policy->h2g.klv[policy->count].value = data; \ 400 policy->count++; \ 401 } 402 403 MAKE_EXEC_QUEUE_POLICY_ADD(execution_quantum, EXECUTION_QUANTUM) 404 MAKE_EXEC_QUEUE_POLICY_ADD(preemption_timeout, PREEMPTION_TIMEOUT) 405 MAKE_EXEC_QUEUE_POLICY_ADD(priority, SCHEDULING_PRIORITY) 406 MAKE_EXEC_QUEUE_POLICY_ADD(slpc_exec_queue_freq_req, SLPM_GT_FREQUENCY) 407 #undef MAKE_EXEC_QUEUE_POLICY_ADD 408 409 static const int xe_exec_queue_prio_to_guc[] = { 410 [XE_EXEC_QUEUE_PRIORITY_LOW] = GUC_CLIENT_PRIORITY_NORMAL, 411 [XE_EXEC_QUEUE_PRIORITY_NORMAL] = GUC_CLIENT_PRIORITY_KMD_NORMAL, 412 [XE_EXEC_QUEUE_PRIORITY_HIGH] = GUC_CLIENT_PRIORITY_HIGH, 413 [XE_EXEC_QUEUE_PRIORITY_KERNEL] = GUC_CLIENT_PRIORITY_KMD_HIGH, 414 }; 415 416 static void init_policies(struct xe_guc *guc, struct xe_exec_queue *q) 417 { 418 struct exec_queue_policy policy; 419 enum xe_exec_queue_priority prio = q->sched_props.priority; 420 u32 timeslice_us = q->sched_props.timeslice_us; 421 u32 slpc_exec_queue_freq_req = 0; 422 u32 preempt_timeout_us = q->sched_props.preempt_timeout_us; 423 424 xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q)); 425 426 if (q->flags & EXEC_QUEUE_FLAG_LOW_LATENCY) 427 slpc_exec_queue_freq_req |= SLPC_CTX_FREQ_REQ_IS_COMPUTE; 428 429 __guc_exec_queue_policy_start_klv(&policy, q->guc->id); 430 __guc_exec_queue_policy_add_priority(&policy, xe_exec_queue_prio_to_guc[prio]); 431 __guc_exec_queue_policy_add_execution_quantum(&policy, timeslice_us); 432 __guc_exec_queue_policy_add_preemption_timeout(&policy, preempt_timeout_us); 433 __guc_exec_queue_policy_add_slpc_exec_queue_freq_req(&policy, 434 slpc_exec_queue_freq_req); 435 436 xe_guc_ct_send(&guc->ct, (u32 *)&policy.h2g, 437 __guc_exec_queue_policy_action_size(&policy), 0, 0); 438 } 439 440 static void set_min_preemption_timeout(struct xe_guc *guc, struct xe_exec_queue *q) 441 { 442 struct exec_queue_policy policy; 443 444 __guc_exec_queue_policy_start_klv(&policy, q->guc->id); 445 __guc_exec_queue_policy_add_preemption_timeout(&policy, 1); 446 447 xe_guc_ct_send(&guc->ct, (u32 *)&policy.h2g, 448 __guc_exec_queue_policy_action_size(&policy), 0, 0); 449 } 450 451 #define parallel_read(xe_, map_, field_) \ 452 xe_map_rd_field(xe_, &map_, 0, struct guc_submit_parallel_scratch, \ 453 field_) 454 #define parallel_write(xe_, map_, field_, val_) \ 455 xe_map_wr_field(xe_, &map_, 0, struct guc_submit_parallel_scratch, \ 456 field_, val_) 457 458 static void __register_mlrc_exec_queue(struct xe_guc *guc, 459 struct xe_exec_queue *q, 460 struct guc_ctxt_registration_info *info) 461 { 462 #define MAX_MLRC_REG_SIZE (13 + XE_HW_ENGINE_MAX_INSTANCE * 2) 463 u32 action[MAX_MLRC_REG_SIZE]; 464 int len = 0; 465 int i; 466 467 xe_gt_assert(guc_to_gt(guc), xe_exec_queue_is_parallel(q)); 468 469 action[len++] = XE_GUC_ACTION_REGISTER_CONTEXT_MULTI_LRC; 470 action[len++] = info->flags; 471 action[len++] = info->context_idx; 472 action[len++] = info->engine_class; 473 action[len++] = info->engine_submit_mask; 474 action[len++] = info->wq_desc_lo; 475 action[len++] = info->wq_desc_hi; 476 action[len++] = info->wq_base_lo; 477 action[len++] = info->wq_base_hi; 478 action[len++] = info->wq_size; 479 action[len++] = q->width; 480 action[len++] = info->hwlrca_lo; 481 action[len++] = info->hwlrca_hi; 482 483 for (i = 1; i < q->width; ++i) { 484 struct xe_lrc *lrc = q->lrc[i]; 485 486 action[len++] = lower_32_bits(xe_lrc_descriptor(lrc)); 487 action[len++] = upper_32_bits(xe_lrc_descriptor(lrc)); 488 } 489 490 xe_gt_assert(guc_to_gt(guc), len <= MAX_MLRC_REG_SIZE); 491 #undef MAX_MLRC_REG_SIZE 492 493 xe_guc_ct_send(&guc->ct, action, len, 0, 0); 494 } 495 496 static void __register_exec_queue(struct xe_guc *guc, 497 struct guc_ctxt_registration_info *info) 498 { 499 u32 action[] = { 500 XE_GUC_ACTION_REGISTER_CONTEXT, 501 info->flags, 502 info->context_idx, 503 info->engine_class, 504 info->engine_submit_mask, 505 info->wq_desc_lo, 506 info->wq_desc_hi, 507 info->wq_base_lo, 508 info->wq_base_hi, 509 info->wq_size, 510 info->hwlrca_lo, 511 info->hwlrca_hi, 512 }; 513 514 xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action), 0, 0); 515 } 516 517 static void register_exec_queue(struct xe_exec_queue *q) 518 { 519 struct xe_guc *guc = exec_queue_to_guc(q); 520 struct xe_device *xe = guc_to_xe(guc); 521 struct xe_lrc *lrc = q->lrc[0]; 522 struct guc_ctxt_registration_info info; 523 524 xe_gt_assert(guc_to_gt(guc), !exec_queue_registered(q)); 525 526 memset(&info, 0, sizeof(info)); 527 info.context_idx = q->guc->id; 528 info.engine_class = xe_engine_class_to_guc_class(q->class); 529 info.engine_submit_mask = q->logical_mask; 530 info.hwlrca_lo = lower_32_bits(xe_lrc_descriptor(lrc)); 531 info.hwlrca_hi = upper_32_bits(xe_lrc_descriptor(lrc)); 532 info.flags = CONTEXT_REGISTRATION_FLAG_KMD; 533 534 if (xe_exec_queue_is_parallel(q)) { 535 u64 ggtt_addr = xe_lrc_parallel_ggtt_addr(lrc); 536 struct iosys_map map = xe_lrc_parallel_map(lrc); 537 538 info.wq_desc_lo = lower_32_bits(ggtt_addr + 539 offsetof(struct guc_submit_parallel_scratch, wq_desc)); 540 info.wq_desc_hi = upper_32_bits(ggtt_addr + 541 offsetof(struct guc_submit_parallel_scratch, wq_desc)); 542 info.wq_base_lo = lower_32_bits(ggtt_addr + 543 offsetof(struct guc_submit_parallel_scratch, wq[0])); 544 info.wq_base_hi = upper_32_bits(ggtt_addr + 545 offsetof(struct guc_submit_parallel_scratch, wq[0])); 546 info.wq_size = WQ_SIZE; 547 548 q->guc->wqi_head = 0; 549 q->guc->wqi_tail = 0; 550 xe_map_memset(xe, &map, 0, 0, PARALLEL_SCRATCH_SIZE - WQ_SIZE); 551 parallel_write(xe, map, wq_desc.wq_status, WQ_STATUS_ACTIVE); 552 } 553 554 /* 555 * We must keep a reference for LR engines if engine is registered with 556 * the GuC as jobs signal immediately and can't destroy an engine if the 557 * GuC has a reference to it. 558 */ 559 if (xe_exec_queue_is_lr(q)) 560 xe_exec_queue_get(q); 561 562 set_exec_queue_registered(q); 563 trace_xe_exec_queue_register(q); 564 if (xe_exec_queue_is_parallel(q)) 565 __register_mlrc_exec_queue(guc, q, &info); 566 else 567 __register_exec_queue(guc, &info); 568 init_policies(guc, q); 569 } 570 571 static u32 wq_space_until_wrap(struct xe_exec_queue *q) 572 { 573 return (WQ_SIZE - q->guc->wqi_tail); 574 } 575 576 static int wq_wait_for_space(struct xe_exec_queue *q, u32 wqi_size) 577 { 578 struct xe_guc *guc = exec_queue_to_guc(q); 579 struct xe_device *xe = guc_to_xe(guc); 580 struct iosys_map map = xe_lrc_parallel_map(q->lrc[0]); 581 unsigned int sleep_period_ms = 1; 582 583 #define AVAILABLE_SPACE \ 584 CIRC_SPACE(q->guc->wqi_tail, q->guc->wqi_head, WQ_SIZE) 585 if (wqi_size > AVAILABLE_SPACE) { 586 try_again: 587 q->guc->wqi_head = parallel_read(xe, map, wq_desc.head); 588 if (wqi_size > AVAILABLE_SPACE) { 589 if (sleep_period_ms == 1024) { 590 xe_gt_reset_async(q->gt); 591 return -ENODEV; 592 } 593 594 msleep(sleep_period_ms); 595 sleep_period_ms <<= 1; 596 goto try_again; 597 } 598 } 599 #undef AVAILABLE_SPACE 600 601 return 0; 602 } 603 604 static int wq_noop_append(struct xe_exec_queue *q) 605 { 606 struct xe_guc *guc = exec_queue_to_guc(q); 607 struct xe_device *xe = guc_to_xe(guc); 608 struct iosys_map map = xe_lrc_parallel_map(q->lrc[0]); 609 u32 len_dw = wq_space_until_wrap(q) / sizeof(u32) - 1; 610 611 if (wq_wait_for_space(q, wq_space_until_wrap(q))) 612 return -ENODEV; 613 614 xe_gt_assert(guc_to_gt(guc), FIELD_FIT(WQ_LEN_MASK, len_dw)); 615 616 parallel_write(xe, map, wq[q->guc->wqi_tail / sizeof(u32)], 617 FIELD_PREP(WQ_TYPE_MASK, WQ_TYPE_NOOP) | 618 FIELD_PREP(WQ_LEN_MASK, len_dw)); 619 q->guc->wqi_tail = 0; 620 621 return 0; 622 } 623 624 static void wq_item_append(struct xe_exec_queue *q) 625 { 626 struct xe_guc *guc = exec_queue_to_guc(q); 627 struct xe_device *xe = guc_to_xe(guc); 628 struct iosys_map map = xe_lrc_parallel_map(q->lrc[0]); 629 #define WQ_HEADER_SIZE 4 /* Includes 1 LRC address too */ 630 u32 wqi[XE_HW_ENGINE_MAX_INSTANCE + (WQ_HEADER_SIZE - 1)]; 631 u32 wqi_size = (q->width + (WQ_HEADER_SIZE - 1)) * sizeof(u32); 632 u32 len_dw = (wqi_size / sizeof(u32)) - 1; 633 int i = 0, j; 634 635 if (wqi_size > wq_space_until_wrap(q)) { 636 if (wq_noop_append(q)) 637 return; 638 } 639 if (wq_wait_for_space(q, wqi_size)) 640 return; 641 642 wqi[i++] = FIELD_PREP(WQ_TYPE_MASK, WQ_TYPE_MULTI_LRC) | 643 FIELD_PREP(WQ_LEN_MASK, len_dw); 644 wqi[i++] = xe_lrc_descriptor(q->lrc[0]); 645 wqi[i++] = FIELD_PREP(WQ_GUC_ID_MASK, q->guc->id) | 646 FIELD_PREP(WQ_RING_TAIL_MASK, q->lrc[0]->ring.tail / sizeof(u64)); 647 wqi[i++] = 0; 648 for (j = 1; j < q->width; ++j) { 649 struct xe_lrc *lrc = q->lrc[j]; 650 651 wqi[i++] = lrc->ring.tail / sizeof(u64); 652 } 653 654 xe_gt_assert(guc_to_gt(guc), i == wqi_size / sizeof(u32)); 655 656 iosys_map_incr(&map, offsetof(struct guc_submit_parallel_scratch, 657 wq[q->guc->wqi_tail / sizeof(u32)])); 658 xe_map_memcpy_to(xe, &map, 0, wqi, wqi_size); 659 q->guc->wqi_tail += wqi_size; 660 xe_gt_assert(guc_to_gt(guc), q->guc->wqi_tail <= WQ_SIZE); 661 662 xe_device_wmb(xe); 663 664 map = xe_lrc_parallel_map(q->lrc[0]); 665 parallel_write(xe, map, wq_desc.tail, q->guc->wqi_tail); 666 } 667 668 #define RESUME_PENDING ~0x0ull 669 static void submit_exec_queue(struct xe_exec_queue *q) 670 { 671 struct xe_guc *guc = exec_queue_to_guc(q); 672 struct xe_lrc *lrc = q->lrc[0]; 673 u32 action[3]; 674 u32 g2h_len = 0; 675 u32 num_g2h = 0; 676 int len = 0; 677 bool extra_submit = false; 678 679 xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q)); 680 681 if (xe_exec_queue_is_parallel(q)) 682 wq_item_append(q); 683 else 684 xe_lrc_set_ring_tail(lrc, lrc->ring.tail); 685 686 if (exec_queue_suspended(q) && !xe_exec_queue_is_parallel(q)) 687 return; 688 689 if (!exec_queue_enabled(q) && !exec_queue_suspended(q)) { 690 action[len++] = XE_GUC_ACTION_SCHED_CONTEXT_MODE_SET; 691 action[len++] = q->guc->id; 692 action[len++] = GUC_CONTEXT_ENABLE; 693 g2h_len = G2H_LEN_DW_SCHED_CONTEXT_MODE_SET; 694 num_g2h = 1; 695 if (xe_exec_queue_is_parallel(q)) 696 extra_submit = true; 697 698 q->guc->resume_time = RESUME_PENDING; 699 set_exec_queue_pending_enable(q); 700 set_exec_queue_enabled(q); 701 trace_xe_exec_queue_scheduling_enable(q); 702 } else { 703 action[len++] = XE_GUC_ACTION_SCHED_CONTEXT; 704 action[len++] = q->guc->id; 705 trace_xe_exec_queue_submit(q); 706 } 707 708 xe_guc_ct_send(&guc->ct, action, len, g2h_len, num_g2h); 709 710 if (extra_submit) { 711 len = 0; 712 action[len++] = XE_GUC_ACTION_SCHED_CONTEXT; 713 action[len++] = q->guc->id; 714 trace_xe_exec_queue_submit(q); 715 716 xe_guc_ct_send(&guc->ct, action, len, 0, 0); 717 } 718 } 719 720 static struct dma_fence * 721 guc_exec_queue_run_job(struct drm_sched_job *drm_job) 722 { 723 struct xe_sched_job *job = to_xe_sched_job(drm_job); 724 struct xe_exec_queue *q = job->q; 725 struct xe_guc *guc = exec_queue_to_guc(q); 726 struct dma_fence *fence = NULL; 727 bool lr = xe_exec_queue_is_lr(q); 728 729 xe_gt_assert(guc_to_gt(guc), !(exec_queue_destroyed(q) || exec_queue_pending_disable(q)) || 730 exec_queue_banned(q) || exec_queue_suspended(q)); 731 732 trace_xe_sched_job_run(job); 733 734 if (!exec_queue_killed_or_banned_or_wedged(q) && !xe_sched_job_is_error(job)) { 735 if (!exec_queue_registered(q)) 736 register_exec_queue(q); 737 if (!lr) /* LR jobs are emitted in the exec IOCTL */ 738 q->ring_ops->emit_job(job); 739 submit_exec_queue(q); 740 } 741 742 if (lr) { 743 xe_sched_job_set_error(job, -EOPNOTSUPP); 744 dma_fence_put(job->fence); /* Drop ref from xe_sched_job_arm */ 745 } else { 746 fence = job->fence; 747 } 748 749 return fence; 750 } 751 752 static void guc_exec_queue_free_job(struct drm_sched_job *drm_job) 753 { 754 struct xe_sched_job *job = to_xe_sched_job(drm_job); 755 756 trace_xe_sched_job_free(job); 757 xe_sched_job_put(job); 758 } 759 760 int xe_guc_read_stopped(struct xe_guc *guc) 761 { 762 return atomic_read(&guc->submission_state.stopped); 763 } 764 765 #define MAKE_SCHED_CONTEXT_ACTION(q, enable_disable) \ 766 u32 action[] = { \ 767 XE_GUC_ACTION_SCHED_CONTEXT_MODE_SET, \ 768 q->guc->id, \ 769 GUC_CONTEXT_##enable_disable, \ 770 } 771 772 static void disable_scheduling_deregister(struct xe_guc *guc, 773 struct xe_exec_queue *q) 774 { 775 MAKE_SCHED_CONTEXT_ACTION(q, DISABLE); 776 int ret; 777 778 set_min_preemption_timeout(guc, q); 779 smp_rmb(); 780 ret = wait_event_timeout(guc->ct.wq, 781 (!exec_queue_pending_enable(q) && 782 !exec_queue_pending_disable(q)) || 783 xe_guc_read_stopped(guc), 784 HZ * 5); 785 if (!ret) { 786 struct xe_gpu_scheduler *sched = &q->guc->sched; 787 788 xe_gt_warn(q->gt, "Pending enable/disable failed to respond\n"); 789 xe_sched_submission_start(sched); 790 xe_gt_reset_async(q->gt); 791 xe_sched_tdr_queue_imm(sched); 792 return; 793 } 794 795 clear_exec_queue_enabled(q); 796 set_exec_queue_pending_disable(q); 797 set_exec_queue_destroyed(q); 798 trace_xe_exec_queue_scheduling_disable(q); 799 800 /* 801 * Reserve space for both G2H here as the 2nd G2H is sent from a G2H 802 * handler and we are not allowed to reserved G2H space in handlers. 803 */ 804 xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action), 805 G2H_LEN_DW_SCHED_CONTEXT_MODE_SET + 806 G2H_LEN_DW_DEREGISTER_CONTEXT, 2); 807 } 808 809 static void xe_guc_exec_queue_trigger_cleanup(struct xe_exec_queue *q) 810 { 811 struct xe_guc *guc = exec_queue_to_guc(q); 812 struct xe_device *xe = guc_to_xe(guc); 813 814 /** to wakeup xe_wait_user_fence ioctl if exec queue is reset */ 815 wake_up_all(&xe->ufence_wq); 816 817 if (xe_exec_queue_is_lr(q)) 818 queue_work(guc_to_gt(guc)->ordered_wq, &q->guc->lr_tdr); 819 else 820 xe_sched_tdr_queue_imm(&q->guc->sched); 821 } 822 823 /** 824 * xe_guc_submit_wedge() - Wedge GuC submission 825 * @guc: the GuC object 826 * 827 * Save exec queue's registered with GuC state by taking a ref to each queue. 828 * Register a DRMM handler to drop refs upon driver unload. 829 */ 830 void xe_guc_submit_wedge(struct xe_guc *guc) 831 { 832 struct xe_gt *gt = guc_to_gt(guc); 833 struct xe_exec_queue *q; 834 unsigned long index; 835 int err; 836 837 xe_gt_assert(guc_to_gt(guc), guc_to_xe(guc)->wedged.mode); 838 839 /* 840 * If device is being wedged even before submission_state is 841 * initialized, there's nothing to do here. 842 */ 843 if (!guc->submission_state.initialized) 844 return; 845 846 err = devm_add_action_or_reset(guc_to_xe(guc)->drm.dev, 847 guc_submit_wedged_fini, guc); 848 if (err) { 849 xe_gt_err(gt, "Failed to register clean-up on wedged.mode=2; " 850 "Although device is wedged.\n"); 851 return; 852 } 853 854 mutex_lock(&guc->submission_state.lock); 855 xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) 856 if (xe_exec_queue_get_unless_zero(q)) 857 set_exec_queue_wedged(q); 858 mutex_unlock(&guc->submission_state.lock); 859 } 860 861 static bool guc_submit_hint_wedged(struct xe_guc *guc) 862 { 863 struct xe_device *xe = guc_to_xe(guc); 864 865 if (xe->wedged.mode != 2) 866 return false; 867 868 if (xe_device_wedged(xe)) 869 return true; 870 871 xe_device_declare_wedged(xe); 872 873 return true; 874 } 875 876 static void xe_guc_exec_queue_lr_cleanup(struct work_struct *w) 877 { 878 struct xe_guc_exec_queue *ge = 879 container_of(w, struct xe_guc_exec_queue, lr_tdr); 880 struct xe_exec_queue *q = ge->q; 881 struct xe_guc *guc = exec_queue_to_guc(q); 882 struct xe_gpu_scheduler *sched = &ge->sched; 883 bool wedged; 884 885 xe_gt_assert(guc_to_gt(guc), xe_exec_queue_is_lr(q)); 886 trace_xe_exec_queue_lr_cleanup(q); 887 888 wedged = guc_submit_hint_wedged(exec_queue_to_guc(q)); 889 890 /* Kill the run_job / process_msg entry points */ 891 xe_sched_submission_stop(sched); 892 893 /* 894 * Engine state now mostly stable, disable scheduling / deregister if 895 * needed. This cleanup routine might be called multiple times, where 896 * the actual async engine deregister drops the final engine ref. 897 * Calling disable_scheduling_deregister will mark the engine as 898 * destroyed and fire off the CT requests to disable scheduling / 899 * deregister, which we only want to do once. We also don't want to mark 900 * the engine as pending_disable again as this may race with the 901 * xe_guc_deregister_done_handler() which treats it as an unexpected 902 * state. 903 */ 904 if (!wedged && exec_queue_registered(q) && !exec_queue_destroyed(q)) { 905 struct xe_guc *guc = exec_queue_to_guc(q); 906 int ret; 907 908 set_exec_queue_banned(q); 909 disable_scheduling_deregister(guc, q); 910 911 /* 912 * Must wait for scheduling to be disabled before signalling 913 * any fences, if GT broken the GT reset code should signal us. 914 */ 915 ret = wait_event_timeout(guc->ct.wq, 916 !exec_queue_pending_disable(q) || 917 xe_guc_read_stopped(guc), HZ * 5); 918 if (!ret) { 919 xe_gt_warn(q->gt, "Schedule disable failed to respond, guc_id=%d\n", 920 q->guc->id); 921 xe_devcoredump(q, NULL, "Schedule disable failed to respond, guc_id=%d\n", 922 q->guc->id); 923 xe_sched_submission_start(sched); 924 xe_gt_reset_async(q->gt); 925 return; 926 } 927 } 928 929 if (!exec_queue_killed(q) && !xe_lrc_ring_is_idle(q->lrc[0])) 930 xe_devcoredump(q, NULL, "LR job cleanup, guc_id=%d", q->guc->id); 931 932 xe_sched_submission_start(sched); 933 } 934 935 #define ADJUST_FIVE_PERCENT(__t) mul_u64_u32_div(__t, 105, 100) 936 937 static bool check_timeout(struct xe_exec_queue *q, struct xe_sched_job *job) 938 { 939 struct xe_gt *gt = guc_to_gt(exec_queue_to_guc(q)); 940 u32 ctx_timestamp, ctx_job_timestamp; 941 u32 timeout_ms = q->sched_props.job_timeout_ms; 942 u32 diff; 943 u64 running_time_ms; 944 945 if (!xe_sched_job_started(job)) { 946 xe_gt_warn(gt, "Check job timeout: seqno=%u, lrc_seqno=%u, guc_id=%d, not started", 947 xe_sched_job_seqno(job), xe_sched_job_lrc_seqno(job), 948 q->guc->id); 949 950 return xe_sched_invalidate_job(job, 2); 951 } 952 953 ctx_timestamp = xe_lrc_ctx_timestamp(q->lrc[0]); 954 ctx_job_timestamp = xe_lrc_ctx_job_timestamp(q->lrc[0]); 955 956 /* 957 * Counter wraps at ~223s at the usual 19.2MHz, be paranoid catch 958 * possible overflows with a high timeout. 959 */ 960 xe_gt_assert(gt, timeout_ms < 100 * MSEC_PER_SEC); 961 962 if (ctx_timestamp < ctx_job_timestamp) 963 diff = ctx_timestamp + U32_MAX - ctx_job_timestamp; 964 else 965 diff = ctx_timestamp - ctx_job_timestamp; 966 967 /* 968 * Ensure timeout is within 5% to account for an GuC scheduling latency 969 */ 970 running_time_ms = 971 ADJUST_FIVE_PERCENT(xe_gt_clock_interval_to_ms(gt, diff)); 972 973 xe_gt_dbg(gt, 974 "Check job timeout: seqno=%u, lrc_seqno=%u, guc_id=%d, running_time_ms=%llu, timeout_ms=%u, diff=0x%08x", 975 xe_sched_job_seqno(job), xe_sched_job_lrc_seqno(job), 976 q->guc->id, running_time_ms, timeout_ms, diff); 977 978 return running_time_ms >= timeout_ms; 979 } 980 981 static void enable_scheduling(struct xe_exec_queue *q) 982 { 983 MAKE_SCHED_CONTEXT_ACTION(q, ENABLE); 984 struct xe_guc *guc = exec_queue_to_guc(q); 985 int ret; 986 987 xe_gt_assert(guc_to_gt(guc), !exec_queue_destroyed(q)); 988 xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q)); 989 xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_disable(q)); 990 xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_enable(q)); 991 992 set_exec_queue_pending_enable(q); 993 set_exec_queue_enabled(q); 994 trace_xe_exec_queue_scheduling_enable(q); 995 996 xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action), 997 G2H_LEN_DW_SCHED_CONTEXT_MODE_SET, 1); 998 999 ret = wait_event_timeout(guc->ct.wq, 1000 !exec_queue_pending_enable(q) || 1001 xe_guc_read_stopped(guc), HZ * 5); 1002 if (!ret || xe_guc_read_stopped(guc)) { 1003 xe_gt_warn(guc_to_gt(guc), "Schedule enable failed to respond"); 1004 set_exec_queue_banned(q); 1005 xe_gt_reset_async(q->gt); 1006 xe_sched_tdr_queue_imm(&q->guc->sched); 1007 } 1008 } 1009 1010 static void disable_scheduling(struct xe_exec_queue *q, bool immediate) 1011 { 1012 MAKE_SCHED_CONTEXT_ACTION(q, DISABLE); 1013 struct xe_guc *guc = exec_queue_to_guc(q); 1014 1015 xe_gt_assert(guc_to_gt(guc), !exec_queue_destroyed(q)); 1016 xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q)); 1017 xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_disable(q)); 1018 1019 if (immediate) 1020 set_min_preemption_timeout(guc, q); 1021 clear_exec_queue_enabled(q); 1022 set_exec_queue_pending_disable(q); 1023 trace_xe_exec_queue_scheduling_disable(q); 1024 1025 xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action), 1026 G2H_LEN_DW_SCHED_CONTEXT_MODE_SET, 1); 1027 } 1028 1029 static void __deregister_exec_queue(struct xe_guc *guc, struct xe_exec_queue *q) 1030 { 1031 u32 action[] = { 1032 XE_GUC_ACTION_DEREGISTER_CONTEXT, 1033 q->guc->id, 1034 }; 1035 1036 xe_gt_assert(guc_to_gt(guc), !exec_queue_destroyed(q)); 1037 xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q)); 1038 xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_enable(q)); 1039 xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_disable(q)); 1040 1041 set_exec_queue_destroyed(q); 1042 trace_xe_exec_queue_deregister(q); 1043 1044 xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action), 1045 G2H_LEN_DW_DEREGISTER_CONTEXT, 1); 1046 } 1047 1048 static enum drm_gpu_sched_stat 1049 guc_exec_queue_timedout_job(struct drm_sched_job *drm_job) 1050 { 1051 struct xe_sched_job *job = to_xe_sched_job(drm_job); 1052 struct xe_sched_job *tmp_job; 1053 struct xe_exec_queue *q = job->q; 1054 struct xe_gpu_scheduler *sched = &q->guc->sched; 1055 struct xe_guc *guc = exec_queue_to_guc(q); 1056 const char *process_name = "no process"; 1057 struct xe_device *xe = guc_to_xe(guc); 1058 unsigned int fw_ref; 1059 int err = -ETIME; 1060 pid_t pid = -1; 1061 int i = 0; 1062 bool wedged, skip_timeout_check; 1063 1064 /* 1065 * TDR has fired before free job worker. Common if exec queue 1066 * immediately closed after last fence signaled. Add back to pending 1067 * list so job can be freed and kick scheduler ensuring free job is not 1068 * lost. 1069 */ 1070 if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &job->fence->flags)) { 1071 xe_sched_add_pending_job(sched, job); 1072 xe_sched_submission_start(sched); 1073 1074 return DRM_GPU_SCHED_STAT_NOMINAL; 1075 } 1076 1077 /* Kill the run_job entry point */ 1078 xe_sched_submission_stop(sched); 1079 1080 /* Must check all state after stopping scheduler */ 1081 skip_timeout_check = exec_queue_reset(q) || 1082 exec_queue_killed_or_banned_or_wedged(q) || 1083 exec_queue_destroyed(q); 1084 1085 /* 1086 * If devcoredump not captured and GuC capture for the job is not ready 1087 * do manual capture first and decide later if we need to use it 1088 */ 1089 if (!exec_queue_killed(q) && !xe->devcoredump.captured && 1090 !xe_guc_capture_get_matching_and_lock(q)) { 1091 /* take force wake before engine register manual capture */ 1092 fw_ref = xe_force_wake_get(gt_to_fw(q->gt), XE_FORCEWAKE_ALL); 1093 if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL)) 1094 xe_gt_info(q->gt, "failed to get forcewake for coredump capture\n"); 1095 1096 xe_engine_snapshot_capture_for_queue(q); 1097 1098 xe_force_wake_put(gt_to_fw(q->gt), fw_ref); 1099 } 1100 1101 /* 1102 * XXX: Sampling timeout doesn't work in wedged mode as we have to 1103 * modify scheduling state to read timestamp. We could read the 1104 * timestamp from a register to accumulate current running time but this 1105 * doesn't work for SRIOV. For now assuming timeouts in wedged mode are 1106 * genuine timeouts. 1107 */ 1108 wedged = guc_submit_hint_wedged(exec_queue_to_guc(q)); 1109 1110 /* Engine state now stable, disable scheduling to check timestamp */ 1111 if (!wedged && exec_queue_registered(q)) { 1112 int ret; 1113 1114 if (exec_queue_reset(q)) 1115 err = -EIO; 1116 1117 if (!exec_queue_destroyed(q)) { 1118 /* 1119 * Wait for any pending G2H to flush out before 1120 * modifying state 1121 */ 1122 ret = wait_event_timeout(guc->ct.wq, 1123 (!exec_queue_pending_enable(q) && 1124 !exec_queue_pending_disable(q)) || 1125 xe_guc_read_stopped(guc), HZ * 5); 1126 if (!ret || xe_guc_read_stopped(guc)) 1127 goto trigger_reset; 1128 1129 /* 1130 * Flag communicates to G2H handler that schedule 1131 * disable originated from a timeout check. The G2H then 1132 * avoid triggering cleanup or deregistering the exec 1133 * queue. 1134 */ 1135 set_exec_queue_check_timeout(q); 1136 disable_scheduling(q, skip_timeout_check); 1137 } 1138 1139 /* 1140 * Must wait for scheduling to be disabled before signalling 1141 * any fences, if GT broken the GT reset code should signal us. 1142 * 1143 * FIXME: Tests can generate a ton of 0x6000 (IOMMU CAT fault 1144 * error) messages which can cause the schedule disable to get 1145 * lost. If this occurs, trigger a GT reset to recover. 1146 */ 1147 smp_rmb(); 1148 ret = wait_event_timeout(guc->ct.wq, 1149 !exec_queue_pending_disable(q) || 1150 xe_guc_read_stopped(guc), HZ * 5); 1151 if (!ret || xe_guc_read_stopped(guc)) { 1152 trigger_reset: 1153 if (!ret) 1154 xe_gt_warn(guc_to_gt(guc), 1155 "Schedule disable failed to respond, guc_id=%d", 1156 q->guc->id); 1157 xe_devcoredump(q, job, 1158 "Schedule disable failed to respond, guc_id=%d, ret=%d, guc_read=%d", 1159 q->guc->id, ret, xe_guc_read_stopped(guc)); 1160 set_exec_queue_extra_ref(q); 1161 xe_exec_queue_get(q); /* GT reset owns this */ 1162 set_exec_queue_banned(q); 1163 xe_gt_reset_async(q->gt); 1164 xe_sched_tdr_queue_imm(sched); 1165 goto rearm; 1166 } 1167 } 1168 1169 /* 1170 * Check if job is actually timed out, if so restart job execution and TDR 1171 */ 1172 if (!wedged && !skip_timeout_check && !check_timeout(q, job) && 1173 !exec_queue_reset(q) && exec_queue_registered(q)) { 1174 clear_exec_queue_check_timeout(q); 1175 goto sched_enable; 1176 } 1177 1178 if (q->vm && q->vm->xef) { 1179 process_name = q->vm->xef->process_name; 1180 pid = q->vm->xef->pid; 1181 } 1182 1183 if (!exec_queue_killed(q)) 1184 xe_gt_notice(guc_to_gt(guc), 1185 "Timedout job: seqno=%u, lrc_seqno=%u, guc_id=%d, flags=0x%lx in %s [%d]", 1186 xe_sched_job_seqno(job), xe_sched_job_lrc_seqno(job), 1187 q->guc->id, q->flags, process_name, pid); 1188 1189 trace_xe_sched_job_timedout(job); 1190 1191 if (!exec_queue_killed(q)) 1192 xe_devcoredump(q, job, 1193 "Timedout job - seqno=%u, lrc_seqno=%u, guc_id=%d, flags=0x%lx", 1194 xe_sched_job_seqno(job), xe_sched_job_lrc_seqno(job), 1195 q->guc->id, q->flags); 1196 1197 /* 1198 * Kernel jobs should never fail, nor should VM jobs if they do 1199 * somethings has gone wrong and the GT needs a reset 1200 */ 1201 xe_gt_WARN(q->gt, q->flags & EXEC_QUEUE_FLAG_KERNEL, 1202 "Kernel-submitted job timed out\n"); 1203 xe_gt_WARN(q->gt, q->flags & EXEC_QUEUE_FLAG_VM && !exec_queue_killed(q), 1204 "VM job timed out on non-killed execqueue\n"); 1205 if (!wedged && (q->flags & EXEC_QUEUE_FLAG_KERNEL || 1206 (q->flags & EXEC_QUEUE_FLAG_VM && !exec_queue_killed(q)))) { 1207 if (!xe_sched_invalidate_job(job, 2)) { 1208 clear_exec_queue_check_timeout(q); 1209 xe_gt_reset_async(q->gt); 1210 goto rearm; 1211 } 1212 } 1213 1214 /* Finish cleaning up exec queue via deregister */ 1215 set_exec_queue_banned(q); 1216 if (!wedged && exec_queue_registered(q) && !exec_queue_destroyed(q)) { 1217 set_exec_queue_extra_ref(q); 1218 xe_exec_queue_get(q); 1219 __deregister_exec_queue(guc, q); 1220 } 1221 1222 /* Stop fence signaling */ 1223 xe_hw_fence_irq_stop(q->fence_irq); 1224 1225 /* 1226 * Fence state now stable, stop / start scheduler which cleans up any 1227 * fences that are complete 1228 */ 1229 xe_sched_add_pending_job(sched, job); 1230 xe_sched_submission_start(sched); 1231 1232 xe_guc_exec_queue_trigger_cleanup(q); 1233 1234 /* Mark all outstanding jobs as bad, thus completing them */ 1235 spin_lock(&sched->base.job_list_lock); 1236 list_for_each_entry(tmp_job, &sched->base.pending_list, drm.list) 1237 xe_sched_job_set_error(tmp_job, !i++ ? err : -ECANCELED); 1238 spin_unlock(&sched->base.job_list_lock); 1239 1240 /* Start fence signaling */ 1241 xe_hw_fence_irq_start(q->fence_irq); 1242 1243 return DRM_GPU_SCHED_STAT_NOMINAL; 1244 1245 sched_enable: 1246 enable_scheduling(q); 1247 rearm: 1248 /* 1249 * XXX: Ideally want to adjust timeout based on current execution time 1250 * but there is not currently an easy way to do in DRM scheduler. With 1251 * some thought, do this in a follow up. 1252 */ 1253 xe_sched_add_pending_job(sched, job); 1254 xe_sched_submission_start(sched); 1255 1256 return DRM_GPU_SCHED_STAT_NOMINAL; 1257 } 1258 1259 static void __guc_exec_queue_fini_async(struct work_struct *w) 1260 { 1261 struct xe_guc_exec_queue *ge = 1262 container_of(w, struct xe_guc_exec_queue, fini_async); 1263 struct xe_exec_queue *q = ge->q; 1264 struct xe_guc *guc = exec_queue_to_guc(q); 1265 1266 xe_pm_runtime_get(guc_to_xe(guc)); 1267 trace_xe_exec_queue_destroy(q); 1268 1269 release_guc_id(guc, q); 1270 if (xe_exec_queue_is_lr(q)) 1271 cancel_work_sync(&ge->lr_tdr); 1272 /* Confirm no work left behind accessing device structures */ 1273 cancel_delayed_work_sync(&ge->sched.base.work_tdr); 1274 xe_sched_entity_fini(&ge->entity); 1275 xe_sched_fini(&ge->sched); 1276 1277 kfree(ge); 1278 xe_exec_queue_fini(q); 1279 xe_pm_runtime_put(guc_to_xe(guc)); 1280 } 1281 1282 static void guc_exec_queue_fini_async(struct xe_exec_queue *q) 1283 { 1284 struct xe_guc *guc = exec_queue_to_guc(q); 1285 struct xe_device *xe = guc_to_xe(guc); 1286 1287 INIT_WORK(&q->guc->fini_async, __guc_exec_queue_fini_async); 1288 1289 /* We must block on kernel engines so slabs are empty on driver unload */ 1290 if (q->flags & EXEC_QUEUE_FLAG_PERMANENT || exec_queue_wedged(q)) 1291 __guc_exec_queue_fini_async(&q->guc->fini_async); 1292 else 1293 queue_work(xe->destroy_wq, &q->guc->fini_async); 1294 } 1295 1296 static void __guc_exec_queue_fini(struct xe_guc *guc, struct xe_exec_queue *q) 1297 { 1298 /* 1299 * Might be done from within the GPU scheduler, need to do async as we 1300 * fini the scheduler when the engine is fini'd, the scheduler can't 1301 * complete fini within itself (circular dependency). Async resolves 1302 * this we and don't really care when everything is fini'd, just that it 1303 * is. 1304 */ 1305 guc_exec_queue_fini_async(q); 1306 } 1307 1308 static void __guc_exec_queue_process_msg_cleanup(struct xe_sched_msg *msg) 1309 { 1310 struct xe_exec_queue *q = msg->private_data; 1311 struct xe_guc *guc = exec_queue_to_guc(q); 1312 1313 xe_gt_assert(guc_to_gt(guc), !(q->flags & EXEC_QUEUE_FLAG_PERMANENT)); 1314 trace_xe_exec_queue_cleanup_entity(q); 1315 1316 if (exec_queue_registered(q)) 1317 disable_scheduling_deregister(guc, q); 1318 else 1319 __guc_exec_queue_fini(guc, q); 1320 } 1321 1322 static bool guc_exec_queue_allowed_to_change_state(struct xe_exec_queue *q) 1323 { 1324 return !exec_queue_killed_or_banned_or_wedged(q) && exec_queue_registered(q); 1325 } 1326 1327 static void __guc_exec_queue_process_msg_set_sched_props(struct xe_sched_msg *msg) 1328 { 1329 struct xe_exec_queue *q = msg->private_data; 1330 struct xe_guc *guc = exec_queue_to_guc(q); 1331 1332 if (guc_exec_queue_allowed_to_change_state(q)) 1333 init_policies(guc, q); 1334 kfree(msg); 1335 } 1336 1337 static void __suspend_fence_signal(struct xe_exec_queue *q) 1338 { 1339 if (!q->guc->suspend_pending) 1340 return; 1341 1342 WRITE_ONCE(q->guc->suspend_pending, false); 1343 wake_up(&q->guc->suspend_wait); 1344 } 1345 1346 static void suspend_fence_signal(struct xe_exec_queue *q) 1347 { 1348 struct xe_guc *guc = exec_queue_to_guc(q); 1349 1350 xe_gt_assert(guc_to_gt(guc), exec_queue_suspended(q) || exec_queue_killed(q) || 1351 xe_guc_read_stopped(guc)); 1352 xe_gt_assert(guc_to_gt(guc), q->guc->suspend_pending); 1353 1354 __suspend_fence_signal(q); 1355 } 1356 1357 static void __guc_exec_queue_process_msg_suspend(struct xe_sched_msg *msg) 1358 { 1359 struct xe_exec_queue *q = msg->private_data; 1360 struct xe_guc *guc = exec_queue_to_guc(q); 1361 1362 if (guc_exec_queue_allowed_to_change_state(q) && !exec_queue_suspended(q) && 1363 exec_queue_enabled(q)) { 1364 wait_event(guc->ct.wq, (q->guc->resume_time != RESUME_PENDING || 1365 xe_guc_read_stopped(guc)) && !exec_queue_pending_disable(q)); 1366 1367 if (!xe_guc_read_stopped(guc)) { 1368 s64 since_resume_ms = 1369 ktime_ms_delta(ktime_get(), 1370 q->guc->resume_time); 1371 s64 wait_ms = q->vm->preempt.min_run_period_ms - 1372 since_resume_ms; 1373 1374 if (wait_ms > 0 && q->guc->resume_time) 1375 msleep(wait_ms); 1376 1377 set_exec_queue_suspended(q); 1378 disable_scheduling(q, false); 1379 } 1380 } else if (q->guc->suspend_pending) { 1381 set_exec_queue_suspended(q); 1382 suspend_fence_signal(q); 1383 } 1384 } 1385 1386 static void __guc_exec_queue_process_msg_resume(struct xe_sched_msg *msg) 1387 { 1388 struct xe_exec_queue *q = msg->private_data; 1389 1390 if (guc_exec_queue_allowed_to_change_state(q)) { 1391 clear_exec_queue_suspended(q); 1392 if (!exec_queue_enabled(q)) { 1393 q->guc->resume_time = RESUME_PENDING; 1394 enable_scheduling(q); 1395 } 1396 } else { 1397 clear_exec_queue_suspended(q); 1398 } 1399 } 1400 1401 #define CLEANUP 1 /* Non-zero values to catch uninitialized msg */ 1402 #define SET_SCHED_PROPS 2 1403 #define SUSPEND 3 1404 #define RESUME 4 1405 #define OPCODE_MASK 0xf 1406 #define MSG_LOCKED BIT(8) 1407 1408 static void guc_exec_queue_process_msg(struct xe_sched_msg *msg) 1409 { 1410 struct xe_device *xe = guc_to_xe(exec_queue_to_guc(msg->private_data)); 1411 1412 trace_xe_sched_msg_recv(msg); 1413 1414 switch (msg->opcode) { 1415 case CLEANUP: 1416 __guc_exec_queue_process_msg_cleanup(msg); 1417 break; 1418 case SET_SCHED_PROPS: 1419 __guc_exec_queue_process_msg_set_sched_props(msg); 1420 break; 1421 case SUSPEND: 1422 __guc_exec_queue_process_msg_suspend(msg); 1423 break; 1424 case RESUME: 1425 __guc_exec_queue_process_msg_resume(msg); 1426 break; 1427 default: 1428 XE_WARN_ON("Unknown message type"); 1429 } 1430 1431 xe_pm_runtime_put(xe); 1432 } 1433 1434 static const struct drm_sched_backend_ops drm_sched_ops = { 1435 .run_job = guc_exec_queue_run_job, 1436 .free_job = guc_exec_queue_free_job, 1437 .timedout_job = guc_exec_queue_timedout_job, 1438 }; 1439 1440 static const struct xe_sched_backend_ops xe_sched_ops = { 1441 .process_msg = guc_exec_queue_process_msg, 1442 }; 1443 1444 static int guc_exec_queue_init(struct xe_exec_queue *q) 1445 { 1446 struct xe_gpu_scheduler *sched; 1447 struct xe_guc *guc = exec_queue_to_guc(q); 1448 struct xe_guc_exec_queue *ge; 1449 long timeout; 1450 int err, i; 1451 1452 xe_gt_assert(guc_to_gt(guc), xe_device_uc_enabled(guc_to_xe(guc))); 1453 1454 ge = kzalloc(sizeof(*ge), GFP_KERNEL); 1455 if (!ge) 1456 return -ENOMEM; 1457 1458 q->guc = ge; 1459 ge->q = q; 1460 init_waitqueue_head(&ge->suspend_wait); 1461 1462 for (i = 0; i < MAX_STATIC_MSG_TYPE; ++i) 1463 INIT_LIST_HEAD(&ge->static_msgs[i].link); 1464 1465 timeout = (q->vm && xe_vm_in_lr_mode(q->vm)) ? MAX_SCHEDULE_TIMEOUT : 1466 msecs_to_jiffies(q->sched_props.job_timeout_ms); 1467 err = xe_sched_init(&ge->sched, &drm_sched_ops, &xe_sched_ops, 1468 NULL, q->lrc[0]->ring.size / MAX_JOB_SIZE_BYTES, 64, 1469 timeout, guc_to_gt(guc)->ordered_wq, NULL, 1470 q->name, gt_to_xe(q->gt)->drm.dev); 1471 if (err) 1472 goto err_free; 1473 1474 sched = &ge->sched; 1475 err = xe_sched_entity_init(&ge->entity, sched); 1476 if (err) 1477 goto err_sched; 1478 1479 if (xe_exec_queue_is_lr(q)) 1480 INIT_WORK(&q->guc->lr_tdr, xe_guc_exec_queue_lr_cleanup); 1481 1482 mutex_lock(&guc->submission_state.lock); 1483 1484 err = alloc_guc_id(guc, q); 1485 if (err) 1486 goto err_entity; 1487 1488 q->entity = &ge->entity; 1489 1490 if (xe_guc_read_stopped(guc)) 1491 xe_sched_stop(sched); 1492 1493 mutex_unlock(&guc->submission_state.lock); 1494 1495 xe_exec_queue_assign_name(q, q->guc->id); 1496 1497 trace_xe_exec_queue_create(q); 1498 1499 return 0; 1500 1501 err_entity: 1502 mutex_unlock(&guc->submission_state.lock); 1503 xe_sched_entity_fini(&ge->entity); 1504 err_sched: 1505 xe_sched_fini(&ge->sched); 1506 err_free: 1507 kfree(ge); 1508 1509 return err; 1510 } 1511 1512 static void guc_exec_queue_kill(struct xe_exec_queue *q) 1513 { 1514 trace_xe_exec_queue_kill(q); 1515 set_exec_queue_killed(q); 1516 __suspend_fence_signal(q); 1517 xe_guc_exec_queue_trigger_cleanup(q); 1518 } 1519 1520 static void guc_exec_queue_add_msg(struct xe_exec_queue *q, struct xe_sched_msg *msg, 1521 u32 opcode) 1522 { 1523 xe_pm_runtime_get_noresume(guc_to_xe(exec_queue_to_guc(q))); 1524 1525 INIT_LIST_HEAD(&msg->link); 1526 msg->opcode = opcode & OPCODE_MASK; 1527 msg->private_data = q; 1528 1529 trace_xe_sched_msg_add(msg); 1530 if (opcode & MSG_LOCKED) 1531 xe_sched_add_msg_locked(&q->guc->sched, msg); 1532 else 1533 xe_sched_add_msg(&q->guc->sched, msg); 1534 } 1535 1536 static bool guc_exec_queue_try_add_msg(struct xe_exec_queue *q, 1537 struct xe_sched_msg *msg, 1538 u32 opcode) 1539 { 1540 if (!list_empty(&msg->link)) 1541 return false; 1542 1543 guc_exec_queue_add_msg(q, msg, opcode | MSG_LOCKED); 1544 1545 return true; 1546 } 1547 1548 #define STATIC_MSG_CLEANUP 0 1549 #define STATIC_MSG_SUSPEND 1 1550 #define STATIC_MSG_RESUME 2 1551 static void guc_exec_queue_fini(struct xe_exec_queue *q) 1552 { 1553 struct xe_sched_msg *msg = q->guc->static_msgs + STATIC_MSG_CLEANUP; 1554 1555 if (!(q->flags & EXEC_QUEUE_FLAG_PERMANENT) && !exec_queue_wedged(q)) 1556 guc_exec_queue_add_msg(q, msg, CLEANUP); 1557 else 1558 __guc_exec_queue_fini(exec_queue_to_guc(q), q); 1559 } 1560 1561 static int guc_exec_queue_set_priority(struct xe_exec_queue *q, 1562 enum xe_exec_queue_priority priority) 1563 { 1564 struct xe_sched_msg *msg; 1565 1566 if (q->sched_props.priority == priority || 1567 exec_queue_killed_or_banned_or_wedged(q)) 1568 return 0; 1569 1570 msg = kmalloc(sizeof(*msg), GFP_KERNEL); 1571 if (!msg) 1572 return -ENOMEM; 1573 1574 q->sched_props.priority = priority; 1575 guc_exec_queue_add_msg(q, msg, SET_SCHED_PROPS); 1576 1577 return 0; 1578 } 1579 1580 static int guc_exec_queue_set_timeslice(struct xe_exec_queue *q, u32 timeslice_us) 1581 { 1582 struct xe_sched_msg *msg; 1583 1584 if (q->sched_props.timeslice_us == timeslice_us || 1585 exec_queue_killed_or_banned_or_wedged(q)) 1586 return 0; 1587 1588 msg = kmalloc(sizeof(*msg), GFP_KERNEL); 1589 if (!msg) 1590 return -ENOMEM; 1591 1592 q->sched_props.timeslice_us = timeslice_us; 1593 guc_exec_queue_add_msg(q, msg, SET_SCHED_PROPS); 1594 1595 return 0; 1596 } 1597 1598 static int guc_exec_queue_set_preempt_timeout(struct xe_exec_queue *q, 1599 u32 preempt_timeout_us) 1600 { 1601 struct xe_sched_msg *msg; 1602 1603 if (q->sched_props.preempt_timeout_us == preempt_timeout_us || 1604 exec_queue_killed_or_banned_or_wedged(q)) 1605 return 0; 1606 1607 msg = kmalloc(sizeof(*msg), GFP_KERNEL); 1608 if (!msg) 1609 return -ENOMEM; 1610 1611 q->sched_props.preempt_timeout_us = preempt_timeout_us; 1612 guc_exec_queue_add_msg(q, msg, SET_SCHED_PROPS); 1613 1614 return 0; 1615 } 1616 1617 static int guc_exec_queue_suspend(struct xe_exec_queue *q) 1618 { 1619 struct xe_gpu_scheduler *sched = &q->guc->sched; 1620 struct xe_sched_msg *msg = q->guc->static_msgs + STATIC_MSG_SUSPEND; 1621 1622 if (exec_queue_killed_or_banned_or_wedged(q)) 1623 return -EINVAL; 1624 1625 xe_sched_msg_lock(sched); 1626 if (guc_exec_queue_try_add_msg(q, msg, SUSPEND)) 1627 q->guc->suspend_pending = true; 1628 xe_sched_msg_unlock(sched); 1629 1630 return 0; 1631 } 1632 1633 static int guc_exec_queue_suspend_wait(struct xe_exec_queue *q) 1634 { 1635 struct xe_guc *guc = exec_queue_to_guc(q); 1636 int ret; 1637 1638 /* 1639 * Likely don't need to check exec_queue_killed() as we clear 1640 * suspend_pending upon kill but to be paranoid but races in which 1641 * suspend_pending is set after kill also check kill here. 1642 */ 1643 ret = wait_event_interruptible_timeout(q->guc->suspend_wait, 1644 !READ_ONCE(q->guc->suspend_pending) || 1645 exec_queue_killed(q) || 1646 xe_guc_read_stopped(guc), 1647 HZ * 5); 1648 1649 if (!ret) { 1650 xe_gt_warn(guc_to_gt(guc), 1651 "Suspend fence, guc_id=%d, failed to respond", 1652 q->guc->id); 1653 /* XXX: Trigger GT reset? */ 1654 return -ETIME; 1655 } 1656 1657 return ret < 0 ? ret : 0; 1658 } 1659 1660 static void guc_exec_queue_resume(struct xe_exec_queue *q) 1661 { 1662 struct xe_gpu_scheduler *sched = &q->guc->sched; 1663 struct xe_sched_msg *msg = q->guc->static_msgs + STATIC_MSG_RESUME; 1664 struct xe_guc *guc = exec_queue_to_guc(q); 1665 1666 xe_gt_assert(guc_to_gt(guc), !q->guc->suspend_pending); 1667 1668 xe_sched_msg_lock(sched); 1669 guc_exec_queue_try_add_msg(q, msg, RESUME); 1670 xe_sched_msg_unlock(sched); 1671 } 1672 1673 static bool guc_exec_queue_reset_status(struct xe_exec_queue *q) 1674 { 1675 return exec_queue_reset(q) || exec_queue_killed_or_banned_or_wedged(q); 1676 } 1677 1678 /* 1679 * All of these functions are an abstraction layer which other parts of XE can 1680 * use to trap into the GuC backend. All of these functions, aside from init, 1681 * really shouldn't do much other than trap into the DRM scheduler which 1682 * synchronizes these operations. 1683 */ 1684 static const struct xe_exec_queue_ops guc_exec_queue_ops = { 1685 .init = guc_exec_queue_init, 1686 .kill = guc_exec_queue_kill, 1687 .fini = guc_exec_queue_fini, 1688 .set_priority = guc_exec_queue_set_priority, 1689 .set_timeslice = guc_exec_queue_set_timeslice, 1690 .set_preempt_timeout = guc_exec_queue_set_preempt_timeout, 1691 .suspend = guc_exec_queue_suspend, 1692 .suspend_wait = guc_exec_queue_suspend_wait, 1693 .resume = guc_exec_queue_resume, 1694 .reset_status = guc_exec_queue_reset_status, 1695 }; 1696 1697 static void guc_exec_queue_stop(struct xe_guc *guc, struct xe_exec_queue *q) 1698 { 1699 struct xe_gpu_scheduler *sched = &q->guc->sched; 1700 1701 /* Stop scheduling + flush any DRM scheduler operations */ 1702 xe_sched_submission_stop(sched); 1703 1704 /* Clean up lost G2H + reset engine state */ 1705 if (exec_queue_registered(q)) { 1706 if (exec_queue_extra_ref(q) || xe_exec_queue_is_lr(q)) 1707 xe_exec_queue_put(q); 1708 else if (exec_queue_destroyed(q)) 1709 __guc_exec_queue_fini(guc, q); 1710 } 1711 if (q->guc->suspend_pending) { 1712 set_exec_queue_suspended(q); 1713 suspend_fence_signal(q); 1714 } 1715 atomic_and(EXEC_QUEUE_STATE_WEDGED | EXEC_QUEUE_STATE_BANNED | 1716 EXEC_QUEUE_STATE_KILLED | EXEC_QUEUE_STATE_DESTROYED | 1717 EXEC_QUEUE_STATE_SUSPENDED, 1718 &q->guc->state); 1719 q->guc->resume_time = 0; 1720 trace_xe_exec_queue_stop(q); 1721 1722 /* 1723 * Ban any engine (aside from kernel and engines used for VM ops) with a 1724 * started but not complete job or if a job has gone through a GT reset 1725 * more than twice. 1726 */ 1727 if (!(q->flags & (EXEC_QUEUE_FLAG_KERNEL | EXEC_QUEUE_FLAG_VM))) { 1728 struct xe_sched_job *job = xe_sched_first_pending_job(sched); 1729 bool ban = false; 1730 1731 if (job) { 1732 if ((xe_sched_job_started(job) && 1733 !xe_sched_job_completed(job)) || 1734 xe_sched_invalidate_job(job, 2)) { 1735 trace_xe_sched_job_ban(job); 1736 ban = true; 1737 } 1738 } else if (xe_exec_queue_is_lr(q) && 1739 !xe_lrc_ring_is_idle(q->lrc[0])) { 1740 ban = true; 1741 } 1742 1743 if (ban) { 1744 set_exec_queue_banned(q); 1745 xe_guc_exec_queue_trigger_cleanup(q); 1746 } 1747 } 1748 } 1749 1750 int xe_guc_submit_reset_prepare(struct xe_guc *guc) 1751 { 1752 int ret; 1753 1754 /* 1755 * Using an atomic here rather than submission_state.lock as this 1756 * function can be called while holding the CT lock (engine reset 1757 * failure). submission_state.lock needs the CT lock to resubmit jobs. 1758 * Atomic is not ideal, but it works to prevent against concurrent reset 1759 * and releasing any TDRs waiting on guc->submission_state.stopped. 1760 */ 1761 ret = atomic_fetch_or(1, &guc->submission_state.stopped); 1762 smp_wmb(); 1763 wake_up_all(&guc->ct.wq); 1764 1765 return ret; 1766 } 1767 1768 void xe_guc_submit_reset_wait(struct xe_guc *guc) 1769 { 1770 wait_event(guc->ct.wq, xe_device_wedged(guc_to_xe(guc)) || 1771 !xe_guc_read_stopped(guc)); 1772 } 1773 1774 void xe_guc_submit_stop(struct xe_guc *guc) 1775 { 1776 struct xe_exec_queue *q; 1777 unsigned long index; 1778 1779 xe_gt_assert(guc_to_gt(guc), xe_guc_read_stopped(guc) == 1); 1780 1781 mutex_lock(&guc->submission_state.lock); 1782 1783 xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) { 1784 /* Prevent redundant attempts to stop parallel queues */ 1785 if (q->guc->id != index) 1786 continue; 1787 1788 guc_exec_queue_stop(guc, q); 1789 } 1790 1791 mutex_unlock(&guc->submission_state.lock); 1792 1793 /* 1794 * No one can enter the backend at this point, aside from new engine 1795 * creation which is protected by guc->submission_state.lock. 1796 */ 1797 1798 } 1799 1800 static void guc_exec_queue_start(struct xe_exec_queue *q) 1801 { 1802 struct xe_gpu_scheduler *sched = &q->guc->sched; 1803 1804 if (!exec_queue_killed_or_banned_or_wedged(q)) { 1805 int i; 1806 1807 trace_xe_exec_queue_resubmit(q); 1808 for (i = 0; i < q->width; ++i) 1809 xe_lrc_set_ring_head(q->lrc[i], q->lrc[i]->ring.tail); 1810 xe_sched_resubmit_jobs(sched); 1811 } 1812 1813 xe_sched_submission_start(sched); 1814 xe_sched_submission_resume_tdr(sched); 1815 } 1816 1817 int xe_guc_submit_start(struct xe_guc *guc) 1818 { 1819 struct xe_exec_queue *q; 1820 unsigned long index; 1821 1822 xe_gt_assert(guc_to_gt(guc), xe_guc_read_stopped(guc) == 1); 1823 1824 mutex_lock(&guc->submission_state.lock); 1825 atomic_dec(&guc->submission_state.stopped); 1826 xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) { 1827 /* Prevent redundant attempts to start parallel queues */ 1828 if (q->guc->id != index) 1829 continue; 1830 1831 guc_exec_queue_start(q); 1832 } 1833 mutex_unlock(&guc->submission_state.lock); 1834 1835 wake_up_all(&guc->ct.wq); 1836 1837 return 0; 1838 } 1839 1840 static struct xe_exec_queue * 1841 g2h_exec_queue_lookup(struct xe_guc *guc, u32 guc_id) 1842 { 1843 struct xe_gt *gt = guc_to_gt(guc); 1844 struct xe_exec_queue *q; 1845 1846 if (unlikely(guc_id >= GUC_ID_MAX)) { 1847 xe_gt_err(gt, "Invalid guc_id %u\n", guc_id); 1848 return NULL; 1849 } 1850 1851 q = xa_load(&guc->submission_state.exec_queue_lookup, guc_id); 1852 if (unlikely(!q)) { 1853 xe_gt_err(gt, "Not engine present for guc_id %u\n", guc_id); 1854 return NULL; 1855 } 1856 1857 xe_gt_assert(guc_to_gt(guc), guc_id >= q->guc->id); 1858 xe_gt_assert(guc_to_gt(guc), guc_id < (q->guc->id + q->width)); 1859 1860 return q; 1861 } 1862 1863 static void deregister_exec_queue(struct xe_guc *guc, struct xe_exec_queue *q) 1864 { 1865 u32 action[] = { 1866 XE_GUC_ACTION_DEREGISTER_CONTEXT, 1867 q->guc->id, 1868 }; 1869 1870 xe_gt_assert(guc_to_gt(guc), exec_queue_destroyed(q)); 1871 xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q)); 1872 xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_disable(q)); 1873 xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_enable(q)); 1874 1875 trace_xe_exec_queue_deregister(q); 1876 1877 xe_guc_ct_send_g2h_handler(&guc->ct, action, ARRAY_SIZE(action)); 1878 } 1879 1880 static void handle_sched_done(struct xe_guc *guc, struct xe_exec_queue *q, 1881 u32 runnable_state) 1882 { 1883 trace_xe_exec_queue_scheduling_done(q); 1884 1885 if (runnable_state == 1) { 1886 xe_gt_assert(guc_to_gt(guc), exec_queue_pending_enable(q)); 1887 1888 q->guc->resume_time = ktime_get(); 1889 clear_exec_queue_pending_enable(q); 1890 smp_wmb(); 1891 wake_up_all(&guc->ct.wq); 1892 } else { 1893 bool check_timeout = exec_queue_check_timeout(q); 1894 1895 xe_gt_assert(guc_to_gt(guc), runnable_state == 0); 1896 xe_gt_assert(guc_to_gt(guc), exec_queue_pending_disable(q)); 1897 1898 if (q->guc->suspend_pending) { 1899 suspend_fence_signal(q); 1900 clear_exec_queue_pending_disable(q); 1901 } else { 1902 if (exec_queue_banned(q) || check_timeout) { 1903 smp_wmb(); 1904 wake_up_all(&guc->ct.wq); 1905 } 1906 if (!check_timeout && exec_queue_destroyed(q)) { 1907 /* 1908 * Make sure to clear the pending_disable only 1909 * after sampling the destroyed state. We want 1910 * to ensure we don't trigger the unregister too 1911 * early with something intending to only 1912 * disable scheduling. The caller doing the 1913 * destroy must wait for an ongoing 1914 * pending_disable before marking as destroyed. 1915 */ 1916 clear_exec_queue_pending_disable(q); 1917 deregister_exec_queue(guc, q); 1918 } else { 1919 clear_exec_queue_pending_disable(q); 1920 } 1921 } 1922 } 1923 } 1924 1925 int xe_guc_sched_done_handler(struct xe_guc *guc, u32 *msg, u32 len) 1926 { 1927 struct xe_exec_queue *q; 1928 u32 guc_id, runnable_state; 1929 1930 if (unlikely(len < 2)) 1931 return -EPROTO; 1932 1933 guc_id = msg[0]; 1934 runnable_state = msg[1]; 1935 1936 q = g2h_exec_queue_lookup(guc, guc_id); 1937 if (unlikely(!q)) 1938 return -EPROTO; 1939 1940 if (unlikely(!exec_queue_pending_enable(q) && 1941 !exec_queue_pending_disable(q))) { 1942 xe_gt_err(guc_to_gt(guc), 1943 "SCHED_DONE: Unexpected engine state 0x%04x, guc_id=%d, runnable_state=%u", 1944 atomic_read(&q->guc->state), q->guc->id, 1945 runnable_state); 1946 return -EPROTO; 1947 } 1948 1949 handle_sched_done(guc, q, runnable_state); 1950 1951 return 0; 1952 } 1953 1954 static void handle_deregister_done(struct xe_guc *guc, struct xe_exec_queue *q) 1955 { 1956 trace_xe_exec_queue_deregister_done(q); 1957 1958 clear_exec_queue_registered(q); 1959 1960 if (exec_queue_extra_ref(q) || xe_exec_queue_is_lr(q)) 1961 xe_exec_queue_put(q); 1962 else 1963 __guc_exec_queue_fini(guc, q); 1964 } 1965 1966 int xe_guc_deregister_done_handler(struct xe_guc *guc, u32 *msg, u32 len) 1967 { 1968 struct xe_exec_queue *q; 1969 u32 guc_id; 1970 1971 if (unlikely(len < 1)) 1972 return -EPROTO; 1973 1974 guc_id = msg[0]; 1975 1976 q = g2h_exec_queue_lookup(guc, guc_id); 1977 if (unlikely(!q)) 1978 return -EPROTO; 1979 1980 if (!exec_queue_destroyed(q) || exec_queue_pending_disable(q) || 1981 exec_queue_pending_enable(q) || exec_queue_enabled(q)) { 1982 xe_gt_err(guc_to_gt(guc), 1983 "DEREGISTER_DONE: Unexpected engine state 0x%04x, guc_id=%d", 1984 atomic_read(&q->guc->state), q->guc->id); 1985 return -EPROTO; 1986 } 1987 1988 handle_deregister_done(guc, q); 1989 1990 return 0; 1991 } 1992 1993 int xe_guc_exec_queue_reset_handler(struct xe_guc *guc, u32 *msg, u32 len) 1994 { 1995 struct xe_gt *gt = guc_to_gt(guc); 1996 struct xe_exec_queue *q; 1997 u32 guc_id; 1998 1999 if (unlikely(len < 1)) 2000 return -EPROTO; 2001 2002 guc_id = msg[0]; 2003 2004 q = g2h_exec_queue_lookup(guc, guc_id); 2005 if (unlikely(!q)) 2006 return -EPROTO; 2007 2008 xe_gt_info(gt, "Engine reset: engine_class=%s, logical_mask: 0x%x, guc_id=%d", 2009 xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id); 2010 2011 trace_xe_exec_queue_reset(q); 2012 2013 /* 2014 * A banned engine is a NOP at this point (came from 2015 * guc_exec_queue_timedout_job). Otherwise, kick drm scheduler to cancel 2016 * jobs by setting timeout of the job to the minimum value kicking 2017 * guc_exec_queue_timedout_job. 2018 */ 2019 set_exec_queue_reset(q); 2020 if (!exec_queue_banned(q) && !exec_queue_check_timeout(q)) 2021 xe_guc_exec_queue_trigger_cleanup(q); 2022 2023 return 0; 2024 } 2025 2026 /* 2027 * xe_guc_error_capture_handler - Handler of GuC captured message 2028 * @guc: The GuC object 2029 * @msg: Point to the message 2030 * @len: The message length 2031 * 2032 * When GuC captured data is ready, GuC will send message 2033 * XE_GUC_ACTION_STATE_CAPTURE_NOTIFICATION to host, this function will be 2034 * called 1st to check status before process the data comes with the message. 2035 * 2036 * Returns: error code. 0 if success 2037 */ 2038 int xe_guc_error_capture_handler(struct xe_guc *guc, u32 *msg, u32 len) 2039 { 2040 u32 status; 2041 2042 if (unlikely(len != XE_GUC_ACTION_STATE_CAPTURE_NOTIFICATION_DATA_LEN)) 2043 return -EPROTO; 2044 2045 status = msg[0] & XE_GUC_STATE_CAPTURE_EVENT_STATUS_MASK; 2046 if (status == XE_GUC_STATE_CAPTURE_EVENT_STATUS_NOSPACE) 2047 xe_gt_warn(guc_to_gt(guc), "G2H-Error capture no space"); 2048 2049 xe_guc_capture_process(guc); 2050 2051 return 0; 2052 } 2053 2054 int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg, 2055 u32 len) 2056 { 2057 struct xe_gt *gt = guc_to_gt(guc); 2058 struct xe_exec_queue *q; 2059 u32 guc_id; 2060 2061 if (unlikely(len < 1)) 2062 return -EPROTO; 2063 2064 guc_id = msg[0]; 2065 2066 if (guc_id == GUC_ID_UNKNOWN) { 2067 /* 2068 * GuC uses GUC_ID_UNKNOWN if it can not map the CAT fault to any PF/VF 2069 * context. In such case only PF will be notified about that fault. 2070 */ 2071 xe_gt_err_ratelimited(gt, "Memory CAT error reported by GuC!\n"); 2072 return 0; 2073 } 2074 2075 q = g2h_exec_queue_lookup(guc, guc_id); 2076 if (unlikely(!q)) 2077 return -EPROTO; 2078 2079 xe_gt_dbg(gt, "Engine memory cat error: engine_class=%s, logical_mask: 0x%x, guc_id=%d", 2080 xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id); 2081 2082 trace_xe_exec_queue_memory_cat_error(q); 2083 2084 /* Treat the same as engine reset */ 2085 set_exec_queue_reset(q); 2086 if (!exec_queue_banned(q) && !exec_queue_check_timeout(q)) 2087 xe_guc_exec_queue_trigger_cleanup(q); 2088 2089 return 0; 2090 } 2091 2092 int xe_guc_exec_queue_reset_failure_handler(struct xe_guc *guc, u32 *msg, u32 len) 2093 { 2094 struct xe_gt *gt = guc_to_gt(guc); 2095 u8 guc_class, instance; 2096 u32 reason; 2097 2098 if (unlikely(len != 3)) 2099 return -EPROTO; 2100 2101 guc_class = msg[0]; 2102 instance = msg[1]; 2103 reason = msg[2]; 2104 2105 /* Unexpected failure of a hardware feature, log an actual error */ 2106 xe_gt_err(gt, "GuC engine reset request failed on %d:%d because 0x%08X", 2107 guc_class, instance, reason); 2108 2109 xe_gt_reset_async(gt); 2110 2111 return 0; 2112 } 2113 2114 static void 2115 guc_exec_queue_wq_snapshot_capture(struct xe_exec_queue *q, 2116 struct xe_guc_submit_exec_queue_snapshot *snapshot) 2117 { 2118 struct xe_guc *guc = exec_queue_to_guc(q); 2119 struct xe_device *xe = guc_to_xe(guc); 2120 struct iosys_map map = xe_lrc_parallel_map(q->lrc[0]); 2121 int i; 2122 2123 snapshot->guc.wqi_head = q->guc->wqi_head; 2124 snapshot->guc.wqi_tail = q->guc->wqi_tail; 2125 snapshot->parallel.wq_desc.head = parallel_read(xe, map, wq_desc.head); 2126 snapshot->parallel.wq_desc.tail = parallel_read(xe, map, wq_desc.tail); 2127 snapshot->parallel.wq_desc.status = parallel_read(xe, map, 2128 wq_desc.wq_status); 2129 2130 if (snapshot->parallel.wq_desc.head != 2131 snapshot->parallel.wq_desc.tail) { 2132 for (i = snapshot->parallel.wq_desc.head; 2133 i != snapshot->parallel.wq_desc.tail; 2134 i = (i + sizeof(u32)) % WQ_SIZE) 2135 snapshot->parallel.wq[i / sizeof(u32)] = 2136 parallel_read(xe, map, wq[i / sizeof(u32)]); 2137 } 2138 } 2139 2140 static void 2141 guc_exec_queue_wq_snapshot_print(struct xe_guc_submit_exec_queue_snapshot *snapshot, 2142 struct drm_printer *p) 2143 { 2144 int i; 2145 2146 drm_printf(p, "\tWQ head: %u (internal), %d (memory)\n", 2147 snapshot->guc.wqi_head, snapshot->parallel.wq_desc.head); 2148 drm_printf(p, "\tWQ tail: %u (internal), %d (memory)\n", 2149 snapshot->guc.wqi_tail, snapshot->parallel.wq_desc.tail); 2150 drm_printf(p, "\tWQ status: %u\n", snapshot->parallel.wq_desc.status); 2151 2152 if (snapshot->parallel.wq_desc.head != 2153 snapshot->parallel.wq_desc.tail) { 2154 for (i = snapshot->parallel.wq_desc.head; 2155 i != snapshot->parallel.wq_desc.tail; 2156 i = (i + sizeof(u32)) % WQ_SIZE) 2157 drm_printf(p, "\tWQ[%zu]: 0x%08x\n", i / sizeof(u32), 2158 snapshot->parallel.wq[i / sizeof(u32)]); 2159 } 2160 } 2161 2162 /** 2163 * xe_guc_exec_queue_snapshot_capture - Take a quick snapshot of the GuC Engine. 2164 * @q: faulty exec queue 2165 * 2166 * This can be printed out in a later stage like during dev_coredump 2167 * analysis. 2168 * 2169 * Returns: a GuC Submit Engine snapshot object that must be freed by the 2170 * caller, using `xe_guc_exec_queue_snapshot_free`. 2171 */ 2172 struct xe_guc_submit_exec_queue_snapshot * 2173 xe_guc_exec_queue_snapshot_capture(struct xe_exec_queue *q) 2174 { 2175 struct xe_gpu_scheduler *sched = &q->guc->sched; 2176 struct xe_guc_submit_exec_queue_snapshot *snapshot; 2177 int i; 2178 2179 snapshot = kzalloc(sizeof(*snapshot), GFP_ATOMIC); 2180 2181 if (!snapshot) 2182 return NULL; 2183 2184 snapshot->guc.id = q->guc->id; 2185 memcpy(&snapshot->name, &q->name, sizeof(snapshot->name)); 2186 snapshot->class = q->class; 2187 snapshot->logical_mask = q->logical_mask; 2188 snapshot->width = q->width; 2189 snapshot->refcount = kref_read(&q->refcount); 2190 snapshot->sched_timeout = sched->base.timeout; 2191 snapshot->sched_props.timeslice_us = q->sched_props.timeslice_us; 2192 snapshot->sched_props.preempt_timeout_us = 2193 q->sched_props.preempt_timeout_us; 2194 2195 snapshot->lrc = kmalloc_array(q->width, sizeof(struct xe_lrc_snapshot *), 2196 GFP_ATOMIC); 2197 2198 if (snapshot->lrc) { 2199 for (i = 0; i < q->width; ++i) { 2200 struct xe_lrc *lrc = q->lrc[i]; 2201 2202 snapshot->lrc[i] = xe_lrc_snapshot_capture(lrc); 2203 } 2204 } 2205 2206 snapshot->schedule_state = atomic_read(&q->guc->state); 2207 snapshot->exec_queue_flags = q->flags; 2208 2209 snapshot->parallel_execution = xe_exec_queue_is_parallel(q); 2210 if (snapshot->parallel_execution) 2211 guc_exec_queue_wq_snapshot_capture(q, snapshot); 2212 2213 spin_lock(&sched->base.job_list_lock); 2214 snapshot->pending_list_size = list_count_nodes(&sched->base.pending_list); 2215 snapshot->pending_list = kmalloc_array(snapshot->pending_list_size, 2216 sizeof(struct pending_list_snapshot), 2217 GFP_ATOMIC); 2218 2219 if (snapshot->pending_list) { 2220 struct xe_sched_job *job_iter; 2221 2222 i = 0; 2223 list_for_each_entry(job_iter, &sched->base.pending_list, drm.list) { 2224 snapshot->pending_list[i].seqno = 2225 xe_sched_job_seqno(job_iter); 2226 snapshot->pending_list[i].fence = 2227 dma_fence_is_signaled(job_iter->fence) ? 1 : 0; 2228 snapshot->pending_list[i].finished = 2229 dma_fence_is_signaled(&job_iter->drm.s_fence->finished) 2230 ? 1 : 0; 2231 i++; 2232 } 2233 } 2234 2235 spin_unlock(&sched->base.job_list_lock); 2236 2237 return snapshot; 2238 } 2239 2240 /** 2241 * xe_guc_exec_queue_snapshot_capture_delayed - Take delayed part of snapshot of the GuC Engine. 2242 * @snapshot: Previously captured snapshot of job. 2243 * 2244 * This captures some data that requires taking some locks, so it cannot be done in signaling path. 2245 */ 2246 void 2247 xe_guc_exec_queue_snapshot_capture_delayed(struct xe_guc_submit_exec_queue_snapshot *snapshot) 2248 { 2249 int i; 2250 2251 if (!snapshot || !snapshot->lrc) 2252 return; 2253 2254 for (i = 0; i < snapshot->width; ++i) 2255 xe_lrc_snapshot_capture_delayed(snapshot->lrc[i]); 2256 } 2257 2258 /** 2259 * xe_guc_exec_queue_snapshot_print - Print out a given GuC Engine snapshot. 2260 * @snapshot: GuC Submit Engine snapshot object. 2261 * @p: drm_printer where it will be printed out. 2262 * 2263 * This function prints out a given GuC Submit Engine snapshot object. 2264 */ 2265 void 2266 xe_guc_exec_queue_snapshot_print(struct xe_guc_submit_exec_queue_snapshot *snapshot, 2267 struct drm_printer *p) 2268 { 2269 int i; 2270 2271 if (!snapshot) 2272 return; 2273 2274 drm_printf(p, "GuC ID: %d\n", snapshot->guc.id); 2275 drm_printf(p, "\tName: %s\n", snapshot->name); 2276 drm_printf(p, "\tClass: %d\n", snapshot->class); 2277 drm_printf(p, "\tLogical mask: 0x%x\n", snapshot->logical_mask); 2278 drm_printf(p, "\tWidth: %d\n", snapshot->width); 2279 drm_printf(p, "\tRef: %d\n", snapshot->refcount); 2280 drm_printf(p, "\tTimeout: %ld (ms)\n", snapshot->sched_timeout); 2281 drm_printf(p, "\tTimeslice: %u (us)\n", 2282 snapshot->sched_props.timeslice_us); 2283 drm_printf(p, "\tPreempt timeout: %u (us)\n", 2284 snapshot->sched_props.preempt_timeout_us); 2285 2286 for (i = 0; snapshot->lrc && i < snapshot->width; ++i) 2287 xe_lrc_snapshot_print(snapshot->lrc[i], p); 2288 2289 drm_printf(p, "\tSchedule State: 0x%x\n", snapshot->schedule_state); 2290 drm_printf(p, "\tFlags: 0x%lx\n", snapshot->exec_queue_flags); 2291 2292 if (snapshot->parallel_execution) 2293 guc_exec_queue_wq_snapshot_print(snapshot, p); 2294 2295 for (i = 0; snapshot->pending_list && i < snapshot->pending_list_size; 2296 i++) 2297 drm_printf(p, "\tJob: seqno=%d, fence=%d, finished=%d\n", 2298 snapshot->pending_list[i].seqno, 2299 snapshot->pending_list[i].fence, 2300 snapshot->pending_list[i].finished); 2301 } 2302 2303 /** 2304 * xe_guc_exec_queue_snapshot_free - Free all allocated objects for a given 2305 * snapshot. 2306 * @snapshot: GuC Submit Engine snapshot object. 2307 * 2308 * This function free all the memory that needed to be allocated at capture 2309 * time. 2310 */ 2311 void xe_guc_exec_queue_snapshot_free(struct xe_guc_submit_exec_queue_snapshot *snapshot) 2312 { 2313 int i; 2314 2315 if (!snapshot) 2316 return; 2317 2318 if (snapshot->lrc) { 2319 for (i = 0; i < snapshot->width; i++) 2320 xe_lrc_snapshot_free(snapshot->lrc[i]); 2321 kfree(snapshot->lrc); 2322 } 2323 kfree(snapshot->pending_list); 2324 kfree(snapshot); 2325 } 2326 2327 static void guc_exec_queue_print(struct xe_exec_queue *q, struct drm_printer *p) 2328 { 2329 struct xe_guc_submit_exec_queue_snapshot *snapshot; 2330 2331 snapshot = xe_guc_exec_queue_snapshot_capture(q); 2332 xe_guc_exec_queue_snapshot_print(snapshot, p); 2333 xe_guc_exec_queue_snapshot_free(snapshot); 2334 } 2335 2336 /** 2337 * xe_guc_submit_print - GuC Submit Print. 2338 * @guc: GuC. 2339 * @p: drm_printer where it will be printed out. 2340 * 2341 * This function capture and prints snapshots of **all** GuC Engines. 2342 */ 2343 void xe_guc_submit_print(struct xe_guc *guc, struct drm_printer *p) 2344 { 2345 struct xe_exec_queue *q; 2346 unsigned long index; 2347 2348 if (!xe_device_uc_enabled(guc_to_xe(guc))) 2349 return; 2350 2351 mutex_lock(&guc->submission_state.lock); 2352 xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) 2353 guc_exec_queue_print(q, p); 2354 mutex_unlock(&guc->submission_state.lock); 2355 } 2356