140a684f9SVinay Belgaumkar /* SPDX-License-Identifier: MIT */ 240a684f9SVinay Belgaumkar /* 340a684f9SVinay Belgaumkar * Copyright © 2026 Intel Corporation 440a684f9SVinay Belgaumkar */ 540a684f9SVinay Belgaumkar 640a684f9SVinay Belgaumkar #ifndef _XE_GUC_RC_H_ 740a684f9SVinay Belgaumkar #define _XE_GUC_RC_H_ 840a684f9SVinay Belgaumkar 940a684f9SVinay Belgaumkar struct xe_guc; 10*fabedb75SVinay Belgaumkar enum slpc_gucrc_mode; 1140a684f9SVinay Belgaumkar 1240a684f9SVinay Belgaumkar int xe_guc_rc_init(struct xe_guc *guc); 1340a684f9SVinay Belgaumkar int xe_guc_rc_enable(struct xe_guc *guc); 1440a684f9SVinay Belgaumkar void xe_guc_rc_disable(struct xe_guc *guc); 1540a684f9SVinay Belgaumkar 1640a684f9SVinay Belgaumkar #endif 17