xref: /linux/drivers/gpu/drm/xe/xe_guc_pc.h (revision f5bd7da05a5988506dedcb3e67aecb3a13a4cdf0)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright © 2022 Intel Corporation
4  */
5 
6 #ifndef _XE_GUC_PC_H_
7 #define _XE_GUC_PC_H_
8 
9 #include <linux/types.h>
10 
11 struct xe_guc_pc;
12 struct drm_printer;
13 
14 int xe_guc_pc_init(struct xe_guc_pc *pc);
15 int xe_guc_pc_start(struct xe_guc_pc *pc);
16 int xe_guc_pc_stop(struct xe_guc_pc *pc);
17 void xe_guc_pc_print(struct xe_guc_pc *pc, struct drm_printer *p);
18 int xe_guc_pc_action_set_param(struct xe_guc_pc *pc, u8 id, u32 value);
19 int xe_guc_pc_action_unset_param(struct xe_guc_pc *pc, u8 id);
20 
21 u32 xe_guc_pc_get_act_freq(struct xe_guc_pc *pc);
22 int xe_guc_pc_get_cur_freq(struct xe_guc_pc *pc, u32 *freq);
23 u32 xe_guc_pc_get_cur_freq_fw(struct xe_guc_pc *pc);
24 u32 xe_guc_pc_get_rp0_freq(struct xe_guc_pc *pc);
25 u32 xe_guc_pc_get_rpa_freq(struct xe_guc_pc *pc);
26 u32 xe_guc_pc_get_rpe_freq(struct xe_guc_pc *pc);
27 u32 xe_guc_pc_get_rpn_freq(struct xe_guc_pc *pc);
28 int xe_guc_pc_get_min_freq(struct xe_guc_pc *pc, u32 *freq);
29 int xe_guc_pc_set_min_freq(struct xe_guc_pc *pc, u32 freq);
30 int xe_guc_pc_get_max_freq(struct xe_guc_pc *pc, u32 *freq);
31 int xe_guc_pc_set_max_freq(struct xe_guc_pc *pc, u32 freq);
32 int xe_guc_pc_set_power_profile(struct xe_guc_pc *pc, const char *buf);
33 void xe_guc_pc_get_power_profile(struct xe_guc_pc *pc, char *profile);
34 
35 enum xe_gt_idle_state xe_guc_pc_c_status(struct xe_guc_pc *pc);
36 u64 xe_guc_pc_rc6_residency(struct xe_guc_pc *pc);
37 u64 xe_guc_pc_mc6_residency(struct xe_guc_pc *pc);
38 void xe_guc_pc_init_early(struct xe_guc_pc *pc);
39 int xe_guc_pc_restore_stashed_freq(struct xe_guc_pc *pc);
40 void xe_guc_pc_raise_unslice(struct xe_guc_pc *pc);
41 void xe_guc_pc_apply_flush_freq_limit(struct xe_guc_pc *pc);
42 void xe_guc_pc_remove_flush_freq_limit(struct xe_guc_pc *pc);
43 
44 #endif /* _XE_GUC_PC_H_ */
45