1dd08ebf6SMatthew Brost /* SPDX-License-Identifier: MIT */ 2dd08ebf6SMatthew Brost /* 3dd08ebf6SMatthew Brost * Copyright © 2022 Intel Corporation 4dd08ebf6SMatthew Brost */ 5dd08ebf6SMatthew Brost 63457388fSLucas De Marchi #ifndef _XE_GT_TOPOLOGY_H_ 73457388fSLucas De Marchi #define _XE_GT_TOPOLOGY_H_ 8dd08ebf6SMatthew Brost 9dd08ebf6SMatthew Brost #include "xe_gt_types.h" 10dd08ebf6SMatthew Brost 11dd08ebf6SMatthew Brost struct drm_printer; 12dd08ebf6SMatthew Brost 13dd08ebf6SMatthew Brost void xe_gt_topology_init(struct xe_gt *gt); 14dd08ebf6SMatthew Brost 15dd08ebf6SMatthew Brost void xe_gt_topology_dump(struct xe_gt *gt, struct drm_printer *p); 16dd08ebf6SMatthew Brost 17dd08ebf6SMatthew Brost unsigned int 18*1415283bSLucas De Marchi xe_dss_mask_group_ffs(const xe_dss_mask_t mask, int groupsize, int groupnum); 19dd08ebf6SMatthew Brost 2013fb0c98SMatt Roper bool 2113fb0c98SMatt Roper xe_gt_topology_has_dss_in_quadrant(struct xe_gt *gt, int quad); 2213fb0c98SMatt Roper 233457388fSLucas De Marchi #endif /* _XE_GT_TOPOLOGY_H_ */ 24