xref: /linux/drivers/gpu/drm/xe/xe_gt_stats.c (revision 55a42f78ffd386e01a5404419f8c5ded7db70a21)
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2024 Intel Corporation
4  */
5 
6 #include <linux/atomic.h>
7 
8 #include <drm/drm_print.h>
9 
10 #include "xe_gt.h"
11 #include "xe_gt_stats.h"
12 
13 /**
14  * xe_gt_stats_incr - Increments the specified stats counter
15  * @gt: GT structure
16  * @id: xe_gt_stats_id type id that needs to be incremented
17  * @incr: value to be incremented with
18  *
19  * Increments the specified stats counter.
20  */
21 void xe_gt_stats_incr(struct xe_gt *gt, const enum xe_gt_stats_id id, int incr)
22 {
23 	if (id >= __XE_GT_STATS_NUM_IDS)
24 		return;
25 
26 	atomic64_add(incr, &gt->stats.counters[id]);
27 }
28 
29 #define DEF_STAT_STR(ID, name) [XE_GT_STATS_ID_##ID] = name
30 
31 static const char *const stat_description[__XE_GT_STATS_NUM_IDS] = {
32 	DEF_STAT_STR(SVM_PAGEFAULT_COUNT, "svm_pagefault_count"),
33 	DEF_STAT_STR(TLB_INVAL, "tlb_inval_count"),
34 	DEF_STAT_STR(SVM_TLB_INVAL_COUNT, "svm_tlb_inval_count"),
35 	DEF_STAT_STR(SVM_TLB_INVAL_US, "svm_tlb_inval_us"),
36 	DEF_STAT_STR(VMA_PAGEFAULT_COUNT, "vma_pagefault_count"),
37 	DEF_STAT_STR(VMA_PAGEFAULT_KB, "vma_pagefault_kb"),
38 	DEF_STAT_STR(SVM_4K_PAGEFAULT_COUNT, "svm_4K_pagefault_count"),
39 	DEF_STAT_STR(SVM_64K_PAGEFAULT_COUNT, "svm_64K_pagefault_count"),
40 	DEF_STAT_STR(SVM_2M_PAGEFAULT_COUNT, "svm_2M_pagefault_count"),
41 	DEF_STAT_STR(SVM_4K_VALID_PAGEFAULT_COUNT, "svm_4K_valid_pagefault_count"),
42 	DEF_STAT_STR(SVM_64K_VALID_PAGEFAULT_COUNT, "svm_64K_valid_pagefault_count"),
43 	DEF_STAT_STR(SVM_2M_VALID_PAGEFAULT_COUNT, "svm_2M_valid_pagefault_count"),
44 	DEF_STAT_STR(SVM_4K_PAGEFAULT_US, "svm_4K_pagefault_us"),
45 	DEF_STAT_STR(SVM_64K_PAGEFAULT_US, "svm_64K_pagefault_us"),
46 	DEF_STAT_STR(SVM_2M_PAGEFAULT_US, "svm_2M_pagefault_us"),
47 	DEF_STAT_STR(SVM_4K_MIGRATE_COUNT, "svm_4K_migrate_count"),
48 	DEF_STAT_STR(SVM_64K_MIGRATE_COUNT, "svm_64K_migrate_count"),
49 	DEF_STAT_STR(SVM_2M_MIGRATE_COUNT, "svm_2M_migrate_count"),
50 	DEF_STAT_STR(SVM_4K_MIGRATE_US, "svm_4K_migrate_us"),
51 	DEF_STAT_STR(SVM_64K_MIGRATE_US, "svm_64K_migrate_us"),
52 	DEF_STAT_STR(SVM_2M_MIGRATE_US, "svm_2M_migrate_us"),
53 	DEF_STAT_STR(SVM_DEVICE_COPY_US, "svm_device_copy_us"),
54 	DEF_STAT_STR(SVM_4K_DEVICE_COPY_US, "svm_4K_device_copy_us"),
55 	DEF_STAT_STR(SVM_64K_DEVICE_COPY_US, "svm_64K_device_copy_us"),
56 	DEF_STAT_STR(SVM_2M_DEVICE_COPY_US, "svm_2M_device_copy_us"),
57 	DEF_STAT_STR(SVM_CPU_COPY_US, "svm_cpu_copy_us"),
58 	DEF_STAT_STR(SVM_4K_CPU_COPY_US, "svm_4K_cpu_copy_us"),
59 	DEF_STAT_STR(SVM_64K_CPU_COPY_US, "svm_64K_cpu_copy_us"),
60 	DEF_STAT_STR(SVM_2M_CPU_COPY_US, "svm_2M_cpu_copy_us"),
61 	DEF_STAT_STR(SVM_DEVICE_COPY_KB, "svm_device_copy_kb"),
62 	DEF_STAT_STR(SVM_CPU_COPY_KB, "svm_cpu_copy_kb"),
63 	DEF_STAT_STR(SVM_4K_GET_PAGES_US, "svm_4K_get_pages_us"),
64 	DEF_STAT_STR(SVM_64K_GET_PAGES_US, "svm_64K_get_pages_us"),
65 	DEF_STAT_STR(SVM_2M_GET_PAGES_US, "svm_2M_get_pages_us"),
66 	DEF_STAT_STR(SVM_4K_BIND_US, "svm_4K_bind_us"),
67 	DEF_STAT_STR(SVM_64K_BIND_US, "svm_64K_bind_us"),
68 	DEF_STAT_STR(SVM_2M_BIND_US, "svm_2M_bind_us"),
69 };
70 
71 /**
72  * xe_gt_stats_print_info - Print the GT stats
73  * @gt: GT structure
74  * @p: drm_printer where it will be printed out.
75  *
76  * This prints out all the available GT stats.
77  */
78 int xe_gt_stats_print_info(struct xe_gt *gt, struct drm_printer *p)
79 {
80 	enum xe_gt_stats_id id;
81 
82 	for (id = 0; id < __XE_GT_STATS_NUM_IDS; ++id)
83 		drm_printf(p, "%s: %lld\n", stat_description[id],
84 			   atomic64_read(&gt->stats.counters[id]));
85 
86 	return 0;
87 }
88 
89 /**
90  * xe_gt_stats_clear - Clear the GT stats
91  * @gt: GT structure
92  *
93  * This clear (zeros) all the available GT stats.
94  */
95 void xe_gt_stats_clear(struct xe_gt *gt)
96 {
97 	int id;
98 
99 	for (id = 0; id < ARRAY_SIZE(gt->stats.counters); ++id)
100 		atomic64_set(&gt->stats.counters[id], 0);
101 }
102