1*48b05e3cSMichal Wajdeczko /* SPDX-License-Identifier: MIT */ 2*48b05e3cSMichal Wajdeczko /* 3*48b05e3cSMichal Wajdeczko * Copyright © 2023-2024 Intel Corporation 4*48b05e3cSMichal Wajdeczko */ 5*48b05e3cSMichal Wajdeczko 6*48b05e3cSMichal Wajdeczko #ifndef _XE_GT_SRIOV_PF_POLICY_H_ 7*48b05e3cSMichal Wajdeczko #define _XE_GT_SRIOV_PF_POLICY_H_ 8*48b05e3cSMichal Wajdeczko 9*48b05e3cSMichal Wajdeczko #include <linux/types.h> 10*48b05e3cSMichal Wajdeczko 11*48b05e3cSMichal Wajdeczko struct drm_printer; 12*48b05e3cSMichal Wajdeczko struct xe_gt; 13*48b05e3cSMichal Wajdeczko 14*48b05e3cSMichal Wajdeczko int xe_gt_sriov_pf_policy_set_sched_if_idle(struct xe_gt *gt, bool enable); 15*48b05e3cSMichal Wajdeczko bool xe_gt_sriov_pf_policy_get_sched_if_idle(struct xe_gt *gt); 16*48b05e3cSMichal Wajdeczko int xe_gt_sriov_pf_policy_set_reset_engine(struct xe_gt *gt, bool enable); 17*48b05e3cSMichal Wajdeczko bool xe_gt_sriov_pf_policy_get_reset_engine(struct xe_gt *gt); 18*48b05e3cSMichal Wajdeczko int xe_gt_sriov_pf_policy_set_sample_period(struct xe_gt *gt, u32 value); 19*48b05e3cSMichal Wajdeczko u32 xe_gt_sriov_pf_policy_get_sample_period(struct xe_gt *gt); 20*48b05e3cSMichal Wajdeczko 21*48b05e3cSMichal Wajdeczko void xe_gt_sriov_pf_policy_sanitize(struct xe_gt *gt); 22*48b05e3cSMichal Wajdeczko int xe_gt_sriov_pf_policy_reprovision(struct xe_gt *gt, bool reset); 23*48b05e3cSMichal Wajdeczko int xe_gt_sriov_pf_policy_print(struct xe_gt *gt, struct drm_printer *p); 24*48b05e3cSMichal Wajdeczko 25*48b05e3cSMichal Wajdeczko #endif 26