xref: /linux/drivers/gpu/drm/xe/xe_gt_sriov_pf.c (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0)
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2023-2024 Intel Corporation
4  */
5 
6 #include <drm/drm_managed.h>
7 
8 #include "regs/xe_regs.h"
9 
10 #include "xe_gt_sriov_pf.h"
11 #include "xe_gt_sriov_pf_config.h"
12 #include "xe_gt_sriov_pf_control.h"
13 #include "xe_gt_sriov_pf_helpers.h"
14 #include "xe_gt_sriov_pf_service.h"
15 #include "xe_mmio.h"
16 
17 /*
18  * VF's metadata is maintained in the flexible array where:
19  *   - entry [0] contains metadata for the PF (only if applicable),
20  *   - entries [1..n] contain metadata for VF1..VFn::
21  *
22  *       <--------------------------- 1 + total_vfs ----------->
23  *      +-------+-------+-------+-----------------------+-------+
24  *      |   0   |   1   |   2   |                       |   n   |
25  *      +-------+-------+-------+-----------------------+-------+
26  *      |  PF   |  VF1  |  VF2  |      ...     ...      |  VFn  |
27  *      +-------+-------+-------+-----------------------+-------+
28  */
29 static int pf_alloc_metadata(struct xe_gt *gt)
30 {
31 	unsigned int num_vfs = xe_gt_sriov_pf_get_totalvfs(gt);
32 
33 	gt->sriov.pf.vfs = drmm_kcalloc(&gt_to_xe(gt)->drm, 1 + num_vfs,
34 					sizeof(*gt->sriov.pf.vfs), GFP_KERNEL);
35 	if (!gt->sriov.pf.vfs)
36 		return -ENOMEM;
37 
38 	return 0;
39 }
40 
41 /**
42  * xe_gt_sriov_pf_init_early - Prepare SR-IOV PF data structures on PF.
43  * @gt: the &xe_gt to initialize
44  *
45  * Early initialization of the PF data.
46  *
47  * Return: 0 on success or a negative error code on failure.
48  */
49 int xe_gt_sriov_pf_init_early(struct xe_gt *gt)
50 {
51 	int err;
52 
53 	err = pf_alloc_metadata(gt);
54 	if (err)
55 		return err;
56 
57 	err = xe_gt_sriov_pf_service_init(gt);
58 	if (err)
59 		return err;
60 
61 	err = xe_gt_sriov_pf_control_init(gt);
62 	if (err)
63 		return err;
64 
65 	return 0;
66 }
67 
68 static bool pf_needs_enable_ggtt_guest_update(struct xe_device *xe)
69 {
70 	return GRAPHICS_VERx100(xe) == 1200;
71 }
72 
73 static void pf_enable_ggtt_guest_update(struct xe_gt *gt)
74 {
75 	xe_mmio_write32(gt, VIRTUAL_CTRL_REG, GUEST_GTT_UPDATE_EN);
76 }
77 
78 /**
79  * xe_gt_sriov_pf_init_hw - Initialize SR-IOV hardware support.
80  * @gt: the &xe_gt to initialize
81  *
82  * On some platforms the PF must explicitly enable VF's access to the GGTT.
83  */
84 void xe_gt_sriov_pf_init_hw(struct xe_gt *gt)
85 {
86 	if (pf_needs_enable_ggtt_guest_update(gt_to_xe(gt)))
87 		pf_enable_ggtt_guest_update(gt);
88 
89 	xe_gt_sriov_pf_service_update(gt);
90 }
91 
92 /**
93  * xe_gt_sriov_pf_restart - Restart SR-IOV support after a GT reset.
94  * @gt: the &xe_gt
95  *
96  * This function can only be called on PF.
97  */
98 void xe_gt_sriov_pf_restart(struct xe_gt *gt)
99 {
100 	xe_gt_sriov_pf_config_restart(gt);
101 	xe_gt_sriov_pf_control_restart(gt);
102 }
103