1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2022 Intel Corporation 4 */ 5 6 #include "xe_gt_debugfs.h" 7 8 #include <linux/debugfs.h> 9 10 #include <drm/drm_debugfs.h> 11 #include <drm/drm_managed.h> 12 13 #include "xe_device.h" 14 #include "xe_force_wake.h" 15 #include "xe_ggtt.h" 16 #include "xe_gt.h" 17 #include "xe_gt_mcr.h" 18 #include "xe_gt_idle.h" 19 #include "xe_gt_sriov_pf_debugfs.h" 20 #include "xe_gt_sriov_vf_debugfs.h" 21 #include "xe_gt_stats.h" 22 #include "xe_gt_topology.h" 23 #include "xe_guc_hwconfig.h" 24 #include "xe_hw_engine.h" 25 #include "xe_lrc.h" 26 #include "xe_macros.h" 27 #include "xe_mocs.h" 28 #include "xe_pat.h" 29 #include "xe_pm.h" 30 #include "xe_reg_sr.h" 31 #include "xe_reg_whitelist.h" 32 #include "xe_sriov.h" 33 #include "xe_uc_debugfs.h" 34 #include "xe_wa.h" 35 36 /** 37 * xe_gt_debugfs_simple_show - A show callback for struct drm_info_list 38 * @m: the &seq_file 39 * @data: data used by the drm debugfs helpers 40 * 41 * This callback can be used in struct drm_info_list to describe debugfs 42 * files that are &xe_gt specific. 43 * 44 * It is assumed that those debugfs files will be created on directory entry 45 * which struct dentry d_inode->i_private points to &xe_gt. 46 * 47 * This function assumes that &m->private will be set to the &struct 48 * drm_info_node corresponding to the instance of the info on a given &struct 49 * drm_minor (see struct drm_info_list.show for details). 50 * 51 * This function also assumes that struct drm_info_list.data will point to the 52 * function code that will actually print a file content:: 53 * 54 * int (*print)(struct xe_gt *, struct drm_printer *) 55 * 56 * Example:: 57 * 58 * int foo(struct xe_gt *gt, struct drm_printer *p) 59 * { 60 * drm_printf(p, "GT%u\n", gt->info.id); 61 * return 0; 62 * } 63 * 64 * static const struct drm_info_list bar[] = { 65 * { name = "foo", .show = xe_gt_debugfs_simple_show, .data = foo }, 66 * }; 67 * 68 * dir = debugfs_create_dir("gt", parent); 69 * dir->d_inode->i_private = gt; 70 * drm_debugfs_create_files(bar, ARRAY_SIZE(bar), dir, minor); 71 * 72 * Return: 0 on success or a negative error code on failure. 73 */ 74 int xe_gt_debugfs_simple_show(struct seq_file *m, void *data) 75 { 76 struct drm_printer p = drm_seq_file_printer(m); 77 struct drm_info_node *node = m->private; 78 struct dentry *parent = node->dent->d_parent; 79 struct xe_gt *gt = parent->d_inode->i_private; 80 int (*print)(struct xe_gt *, struct drm_printer *) = node->info_ent->data; 81 82 if (WARN_ON(!print)) 83 return -EINVAL; 84 85 return print(gt, &p); 86 } 87 88 static int hw_engines(struct xe_gt *gt, struct drm_printer *p) 89 { 90 struct xe_device *xe = gt_to_xe(gt); 91 struct xe_hw_engine *hwe; 92 enum xe_hw_engine_id id; 93 unsigned int fw_ref; 94 95 xe_pm_runtime_get(xe); 96 fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL); 97 if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL)) { 98 xe_pm_runtime_put(xe); 99 xe_force_wake_put(gt_to_fw(gt), fw_ref); 100 return -ETIMEDOUT; 101 } 102 103 for_each_hw_engine(hwe, gt, id) 104 xe_hw_engine_print(hwe, p); 105 106 xe_force_wake_put(gt_to_fw(gt), fw_ref); 107 xe_pm_runtime_put(xe); 108 109 return 0; 110 } 111 112 static int powergate_info(struct xe_gt *gt, struct drm_printer *p) 113 { 114 int ret; 115 116 xe_pm_runtime_get(gt_to_xe(gt)); 117 ret = xe_gt_idle_pg_print(gt, p); 118 xe_pm_runtime_put(gt_to_xe(gt)); 119 120 return ret; 121 } 122 123 static int force_reset(struct xe_gt *gt, struct drm_printer *p) 124 { 125 xe_pm_runtime_get(gt_to_xe(gt)); 126 xe_gt_reset_async(gt); 127 xe_pm_runtime_put(gt_to_xe(gt)); 128 129 return 0; 130 } 131 132 static int force_reset_sync(struct xe_gt *gt, struct drm_printer *p) 133 { 134 xe_pm_runtime_get(gt_to_xe(gt)); 135 xe_gt_reset_async(gt); 136 xe_pm_runtime_put(gt_to_xe(gt)); 137 138 flush_work(>->reset.worker); 139 140 return 0; 141 } 142 143 static int sa_info(struct xe_gt *gt, struct drm_printer *p) 144 { 145 struct xe_tile *tile = gt_to_tile(gt); 146 147 xe_pm_runtime_get(gt_to_xe(gt)); 148 drm_suballoc_dump_debug_info(&tile->mem.kernel_bb_pool->base, p, 149 tile->mem.kernel_bb_pool->gpu_addr); 150 xe_pm_runtime_put(gt_to_xe(gt)); 151 152 return 0; 153 } 154 155 static int topology(struct xe_gt *gt, struct drm_printer *p) 156 { 157 xe_pm_runtime_get(gt_to_xe(gt)); 158 xe_gt_topology_dump(gt, p); 159 xe_pm_runtime_put(gt_to_xe(gt)); 160 161 return 0; 162 } 163 164 static int steering(struct xe_gt *gt, struct drm_printer *p) 165 { 166 xe_pm_runtime_get(gt_to_xe(gt)); 167 xe_gt_mcr_steering_dump(gt, p); 168 xe_pm_runtime_put(gt_to_xe(gt)); 169 170 return 0; 171 } 172 173 static int ggtt(struct xe_gt *gt, struct drm_printer *p) 174 { 175 int ret; 176 177 xe_pm_runtime_get(gt_to_xe(gt)); 178 ret = xe_ggtt_dump(gt_to_tile(gt)->mem.ggtt, p); 179 xe_pm_runtime_put(gt_to_xe(gt)); 180 181 return ret; 182 } 183 184 static int register_save_restore(struct xe_gt *gt, struct drm_printer *p) 185 { 186 struct xe_hw_engine *hwe; 187 enum xe_hw_engine_id id; 188 189 xe_pm_runtime_get(gt_to_xe(gt)); 190 191 xe_reg_sr_dump(>->reg_sr, p); 192 drm_printf(p, "\n"); 193 194 drm_printf(p, "Engine\n"); 195 for_each_hw_engine(hwe, gt, id) 196 xe_reg_sr_dump(&hwe->reg_sr, p); 197 drm_printf(p, "\n"); 198 199 drm_printf(p, "LRC\n"); 200 for_each_hw_engine(hwe, gt, id) 201 xe_reg_sr_dump(&hwe->reg_lrc, p); 202 drm_printf(p, "\n"); 203 204 drm_printf(p, "Whitelist\n"); 205 for_each_hw_engine(hwe, gt, id) 206 xe_reg_whitelist_dump(&hwe->reg_whitelist, p); 207 208 xe_pm_runtime_put(gt_to_xe(gt)); 209 210 return 0; 211 } 212 213 static int workarounds(struct xe_gt *gt, struct drm_printer *p) 214 { 215 xe_pm_runtime_get(gt_to_xe(gt)); 216 xe_wa_dump(gt, p); 217 xe_pm_runtime_put(gt_to_xe(gt)); 218 219 return 0; 220 } 221 222 static int pat(struct xe_gt *gt, struct drm_printer *p) 223 { 224 xe_pm_runtime_get(gt_to_xe(gt)); 225 xe_pat_dump(gt, p); 226 xe_pm_runtime_put(gt_to_xe(gt)); 227 228 return 0; 229 } 230 231 static int mocs(struct xe_gt *gt, struct drm_printer *p) 232 { 233 xe_pm_runtime_get(gt_to_xe(gt)); 234 xe_mocs_dump(gt, p); 235 xe_pm_runtime_put(gt_to_xe(gt)); 236 237 return 0; 238 } 239 240 static int rcs_default_lrc(struct xe_gt *gt, struct drm_printer *p) 241 { 242 xe_pm_runtime_get(gt_to_xe(gt)); 243 xe_lrc_dump_default(p, gt, XE_ENGINE_CLASS_RENDER); 244 xe_pm_runtime_put(gt_to_xe(gt)); 245 246 return 0; 247 } 248 249 static int ccs_default_lrc(struct xe_gt *gt, struct drm_printer *p) 250 { 251 xe_pm_runtime_get(gt_to_xe(gt)); 252 xe_lrc_dump_default(p, gt, XE_ENGINE_CLASS_COMPUTE); 253 xe_pm_runtime_put(gt_to_xe(gt)); 254 255 return 0; 256 } 257 258 static int bcs_default_lrc(struct xe_gt *gt, struct drm_printer *p) 259 { 260 xe_pm_runtime_get(gt_to_xe(gt)); 261 xe_lrc_dump_default(p, gt, XE_ENGINE_CLASS_COPY); 262 xe_pm_runtime_put(gt_to_xe(gt)); 263 264 return 0; 265 } 266 267 static int vcs_default_lrc(struct xe_gt *gt, struct drm_printer *p) 268 { 269 xe_pm_runtime_get(gt_to_xe(gt)); 270 xe_lrc_dump_default(p, gt, XE_ENGINE_CLASS_VIDEO_DECODE); 271 xe_pm_runtime_put(gt_to_xe(gt)); 272 273 return 0; 274 } 275 276 static int vecs_default_lrc(struct xe_gt *gt, struct drm_printer *p) 277 { 278 xe_pm_runtime_get(gt_to_xe(gt)); 279 xe_lrc_dump_default(p, gt, XE_ENGINE_CLASS_VIDEO_ENHANCE); 280 xe_pm_runtime_put(gt_to_xe(gt)); 281 282 return 0; 283 } 284 285 static int hwconfig(struct xe_gt *gt, struct drm_printer *p) 286 { 287 xe_pm_runtime_get(gt_to_xe(gt)); 288 xe_guc_hwconfig_dump(>->uc.guc, p); 289 xe_pm_runtime_put(gt_to_xe(gt)); 290 291 return 0; 292 } 293 294 static const struct drm_info_list debugfs_list[] = { 295 {"hw_engines", .show = xe_gt_debugfs_simple_show, .data = hw_engines}, 296 {"force_reset", .show = xe_gt_debugfs_simple_show, .data = force_reset}, 297 {"force_reset_sync", .show = xe_gt_debugfs_simple_show, .data = force_reset_sync}, 298 {"sa_info", .show = xe_gt_debugfs_simple_show, .data = sa_info}, 299 {"topology", .show = xe_gt_debugfs_simple_show, .data = topology}, 300 {"steering", .show = xe_gt_debugfs_simple_show, .data = steering}, 301 {"ggtt", .show = xe_gt_debugfs_simple_show, .data = ggtt}, 302 {"powergate_info", .show = xe_gt_debugfs_simple_show, .data = powergate_info}, 303 {"register-save-restore", .show = xe_gt_debugfs_simple_show, .data = register_save_restore}, 304 {"workarounds", .show = xe_gt_debugfs_simple_show, .data = workarounds}, 305 {"pat", .show = xe_gt_debugfs_simple_show, .data = pat}, 306 {"mocs", .show = xe_gt_debugfs_simple_show, .data = mocs}, 307 {"default_lrc_rcs", .show = xe_gt_debugfs_simple_show, .data = rcs_default_lrc}, 308 {"default_lrc_ccs", .show = xe_gt_debugfs_simple_show, .data = ccs_default_lrc}, 309 {"default_lrc_bcs", .show = xe_gt_debugfs_simple_show, .data = bcs_default_lrc}, 310 {"default_lrc_vcs", .show = xe_gt_debugfs_simple_show, .data = vcs_default_lrc}, 311 {"default_lrc_vecs", .show = xe_gt_debugfs_simple_show, .data = vecs_default_lrc}, 312 {"stats", .show = xe_gt_debugfs_simple_show, .data = xe_gt_stats_print_info}, 313 {"hwconfig", .show = xe_gt_debugfs_simple_show, .data = hwconfig}, 314 }; 315 316 void xe_gt_debugfs_register(struct xe_gt *gt) 317 { 318 struct xe_device *xe = gt_to_xe(gt); 319 struct drm_minor *minor = gt_to_xe(gt)->drm.primary; 320 struct dentry *root; 321 char name[8]; 322 323 xe_gt_assert(gt, minor->debugfs_root); 324 325 snprintf(name, sizeof(name), "gt%d", gt->info.id); 326 root = debugfs_create_dir(name, minor->debugfs_root); 327 if (IS_ERR(root)) { 328 drm_warn(&xe->drm, "Create GT directory failed"); 329 return; 330 } 331 332 /* 333 * Store the xe_gt pointer as private data of the gt/ directory node 334 * so other GT specific attributes under that directory may refer to 335 * it by looking at its parent node private data. 336 */ 337 root->d_inode->i_private = gt; 338 339 drm_debugfs_create_files(debugfs_list, 340 ARRAY_SIZE(debugfs_list), 341 root, minor); 342 343 xe_uc_debugfs_register(>->uc, root); 344 345 if (IS_SRIOV_PF(xe)) 346 xe_gt_sriov_pf_debugfs_register(gt, root); 347 else if (IS_SRIOV_VF(xe)) 348 xe_gt_sriov_vf_debugfs_register(gt, root); 349 } 350