1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2021 Intel Corporation 4 */ 5 6 #include "xe_ggtt.h" 7 8 #include <kunit/visibility.h> 9 #include <linux/fault-inject.h> 10 #include <linux/io-64-nonatomic-lo-hi.h> 11 #include <linux/sizes.h> 12 13 #include <drm/drm_drv.h> 14 #include <drm/drm_managed.h> 15 #include <drm/intel/i915_drm.h> 16 #include <generated/xe_wa_oob.h> 17 18 #include "regs/xe_gt_regs.h" 19 #include "regs/xe_gtt_defs.h" 20 #include "regs/xe_regs.h" 21 #include "xe_assert.h" 22 #include "xe_bo.h" 23 #include "xe_device.h" 24 #include "xe_gt.h" 25 #include "xe_gt_printk.h" 26 #include "xe_map.h" 27 #include "xe_mmio.h" 28 #include "xe_pm.h" 29 #include "xe_res_cursor.h" 30 #include "xe_sriov.h" 31 #include "xe_tile_sriov_vf.h" 32 #include "xe_tlb_inval.h" 33 #include "xe_wa.h" 34 #include "xe_wopcm.h" 35 36 /** 37 * DOC: Global Graphics Translation Table (GGTT) 38 * 39 * Xe GGTT implements the support for a Global Virtual Address space that is used 40 * for resources that are accessible to privileged (i.e. kernel-mode) processes, 41 * and not tied to a specific user-level process. For example, the Graphics 42 * micro-Controller (GuC) and Display Engine (if present) utilize this Global 43 * address space. 44 * 45 * The Global GTT (GGTT) translates from the Global virtual address to a physical 46 * address that can be accessed by HW. The GGTT is a flat, single-level table. 47 * 48 * Xe implements a simplified version of the GGTT specifically managing only a 49 * certain range of it that goes from the Write Once Protected Content Memory (WOPCM) 50 * Layout to a predefined GUC_GGTT_TOP. This approach avoids complications related to 51 * the GuC (Graphics Microcontroller) hardware limitations. The GuC address space 52 * is limited on both ends of the GGTT, because the GuC shim HW redirects 53 * accesses to those addresses to other HW areas instead of going through the 54 * GGTT. On the bottom end, the GuC can't access offsets below the WOPCM size, 55 * while on the top side the limit is fixed at GUC_GGTT_TOP. To keep things 56 * simple, instead of checking each object to see if they are accessed by GuC or 57 * not, we just exclude those areas from the allocator. Additionally, to simplify 58 * the driver load, we use the maximum WOPCM size in this logic instead of the 59 * programmed one, so we don't need to wait until the actual size to be 60 * programmed is determined (which requires FW fetch) before initializing the 61 * GGTT. These simplifications might waste space in the GGTT (about 20-25 MBs 62 * depending on the platform) but we can live with this. Another benefit of this 63 * is the GuC bootrom can't access anything below the WOPCM max size so anything 64 * the bootrom needs to access (e.g. a RSA key) needs to be placed in the GGTT 65 * above the WOPCM max size. Starting the GGTT allocations above the WOPCM max 66 * give us the correct placement for free. 67 */ 68 69 static u64 xelp_ggtt_pte_flags(struct xe_bo *bo, u16 pat_index) 70 { 71 u64 pte = XE_PAGE_PRESENT; 72 73 if (xe_bo_is_vram(bo) || xe_bo_is_stolen_devmem(bo)) 74 pte |= XE_GGTT_PTE_DM; 75 76 return pte; 77 } 78 79 static u64 xelpg_ggtt_pte_flags(struct xe_bo *bo, u16 pat_index) 80 { 81 struct xe_device *xe = xe_bo_device(bo); 82 u64 pte; 83 84 pte = xelp_ggtt_pte_flags(bo, pat_index); 85 86 xe_assert(xe, pat_index <= 3); 87 88 if (pat_index & BIT(0)) 89 pte |= XELPG_GGTT_PTE_PAT0; 90 91 if (pat_index & BIT(1)) 92 pte |= XELPG_GGTT_PTE_PAT1; 93 94 return pte; 95 } 96 97 static unsigned int probe_gsm_size(struct pci_dev *pdev) 98 { 99 u16 gmch_ctl, ggms; 100 101 pci_read_config_word(pdev, SNB_GMCH_CTRL, &gmch_ctl); 102 ggms = (gmch_ctl >> BDW_GMCH_GGMS_SHIFT) & BDW_GMCH_GGMS_MASK; 103 return ggms ? SZ_1M << ggms : 0; 104 } 105 106 static void ggtt_update_access_counter(struct xe_ggtt *ggtt) 107 { 108 struct xe_tile *tile = ggtt->tile; 109 struct xe_gt *affected_gt = XE_GT_WA(tile->primary_gt, 22019338487) ? 110 tile->primary_gt : tile->media_gt; 111 struct xe_mmio *mmio = &affected_gt->mmio; 112 u32 max_gtt_writes = XE_GT_WA(ggtt->tile->primary_gt, 22019338487) ? 1100 : 63; 113 /* 114 * Wa_22019338487: GMD_ID is a RO register, a dummy write forces gunit 115 * to wait for completion of prior GTT writes before letting this through. 116 * This needs to be done for all GGTT writes originating from the CPU. 117 */ 118 lockdep_assert_held(&ggtt->lock); 119 120 if ((++ggtt->access_count % max_gtt_writes) == 0) { 121 xe_mmio_write32(mmio, GMD_ID, 0x0); 122 ggtt->access_count = 0; 123 } 124 } 125 126 static void xe_ggtt_set_pte(struct xe_ggtt *ggtt, u64 addr, u64 pte) 127 { 128 xe_tile_assert(ggtt->tile, !(addr & XE_PTE_MASK)); 129 xe_tile_assert(ggtt->tile, addr < ggtt->size); 130 131 writeq(pte, &ggtt->gsm[addr >> XE_PTE_SHIFT]); 132 } 133 134 static void xe_ggtt_set_pte_and_flush(struct xe_ggtt *ggtt, u64 addr, u64 pte) 135 { 136 xe_ggtt_set_pte(ggtt, addr, pte); 137 ggtt_update_access_counter(ggtt); 138 } 139 140 static void xe_ggtt_clear(struct xe_ggtt *ggtt, u64 start, u64 size) 141 { 142 u16 pat_index = tile_to_xe(ggtt->tile)->pat.idx[XE_CACHE_WB]; 143 u64 end = start + size - 1; 144 u64 scratch_pte; 145 146 xe_tile_assert(ggtt->tile, start < end); 147 148 if (ggtt->scratch) 149 scratch_pte = xe_bo_addr(ggtt->scratch, 0, XE_PAGE_SIZE) | 150 ggtt->pt_ops->pte_encode_flags(ggtt->scratch, 151 pat_index); 152 else 153 scratch_pte = 0; 154 155 while (start < end) { 156 ggtt->pt_ops->ggtt_set_pte(ggtt, start, scratch_pte); 157 start += XE_PAGE_SIZE; 158 } 159 } 160 161 /** 162 * xe_ggtt_alloc - Allocate a GGTT for a given &xe_tile 163 * @tile: &xe_tile 164 * 165 * Allocates a &xe_ggtt for a given tile. 166 * 167 * Return: &xe_ggtt on success, or NULL when out of memory. 168 */ 169 struct xe_ggtt *xe_ggtt_alloc(struct xe_tile *tile) 170 { 171 struct xe_ggtt *ggtt = drmm_kzalloc(&tile_to_xe(tile)->drm, sizeof(*ggtt), GFP_KERNEL); 172 if (ggtt) 173 ggtt->tile = tile; 174 return ggtt; 175 } 176 177 static void ggtt_fini_early(struct drm_device *drm, void *arg) 178 { 179 struct xe_ggtt *ggtt = arg; 180 181 destroy_workqueue(ggtt->wq); 182 mutex_destroy(&ggtt->lock); 183 drm_mm_takedown(&ggtt->mm); 184 } 185 186 static void ggtt_fini(void *arg) 187 { 188 struct xe_ggtt *ggtt = arg; 189 190 ggtt->scratch = NULL; 191 } 192 193 #ifdef CONFIG_LOCKDEP 194 void xe_ggtt_might_lock(struct xe_ggtt *ggtt) 195 { 196 might_lock(&ggtt->lock); 197 } 198 #endif 199 200 static void primelockdep(struct xe_ggtt *ggtt) 201 { 202 if (!IS_ENABLED(CONFIG_LOCKDEP)) 203 return; 204 205 fs_reclaim_acquire(GFP_KERNEL); 206 might_lock(&ggtt->lock); 207 fs_reclaim_release(GFP_KERNEL); 208 } 209 210 static const struct xe_ggtt_pt_ops xelp_pt_ops = { 211 .pte_encode_flags = xelp_ggtt_pte_flags, 212 .ggtt_set_pte = xe_ggtt_set_pte, 213 }; 214 215 static const struct xe_ggtt_pt_ops xelpg_pt_ops = { 216 .pte_encode_flags = xelpg_ggtt_pte_flags, 217 .ggtt_set_pte = xe_ggtt_set_pte, 218 }; 219 220 static const struct xe_ggtt_pt_ops xelpg_pt_wa_ops = { 221 .pte_encode_flags = xelpg_ggtt_pte_flags, 222 .ggtt_set_pte = xe_ggtt_set_pte_and_flush, 223 }; 224 225 static void __xe_ggtt_init_early(struct xe_ggtt *ggtt, u32 reserved) 226 { 227 drm_mm_init(&ggtt->mm, reserved, 228 ggtt->size - reserved); 229 mutex_init(&ggtt->lock); 230 primelockdep(ggtt); 231 } 232 233 int xe_ggtt_init_kunit(struct xe_ggtt *ggtt, u32 reserved, u32 size) 234 { 235 ggtt->size = size; 236 __xe_ggtt_init_early(ggtt, reserved); 237 return 0; 238 } 239 EXPORT_SYMBOL_IF_KUNIT(xe_ggtt_init_kunit); 240 241 static void dev_fini_ggtt(void *arg) 242 { 243 struct xe_ggtt *ggtt = arg; 244 245 drain_workqueue(ggtt->wq); 246 } 247 248 /** 249 * xe_ggtt_init_early - Early GGTT initialization 250 * @ggtt: the &xe_ggtt to be initialized 251 * 252 * It allows to create new mappings usable by the GuC. 253 * Mappings are not usable by the HW engines, as it doesn't have scratch nor 254 * initial clear done to it yet. That will happen in the regular, non-early 255 * GGTT initialization. 256 * 257 * Return: 0 on success or a negative error code on failure. 258 */ 259 int xe_ggtt_init_early(struct xe_ggtt *ggtt) 260 { 261 struct xe_device *xe = tile_to_xe(ggtt->tile); 262 struct pci_dev *pdev = to_pci_dev(xe->drm.dev); 263 unsigned int gsm_size; 264 int err; 265 266 if (IS_SRIOV_VF(xe) || GRAPHICS_VERx100(xe) >= 1250) 267 gsm_size = SZ_8M; /* GGTT is expected to be 4GiB */ 268 else 269 gsm_size = probe_gsm_size(pdev); 270 271 if (gsm_size == 0) { 272 drm_err(&xe->drm, "Hardware reported no preallocated GSM\n"); 273 return -ENOMEM; 274 } 275 276 ggtt->gsm = ggtt->tile->mmio.regs + SZ_8M; 277 ggtt->size = (gsm_size / 8) * (u64) XE_PAGE_SIZE; 278 279 if (IS_DGFX(xe) && xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K) 280 ggtt->flags |= XE_GGTT_FLAGS_64K; 281 282 if (ggtt->size > GUC_GGTT_TOP) 283 ggtt->size = GUC_GGTT_TOP; 284 285 if (GRAPHICS_VERx100(xe) >= 1270) 286 ggtt->pt_ops = (ggtt->tile->media_gt && 287 XE_GT_WA(ggtt->tile->media_gt, 22019338487)) || 288 XE_GT_WA(ggtt->tile->primary_gt, 22019338487) ? 289 &xelpg_pt_wa_ops : &xelpg_pt_ops; 290 else 291 ggtt->pt_ops = &xelp_pt_ops; 292 293 ggtt->wq = alloc_workqueue("xe-ggtt-wq", 0, WQ_MEM_RECLAIM); 294 __xe_ggtt_init_early(ggtt, xe_wopcm_size(xe)); 295 296 err = drmm_add_action_or_reset(&xe->drm, ggtt_fini_early, ggtt); 297 if (err) 298 return err; 299 300 err = devm_add_action_or_reset(xe->drm.dev, dev_fini_ggtt, ggtt); 301 if (err) 302 return err; 303 304 if (IS_SRIOV_VF(xe)) { 305 err = xe_tile_sriov_vf_prepare_ggtt(ggtt->tile); 306 if (err) 307 return err; 308 } 309 310 return 0; 311 } 312 ALLOW_ERROR_INJECTION(xe_ggtt_init_early, ERRNO); /* See xe_pci_probe() */ 313 314 static void xe_ggtt_invalidate(struct xe_ggtt *ggtt); 315 316 static void xe_ggtt_initial_clear(struct xe_ggtt *ggtt) 317 { 318 struct drm_mm_node *hole; 319 u64 start, end; 320 321 /* Display may have allocated inside ggtt, so be careful with clearing here */ 322 mutex_lock(&ggtt->lock); 323 drm_mm_for_each_hole(hole, &ggtt->mm, start, end) 324 xe_ggtt_clear(ggtt, start, end - start); 325 326 xe_ggtt_invalidate(ggtt); 327 mutex_unlock(&ggtt->lock); 328 } 329 330 static void ggtt_node_remove(struct xe_ggtt_node *node) 331 { 332 struct xe_ggtt *ggtt = node->ggtt; 333 struct xe_device *xe = tile_to_xe(ggtt->tile); 334 bool bound; 335 int idx; 336 337 bound = drm_dev_enter(&xe->drm, &idx); 338 339 mutex_lock(&ggtt->lock); 340 if (bound) 341 xe_ggtt_clear(ggtt, node->base.start, node->base.size); 342 drm_mm_remove_node(&node->base); 343 node->base.size = 0; 344 mutex_unlock(&ggtt->lock); 345 346 if (!bound) 347 goto free_node; 348 349 if (node->invalidate_on_remove) 350 xe_ggtt_invalidate(ggtt); 351 352 drm_dev_exit(idx); 353 354 free_node: 355 xe_ggtt_node_fini(node); 356 } 357 358 static void ggtt_node_remove_work_func(struct work_struct *work) 359 { 360 struct xe_ggtt_node *node = container_of(work, typeof(*node), 361 delayed_removal_work); 362 struct xe_device *xe = tile_to_xe(node->ggtt->tile); 363 364 xe_pm_runtime_get(xe); 365 ggtt_node_remove(node); 366 xe_pm_runtime_put(xe); 367 } 368 369 /** 370 * xe_ggtt_node_remove - Remove a &xe_ggtt_node from the GGTT 371 * @node: the &xe_ggtt_node to be removed 372 * @invalidate: if node needs invalidation upon removal 373 */ 374 void xe_ggtt_node_remove(struct xe_ggtt_node *node, bool invalidate) 375 { 376 struct xe_ggtt *ggtt; 377 struct xe_device *xe; 378 379 if (!node || !node->ggtt) 380 return; 381 382 ggtt = node->ggtt; 383 xe = tile_to_xe(ggtt->tile); 384 385 node->invalidate_on_remove = invalidate; 386 387 if (xe_pm_runtime_get_if_active(xe)) { 388 ggtt_node_remove(node); 389 xe_pm_runtime_put(xe); 390 } else { 391 queue_work(ggtt->wq, &node->delayed_removal_work); 392 } 393 } 394 395 /** 396 * xe_ggtt_init - Regular non-early GGTT initialization 397 * @ggtt: the &xe_ggtt to be initialized 398 * 399 * Return: 0 on success or a negative error code on failure. 400 */ 401 int xe_ggtt_init(struct xe_ggtt *ggtt) 402 { 403 struct xe_device *xe = tile_to_xe(ggtt->tile); 404 unsigned int flags; 405 int err; 406 407 /* 408 * So we don't need to worry about 64K GGTT layout when dealing with 409 * scratch entries, rather keep the scratch page in system memory on 410 * platforms where 64K pages are needed for VRAM. 411 */ 412 flags = 0; 413 if (ggtt->flags & XE_GGTT_FLAGS_64K) 414 flags |= XE_BO_FLAG_SYSTEM; 415 else 416 flags |= XE_BO_FLAG_VRAM_IF_DGFX(ggtt->tile); 417 418 ggtt->scratch = xe_managed_bo_create_pin_map(xe, ggtt->tile, XE_PAGE_SIZE, flags); 419 if (IS_ERR(ggtt->scratch)) { 420 err = PTR_ERR(ggtt->scratch); 421 goto err; 422 } 423 424 xe_map_memset(xe, &ggtt->scratch->vmap, 0, 0, xe_bo_size(ggtt->scratch)); 425 426 xe_ggtt_initial_clear(ggtt); 427 428 return devm_add_action_or_reset(xe->drm.dev, ggtt_fini, ggtt); 429 err: 430 ggtt->scratch = NULL; 431 return err; 432 } 433 434 static void ggtt_invalidate_gt_tlb(struct xe_gt *gt) 435 { 436 int err; 437 438 if (!gt) 439 return; 440 441 err = xe_tlb_inval_ggtt(>->tlb_inval); 442 xe_gt_WARN(gt, err, "Failed to invalidate GGTT (%pe)", ERR_PTR(err)); 443 } 444 445 static void xe_ggtt_invalidate(struct xe_ggtt *ggtt) 446 { 447 struct xe_device *xe = tile_to_xe(ggtt->tile); 448 449 /* 450 * XXX: Barrier for GGTT pages. Unsure exactly why this required but 451 * without this LNL is having issues with the GuC reading scratch page 452 * vs. correct GGTT page. Not particularly a hot code path so blindly 453 * do a mmio read here which results in GuC reading correct GGTT page. 454 */ 455 xe_mmio_read32(xe_root_tile_mmio(xe), VF_CAP_REG); 456 457 /* Each GT in a tile has its own TLB to cache GGTT lookups */ 458 ggtt_invalidate_gt_tlb(ggtt->tile->primary_gt); 459 ggtt_invalidate_gt_tlb(ggtt->tile->media_gt); 460 } 461 462 static void xe_ggtt_dump_node(struct xe_ggtt *ggtt, 463 const struct drm_mm_node *node, const char *description) 464 { 465 char buf[10]; 466 467 if (IS_ENABLED(CONFIG_DRM_XE_DEBUG)) { 468 string_get_size(node->size, 1, STRING_UNITS_2, buf, sizeof(buf)); 469 xe_gt_dbg(ggtt->tile->primary_gt, "GGTT %#llx-%#llx (%s) %s\n", 470 node->start, node->start + node->size, buf, description); 471 } 472 } 473 474 /** 475 * xe_ggtt_node_insert_balloon_locked - prevent allocation of specified GGTT addresses 476 * @node: the &xe_ggtt_node to hold reserved GGTT node 477 * @start: the starting GGTT address of the reserved region 478 * @end: then end GGTT address of the reserved region 479 * 480 * To be used in cases where ggtt->lock is already taken. 481 * Use xe_ggtt_node_remove_balloon_locked() to release a reserved GGTT node. 482 * 483 * Return: 0 on success or a negative error code on failure. 484 */ 485 int xe_ggtt_node_insert_balloon_locked(struct xe_ggtt_node *node, u64 start, u64 end) 486 { 487 struct xe_ggtt *ggtt = node->ggtt; 488 int err; 489 490 xe_tile_assert(ggtt->tile, start < end); 491 xe_tile_assert(ggtt->tile, IS_ALIGNED(start, XE_PAGE_SIZE)); 492 xe_tile_assert(ggtt->tile, IS_ALIGNED(end, XE_PAGE_SIZE)); 493 xe_tile_assert(ggtt->tile, !drm_mm_node_allocated(&node->base)); 494 lockdep_assert_held(&ggtt->lock); 495 496 node->base.color = 0; 497 node->base.start = start; 498 node->base.size = end - start; 499 500 err = drm_mm_reserve_node(&ggtt->mm, &node->base); 501 502 if (xe_gt_WARN(ggtt->tile->primary_gt, err, 503 "Failed to balloon GGTT %#llx-%#llx (%pe)\n", 504 node->base.start, node->base.start + node->base.size, ERR_PTR(err))) 505 return err; 506 507 xe_ggtt_dump_node(ggtt, &node->base, "balloon"); 508 return 0; 509 } 510 511 /** 512 * xe_ggtt_node_remove_balloon_locked - release a reserved GGTT region 513 * @node: the &xe_ggtt_node with reserved GGTT region 514 * 515 * To be used in cases where ggtt->lock is already taken. 516 * See xe_ggtt_node_insert_balloon_locked() for details. 517 */ 518 void xe_ggtt_node_remove_balloon_locked(struct xe_ggtt_node *node) 519 { 520 if (!xe_ggtt_node_allocated(node)) 521 return; 522 523 lockdep_assert_held(&node->ggtt->lock); 524 525 xe_ggtt_dump_node(node->ggtt, &node->base, "remove-balloon"); 526 527 drm_mm_remove_node(&node->base); 528 } 529 530 static void xe_ggtt_assert_fit(struct xe_ggtt *ggtt, u64 start, u64 size) 531 { 532 struct xe_tile *tile = ggtt->tile; 533 struct xe_device *xe = tile_to_xe(tile); 534 u64 __maybe_unused wopcm = xe_wopcm_size(xe); 535 536 xe_tile_assert(tile, start >= wopcm); 537 xe_tile_assert(tile, start + size < ggtt->size - wopcm); 538 } 539 540 /** 541 * xe_ggtt_shift_nodes_locked - Shift GGTT nodes to adjust for a change in usable address range. 542 * @ggtt: the &xe_ggtt struct instance 543 * @shift: change to the location of area provisioned for current VF 544 * 545 * This function moves all nodes from the GGTT VM, to a temp list. These nodes are expected 546 * to represent allocations in range formerly assigned to current VF, before the range changed. 547 * When the GGTT VM is completely clear of any nodes, they are re-added with shifted offsets. 548 * 549 * The function has no ability of failing - because it shifts existing nodes, without 550 * any additional processing. If the nodes were successfully existing at the old address, 551 * they will do the same at the new one. A fail inside this function would indicate that 552 * the list of nodes was either already damaged, or that the shift brings the address range 553 * outside of valid bounds. Both cases justify an assert rather than error code. 554 */ 555 void xe_ggtt_shift_nodes_locked(struct xe_ggtt *ggtt, s64 shift) 556 { 557 struct xe_tile *tile __maybe_unused = ggtt->tile; 558 struct drm_mm_node *node, *tmpn; 559 LIST_HEAD(temp_list_head); 560 561 lockdep_assert_held(&ggtt->lock); 562 563 if (IS_ENABLED(CONFIG_DRM_XE_DEBUG)) 564 drm_mm_for_each_node_safe(node, tmpn, &ggtt->mm) 565 xe_ggtt_assert_fit(ggtt, node->start + shift, node->size); 566 567 drm_mm_for_each_node_safe(node, tmpn, &ggtt->mm) { 568 drm_mm_remove_node(node); 569 list_add(&node->node_list, &temp_list_head); 570 } 571 572 list_for_each_entry_safe(node, tmpn, &temp_list_head, node_list) { 573 list_del(&node->node_list); 574 node->start += shift; 575 drm_mm_reserve_node(&ggtt->mm, node); 576 xe_tile_assert(tile, drm_mm_node_allocated(node)); 577 } 578 } 579 580 /** 581 * xe_ggtt_node_insert_locked - Locked version to insert a &xe_ggtt_node into the GGTT 582 * @node: the &xe_ggtt_node to be inserted 583 * @size: size of the node 584 * @align: alignment constrain of the node 585 * @mm_flags: flags to control the node behavior 586 * 587 * It cannot be called without first having called xe_ggtt_init() once. 588 * To be used in cases where ggtt->lock is already taken. 589 * 590 * Return: 0 on success or a negative error code on failure. 591 */ 592 int xe_ggtt_node_insert_locked(struct xe_ggtt_node *node, 593 u32 size, u32 align, u32 mm_flags) 594 { 595 return drm_mm_insert_node_generic(&node->ggtt->mm, &node->base, size, align, 0, 596 mm_flags); 597 } 598 599 /** 600 * xe_ggtt_node_insert - Insert a &xe_ggtt_node into the GGTT 601 * @node: the &xe_ggtt_node to be inserted 602 * @size: size of the node 603 * @align: alignment constrain of the node 604 * 605 * It cannot be called without first having called xe_ggtt_init() once. 606 * 607 * Return: 0 on success or a negative error code on failure. 608 */ 609 int xe_ggtt_node_insert(struct xe_ggtt_node *node, u32 size, u32 align) 610 { 611 int ret; 612 613 if (!node || !node->ggtt) 614 return -ENOENT; 615 616 mutex_lock(&node->ggtt->lock); 617 ret = xe_ggtt_node_insert_locked(node, size, align, 618 DRM_MM_INSERT_HIGH); 619 mutex_unlock(&node->ggtt->lock); 620 621 return ret; 622 } 623 624 /** 625 * xe_ggtt_node_init - Initialize %xe_ggtt_node struct 626 * @ggtt: the &xe_ggtt where the new node will later be inserted/reserved. 627 * 628 * This function will allocate the struct %xe_ggtt_node and return its pointer. 629 * This struct will then be freed after the node removal upon xe_ggtt_node_remove() 630 * or xe_ggtt_node_remove_balloon_locked(). 631 * Having %xe_ggtt_node struct allocated doesn't mean that the node is already allocated 632 * in GGTT. Only the xe_ggtt_node_insert(), xe_ggtt_node_insert_locked(), 633 * xe_ggtt_node_insert_balloon_locked() will ensure the node is inserted or reserved in GGTT. 634 * 635 * Return: A pointer to %xe_ggtt_node struct on success. An ERR_PTR otherwise. 636 **/ 637 struct xe_ggtt_node *xe_ggtt_node_init(struct xe_ggtt *ggtt) 638 { 639 struct xe_ggtt_node *node = kzalloc(sizeof(*node), GFP_NOFS); 640 641 if (!node) 642 return ERR_PTR(-ENOMEM); 643 644 INIT_WORK(&node->delayed_removal_work, ggtt_node_remove_work_func); 645 node->ggtt = ggtt; 646 647 return node; 648 } 649 650 /** 651 * xe_ggtt_node_fini - Forcebly finalize %xe_ggtt_node struct 652 * @node: the &xe_ggtt_node to be freed 653 * 654 * If anything went wrong with either xe_ggtt_node_insert(), xe_ggtt_node_insert_locked(), 655 * or xe_ggtt_node_insert_balloon_locked(); and this @node is not going to be reused, then, 656 * this function needs to be called to free the %xe_ggtt_node struct 657 **/ 658 void xe_ggtt_node_fini(struct xe_ggtt_node *node) 659 { 660 kfree(node); 661 } 662 663 /** 664 * xe_ggtt_node_allocated - Check if node is allocated in GGTT 665 * @node: the &xe_ggtt_node to be inspected 666 * 667 * Return: True if allocated, False otherwise. 668 */ 669 bool xe_ggtt_node_allocated(const struct xe_ggtt_node *node) 670 { 671 if (!node || !node->ggtt) 672 return false; 673 674 return drm_mm_node_allocated(&node->base); 675 } 676 677 /** 678 * xe_ggtt_map_bo - Map the BO into GGTT 679 * @ggtt: the &xe_ggtt where node will be mapped 680 * @node: the &xe_ggtt_node where this BO is mapped 681 * @bo: the &xe_bo to be mapped 682 * @pat_index: Which pat_index to use. 683 */ 684 void xe_ggtt_map_bo(struct xe_ggtt *ggtt, struct xe_ggtt_node *node, 685 struct xe_bo *bo, u16 pat_index) 686 { 687 688 u64 start, pte, end; 689 struct xe_res_cursor cur; 690 691 if (XE_WARN_ON(!node)) 692 return; 693 694 start = node->base.start; 695 end = start + xe_bo_size(bo); 696 697 pte = ggtt->pt_ops->pte_encode_flags(bo, pat_index); 698 if (!xe_bo_is_vram(bo) && !xe_bo_is_stolen(bo)) { 699 xe_assert(xe_bo_device(bo), bo->ttm.ttm); 700 701 for (xe_res_first_sg(xe_bo_sg(bo), 0, xe_bo_size(bo), &cur); 702 cur.remaining; xe_res_next(&cur, XE_PAGE_SIZE)) 703 ggtt->pt_ops->ggtt_set_pte(ggtt, end - cur.remaining, 704 pte | xe_res_dma(&cur)); 705 } else { 706 /* Prepend GPU offset */ 707 pte |= vram_region_gpu_offset(bo->ttm.resource); 708 709 for (xe_res_first(bo->ttm.resource, 0, xe_bo_size(bo), &cur); 710 cur.remaining; xe_res_next(&cur, XE_PAGE_SIZE)) 711 ggtt->pt_ops->ggtt_set_pte(ggtt, end - cur.remaining, 712 pte + cur.start); 713 } 714 } 715 716 /** 717 * xe_ggtt_map_bo_unlocked - Restore a mapping of a BO into GGTT 718 * @ggtt: the &xe_ggtt where node will be mapped 719 * @bo: the &xe_bo to be mapped 720 * 721 * This is used to restore a GGTT mapping after suspend. 722 */ 723 void xe_ggtt_map_bo_unlocked(struct xe_ggtt *ggtt, struct xe_bo *bo) 724 { 725 u16 cache_mode = bo->flags & XE_BO_FLAG_NEEDS_UC ? XE_CACHE_NONE : XE_CACHE_WB; 726 u16 pat_index = tile_to_xe(ggtt->tile)->pat.idx[cache_mode]; 727 728 mutex_lock(&ggtt->lock); 729 xe_ggtt_map_bo(ggtt, bo->ggtt_node[ggtt->tile->id], bo, pat_index); 730 mutex_unlock(&ggtt->lock); 731 } 732 733 static int __xe_ggtt_insert_bo_at(struct xe_ggtt *ggtt, struct xe_bo *bo, 734 u64 start, u64 end) 735 { 736 u64 alignment = bo->min_align > 0 ? bo->min_align : XE_PAGE_SIZE; 737 u8 tile_id = ggtt->tile->id; 738 int err; 739 740 if (xe_bo_is_vram(bo) && ggtt->flags & XE_GGTT_FLAGS_64K) 741 alignment = SZ_64K; 742 743 if (XE_WARN_ON(bo->ggtt_node[tile_id])) { 744 /* Someone's already inserted this BO in the GGTT */ 745 xe_tile_assert(ggtt->tile, bo->ggtt_node[tile_id]->base.size == xe_bo_size(bo)); 746 return 0; 747 } 748 749 err = xe_bo_validate(bo, NULL, false); 750 if (err) 751 return err; 752 753 xe_pm_runtime_get_noresume(tile_to_xe(ggtt->tile)); 754 755 bo->ggtt_node[tile_id] = xe_ggtt_node_init(ggtt); 756 if (IS_ERR(bo->ggtt_node[tile_id])) { 757 err = PTR_ERR(bo->ggtt_node[tile_id]); 758 bo->ggtt_node[tile_id] = NULL; 759 goto out; 760 } 761 762 mutex_lock(&ggtt->lock); 763 err = drm_mm_insert_node_in_range(&ggtt->mm, &bo->ggtt_node[tile_id]->base, 764 xe_bo_size(bo), alignment, 0, start, end, 0); 765 if (err) { 766 xe_ggtt_node_fini(bo->ggtt_node[tile_id]); 767 bo->ggtt_node[tile_id] = NULL; 768 } else { 769 u16 cache_mode = bo->flags & XE_BO_FLAG_NEEDS_UC ? XE_CACHE_NONE : XE_CACHE_WB; 770 u16 pat_index = tile_to_xe(ggtt->tile)->pat.idx[cache_mode]; 771 772 xe_ggtt_map_bo(ggtt, bo->ggtt_node[tile_id], bo, pat_index); 773 } 774 mutex_unlock(&ggtt->lock); 775 776 if (!err && bo->flags & XE_BO_FLAG_GGTT_INVALIDATE) 777 xe_ggtt_invalidate(ggtt); 778 779 out: 780 xe_pm_runtime_put(tile_to_xe(ggtt->tile)); 781 782 return err; 783 } 784 785 /** 786 * xe_ggtt_insert_bo_at - Insert BO at a specific GGTT space 787 * @ggtt: the &xe_ggtt where bo will be inserted 788 * @bo: the &xe_bo to be inserted 789 * @start: address where it will be inserted 790 * @end: end of the range where it will be inserted 791 * 792 * Return: 0 on success or a negative error code on failure. 793 */ 794 int xe_ggtt_insert_bo_at(struct xe_ggtt *ggtt, struct xe_bo *bo, 795 u64 start, u64 end) 796 { 797 return __xe_ggtt_insert_bo_at(ggtt, bo, start, end); 798 } 799 800 /** 801 * xe_ggtt_insert_bo - Insert BO into GGTT 802 * @ggtt: the &xe_ggtt where bo will be inserted 803 * @bo: the &xe_bo to be inserted 804 * 805 * Return: 0 on success or a negative error code on failure. 806 */ 807 int xe_ggtt_insert_bo(struct xe_ggtt *ggtt, struct xe_bo *bo) 808 { 809 return __xe_ggtt_insert_bo_at(ggtt, bo, 0, U64_MAX); 810 } 811 812 /** 813 * xe_ggtt_remove_bo - Remove a BO from the GGTT 814 * @ggtt: the &xe_ggtt where node will be removed 815 * @bo: the &xe_bo to be removed 816 */ 817 void xe_ggtt_remove_bo(struct xe_ggtt *ggtt, struct xe_bo *bo) 818 { 819 u8 tile_id = ggtt->tile->id; 820 821 if (XE_WARN_ON(!bo->ggtt_node[tile_id])) 822 return; 823 824 /* This BO is not currently in the GGTT */ 825 xe_tile_assert(ggtt->tile, bo->ggtt_node[tile_id]->base.size == xe_bo_size(bo)); 826 827 xe_ggtt_node_remove(bo->ggtt_node[tile_id], 828 bo->flags & XE_BO_FLAG_GGTT_INVALIDATE); 829 } 830 831 /** 832 * xe_ggtt_largest_hole - Largest GGTT hole 833 * @ggtt: the &xe_ggtt that will be inspected 834 * @alignment: minimum alignment 835 * @spare: If not NULL: in: desired memory size to be spared / out: Adjusted possible spare 836 * 837 * Return: size of the largest continuous GGTT region 838 */ 839 u64 xe_ggtt_largest_hole(struct xe_ggtt *ggtt, u64 alignment, u64 *spare) 840 { 841 const struct drm_mm *mm = &ggtt->mm; 842 const struct drm_mm_node *entry; 843 u64 hole_min_start = xe_wopcm_size(tile_to_xe(ggtt->tile)); 844 u64 hole_start, hole_end, hole_size; 845 u64 max_hole = 0; 846 847 mutex_lock(&ggtt->lock); 848 849 drm_mm_for_each_hole(entry, mm, hole_start, hole_end) { 850 hole_start = max(hole_start, hole_min_start); 851 hole_start = ALIGN(hole_start, alignment); 852 hole_end = ALIGN_DOWN(hole_end, alignment); 853 if (hole_start >= hole_end) 854 continue; 855 hole_size = hole_end - hole_start; 856 if (spare) 857 *spare -= min3(*spare, hole_size, max_hole); 858 max_hole = max(max_hole, hole_size); 859 } 860 861 mutex_unlock(&ggtt->lock); 862 863 return max_hole; 864 } 865 866 #ifdef CONFIG_PCI_IOV 867 static u64 xe_encode_vfid_pte(u16 vfid) 868 { 869 return FIELD_PREP(GGTT_PTE_VFID, vfid) | XE_PAGE_PRESENT; 870 } 871 872 static void xe_ggtt_assign_locked(struct xe_ggtt *ggtt, const struct drm_mm_node *node, u16 vfid) 873 { 874 u64 start = node->start; 875 u64 size = node->size; 876 u64 end = start + size - 1; 877 u64 pte = xe_encode_vfid_pte(vfid); 878 879 lockdep_assert_held(&ggtt->lock); 880 881 if (!drm_mm_node_allocated(node)) 882 return; 883 884 while (start < end) { 885 ggtt->pt_ops->ggtt_set_pte(ggtt, start, pte); 886 start += XE_PAGE_SIZE; 887 } 888 889 xe_ggtt_invalidate(ggtt); 890 } 891 892 /** 893 * xe_ggtt_assign - assign a GGTT region to the VF 894 * @node: the &xe_ggtt_node to update 895 * @vfid: the VF identifier 896 * 897 * This function is used by the PF driver to assign a GGTT region to the VF. 898 * In addition to PTE's VFID bits 11:2 also PRESENT bit 0 is set as on some 899 * platforms VFs can't modify that either. 900 */ 901 void xe_ggtt_assign(const struct xe_ggtt_node *node, u16 vfid) 902 { 903 mutex_lock(&node->ggtt->lock); 904 xe_ggtt_assign_locked(node->ggtt, &node->base, vfid); 905 mutex_unlock(&node->ggtt->lock); 906 } 907 #endif 908 909 /** 910 * xe_ggtt_dump - Dump GGTT for debug 911 * @ggtt: the &xe_ggtt to be dumped 912 * @p: the &drm_mm_printer helper handle to be used to dump the information 913 * 914 * Return: 0 on success or a negative error code on failure. 915 */ 916 int xe_ggtt_dump(struct xe_ggtt *ggtt, struct drm_printer *p) 917 { 918 int err; 919 920 err = mutex_lock_interruptible(&ggtt->lock); 921 if (err) 922 return err; 923 924 drm_mm_print(&ggtt->mm, p); 925 mutex_unlock(&ggtt->lock); 926 return err; 927 } 928 929 /** 930 * xe_ggtt_print_holes - Print holes 931 * @ggtt: the &xe_ggtt to be inspected 932 * @alignment: min alignment 933 * @p: the &drm_printer 934 * 935 * Print GGTT ranges that are available and return total size available. 936 * 937 * Return: Total available size. 938 */ 939 u64 xe_ggtt_print_holes(struct xe_ggtt *ggtt, u64 alignment, struct drm_printer *p) 940 { 941 const struct drm_mm *mm = &ggtt->mm; 942 const struct drm_mm_node *entry; 943 u64 hole_min_start = xe_wopcm_size(tile_to_xe(ggtt->tile)); 944 u64 hole_start, hole_end, hole_size; 945 u64 total = 0; 946 char buf[10]; 947 948 mutex_lock(&ggtt->lock); 949 950 drm_mm_for_each_hole(entry, mm, hole_start, hole_end) { 951 hole_start = max(hole_start, hole_min_start); 952 hole_start = ALIGN(hole_start, alignment); 953 hole_end = ALIGN_DOWN(hole_end, alignment); 954 if (hole_start >= hole_end) 955 continue; 956 hole_size = hole_end - hole_start; 957 total += hole_size; 958 959 string_get_size(hole_size, 1, STRING_UNITS_2, buf, sizeof(buf)); 960 drm_printf(p, "range:\t%#llx-%#llx\t(%s)\n", 961 hole_start, hole_end - 1, buf); 962 } 963 964 mutex_unlock(&ggtt->lock); 965 966 return total; 967 } 968 969 /** 970 * xe_ggtt_encode_pte_flags - Get PTE encoding flags for BO 971 * @ggtt: &xe_ggtt 972 * @bo: &xe_bo 973 * @pat_index: The pat_index for the PTE. 974 * 975 * This function returns the pte_flags for a given BO, without address. 976 * It's used for DPT to fill a GGTT mapped BO with a linear lookup table. 977 */ 978 u64 xe_ggtt_encode_pte_flags(struct xe_ggtt *ggtt, 979 struct xe_bo *bo, u16 pat_index) 980 { 981 return ggtt->pt_ops->pte_encode_flags(bo, pat_index); 982 } 983 984 /** 985 * xe_ggtt_read_pte - Read a PTE from the GGTT 986 * @ggtt: &xe_ggtt 987 * @offset: the offset for which the mapping should be read. 988 * 989 * Used by testcases, and by display reading out an inherited bios FB. 990 */ 991 u64 xe_ggtt_read_pte(struct xe_ggtt *ggtt, u64 offset) 992 { 993 return ioread64(ggtt->gsm + (offset / XE_PAGE_SIZE)); 994 } 995