1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2021 Intel Corporation 4 */ 5 6 #include "xe_exec_queue.h" 7 8 #include <linux/nospec.h> 9 10 #include <drm/drm_device.h> 11 #include <drm/drm_drv.h> 12 #include <drm/drm_file.h> 13 #include <uapi/drm/xe_drm.h> 14 15 #include "xe_dep_scheduler.h" 16 #include "xe_device.h" 17 #include "xe_gt.h" 18 #include "xe_gt_sriov_vf.h" 19 #include "xe_hw_engine_class_sysfs.h" 20 #include "xe_hw_engine_group.h" 21 #include "xe_hw_fence.h" 22 #include "xe_irq.h" 23 #include "xe_lrc.h" 24 #include "xe_macros.h" 25 #include "xe_migrate.h" 26 #include "xe_pm.h" 27 #include "xe_ring_ops_types.h" 28 #include "xe_trace.h" 29 #include "xe_vm.h" 30 #include "xe_pxp.h" 31 32 /** 33 * DOC: Execution Queue 34 * 35 * An Execution queue is an interface for the HW context of execution. 36 * The user creates an execution queue, submits the GPU jobs through those 37 * queues and in the end destroys them. 38 * 39 * Execution queues can also be created by XeKMD itself for driver internal 40 * operations like object migration etc. 41 * 42 * An execution queue is associated with a specified HW engine or a group of 43 * engines (belonging to the same tile and engine class) and any GPU job 44 * submitted on the queue will be run on one of these engines. 45 * 46 * An execution queue is tied to an address space (VM). It holds a reference 47 * of the associated VM and the underlying Logical Ring Context/s (LRC/s) 48 * until the queue is destroyed. 49 * 50 * The execution queue sits on top of the submission backend. It opaquely 51 * handles the GuC and Execlist backends whichever the platform uses, and 52 * the ring operations the different engine classes support. 53 */ 54 55 enum xe_exec_queue_sched_prop { 56 XE_EXEC_QUEUE_JOB_TIMEOUT = 0, 57 XE_EXEC_QUEUE_TIMESLICE = 1, 58 XE_EXEC_QUEUE_PREEMPT_TIMEOUT = 2, 59 XE_EXEC_QUEUE_SCHED_PROP_MAX = 3, 60 }; 61 62 static int exec_queue_user_extensions(struct xe_device *xe, struct xe_exec_queue *q, 63 u64 extensions, int ext_number); 64 65 static void __xe_exec_queue_free(struct xe_exec_queue *q) 66 { 67 int i; 68 69 for (i = 0; i < XE_EXEC_QUEUE_TLB_INVAL_COUNT; ++i) 70 if (q->tlb_inval[i].dep_scheduler) 71 xe_dep_scheduler_fini(q->tlb_inval[i].dep_scheduler); 72 73 if (xe_exec_queue_uses_pxp(q)) 74 xe_pxp_exec_queue_remove(gt_to_xe(q->gt)->pxp, q); 75 if (q->vm) 76 xe_vm_put(q->vm); 77 78 if (q->xef) 79 xe_file_put(q->xef); 80 81 kfree(q); 82 } 83 84 static int alloc_dep_schedulers(struct xe_device *xe, struct xe_exec_queue *q) 85 { 86 struct xe_tile *tile = gt_to_tile(q->gt); 87 int i; 88 89 for (i = 0; i < XE_EXEC_QUEUE_TLB_INVAL_COUNT; ++i) { 90 struct xe_dep_scheduler *dep_scheduler; 91 struct xe_gt *gt; 92 struct workqueue_struct *wq; 93 94 if (i == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT) 95 gt = tile->primary_gt; 96 else 97 gt = tile->media_gt; 98 99 if (!gt) 100 continue; 101 102 wq = gt->tlb_inval.job_wq; 103 104 #define MAX_TLB_INVAL_JOBS 16 /* Picking a reasonable value */ 105 dep_scheduler = xe_dep_scheduler_create(xe, wq, q->name, 106 MAX_TLB_INVAL_JOBS); 107 if (IS_ERR(dep_scheduler)) 108 return PTR_ERR(dep_scheduler); 109 110 q->tlb_inval[i].dep_scheduler = dep_scheduler; 111 } 112 #undef MAX_TLB_INVAL_JOBS 113 114 return 0; 115 } 116 117 static struct xe_exec_queue *__xe_exec_queue_alloc(struct xe_device *xe, 118 struct xe_vm *vm, 119 u32 logical_mask, 120 u16 width, struct xe_hw_engine *hwe, 121 u32 flags, u64 extensions) 122 { 123 struct xe_exec_queue *q; 124 struct xe_gt *gt = hwe->gt; 125 int err; 126 127 /* only kernel queues can be permanent */ 128 XE_WARN_ON((flags & EXEC_QUEUE_FLAG_PERMANENT) && !(flags & EXEC_QUEUE_FLAG_KERNEL)); 129 130 q = kzalloc(struct_size(q, lrc, width), GFP_KERNEL); 131 if (!q) 132 return ERR_PTR(-ENOMEM); 133 134 kref_init(&q->refcount); 135 q->flags = flags; 136 q->hwe = hwe; 137 q->gt = gt; 138 q->class = hwe->class; 139 q->width = width; 140 q->msix_vec = XE_IRQ_DEFAULT_MSIX; 141 q->logical_mask = logical_mask; 142 q->fence_irq = >->fence_irq[hwe->class]; 143 q->ring_ops = gt->ring_ops[hwe->class]; 144 q->ops = gt->exec_queue_ops; 145 INIT_LIST_HEAD(&q->lr.link); 146 INIT_LIST_HEAD(&q->multi_gt_link); 147 INIT_LIST_HEAD(&q->hw_engine_group_link); 148 INIT_LIST_HEAD(&q->pxp.link); 149 150 q->sched_props.timeslice_us = hwe->eclass->sched_props.timeslice_us; 151 q->sched_props.preempt_timeout_us = 152 hwe->eclass->sched_props.preempt_timeout_us; 153 q->sched_props.job_timeout_ms = 154 hwe->eclass->sched_props.job_timeout_ms; 155 if (q->flags & EXEC_QUEUE_FLAG_KERNEL && 156 q->flags & EXEC_QUEUE_FLAG_HIGH_PRIORITY) 157 q->sched_props.priority = XE_EXEC_QUEUE_PRIORITY_KERNEL; 158 else 159 q->sched_props.priority = XE_EXEC_QUEUE_PRIORITY_NORMAL; 160 161 if (q->flags & (EXEC_QUEUE_FLAG_MIGRATE | EXEC_QUEUE_FLAG_VM)) { 162 err = alloc_dep_schedulers(xe, q); 163 if (err) { 164 __xe_exec_queue_free(q); 165 return ERR_PTR(err); 166 } 167 } 168 169 if (vm) 170 q->vm = xe_vm_get(vm); 171 172 if (extensions) { 173 /* 174 * may set q->usm, must come before xe_lrc_create(), 175 * may overwrite q->sched_props, must come before q->ops->init() 176 */ 177 err = exec_queue_user_extensions(xe, q, extensions, 0); 178 if (err) { 179 __xe_exec_queue_free(q); 180 return ERR_PTR(err); 181 } 182 } 183 184 return q; 185 } 186 187 static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags) 188 { 189 int i, err; 190 u32 flags = 0; 191 192 /* 193 * PXP workloads executing on RCS or CCS must run in isolation (i.e. no 194 * other workload can use the EUs at the same time). On MTL this is done 195 * by setting the RUNALONE bit in the LRC, while starting on Xe2 there 196 * is a dedicated bit for it. 197 */ 198 if (xe_exec_queue_uses_pxp(q) && 199 (q->class == XE_ENGINE_CLASS_RENDER || q->class == XE_ENGINE_CLASS_COMPUTE)) { 200 if (GRAPHICS_VER(gt_to_xe(q->gt)) >= 20) 201 flags |= XE_LRC_CREATE_PXP; 202 else 203 flags |= XE_LRC_CREATE_RUNALONE; 204 } 205 206 if (!(exec_queue_flags & EXEC_QUEUE_FLAG_KERNEL)) 207 flags |= XE_LRC_CREATE_USER_CTX; 208 209 err = q->ops->init(q); 210 if (err) 211 return err; 212 213 /* 214 * This must occur after q->ops->init to avoid race conditions during VF 215 * post-migration recovery, as the fixups for the LRC GGTT addresses 216 * depend on the queue being present in the backend tracking structure. 217 * 218 * In addition to above, we must wait on inflight GGTT changes to avoid 219 * writing out stale values here. Such wait provides a solid solution 220 * (without a race) only if the function can detect migration instantly 221 * from the moment vCPU resumes execution. 222 */ 223 for (i = 0; i < q->width; ++i) { 224 struct xe_lrc *lrc; 225 226 xe_gt_sriov_vf_wait_valid_ggtt(q->gt); 227 lrc = xe_lrc_create(q->hwe, q->vm, xe_lrc_ring_size(), 228 q->msix_vec, flags); 229 if (IS_ERR(lrc)) { 230 err = PTR_ERR(lrc); 231 goto err_lrc; 232 } 233 234 /* Pairs with READ_ONCE to xe_exec_queue_contexts_hwsp_rebase */ 235 WRITE_ONCE(q->lrc[i], lrc); 236 } 237 238 return 0; 239 240 err_lrc: 241 for (i = i - 1; i >= 0; --i) 242 xe_lrc_put(q->lrc[i]); 243 return err; 244 } 245 246 static void __xe_exec_queue_fini(struct xe_exec_queue *q) 247 { 248 int i; 249 250 q->ops->fini(q); 251 252 for (i = 0; i < q->width; ++i) 253 xe_lrc_put(q->lrc[i]); 254 } 255 256 struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *vm, 257 u32 logical_mask, u16 width, 258 struct xe_hw_engine *hwe, u32 flags, 259 u64 extensions) 260 { 261 struct xe_exec_queue *q; 262 int err; 263 264 /* VMs for GSCCS queues (and only those) must have the XE_VM_FLAG_GSC flag */ 265 xe_assert(xe, !vm || (!!(vm->flags & XE_VM_FLAG_GSC) == !!(hwe->engine_id == XE_HW_ENGINE_GSCCS0))); 266 267 q = __xe_exec_queue_alloc(xe, vm, logical_mask, width, hwe, flags, 268 extensions); 269 if (IS_ERR(q)) 270 return q; 271 272 err = __xe_exec_queue_init(q, flags); 273 if (err) 274 goto err_post_alloc; 275 276 /* 277 * We can only add the queue to the PXP list after the init is complete, 278 * because the PXP termination can call exec_queue_kill and that will 279 * go bad if the queue is only half-initialized. This means that we 280 * can't do it when we handle the PXP extension in __xe_exec_queue_alloc 281 * and we need to do it here instead. 282 */ 283 if (xe_exec_queue_uses_pxp(q)) { 284 err = xe_pxp_exec_queue_add(xe->pxp, q); 285 if (err) 286 goto err_post_init; 287 } 288 289 return q; 290 291 err_post_init: 292 __xe_exec_queue_fini(q); 293 err_post_alloc: 294 __xe_exec_queue_free(q); 295 return ERR_PTR(err); 296 } 297 ALLOW_ERROR_INJECTION(xe_exec_queue_create, ERRNO); 298 299 struct xe_exec_queue *xe_exec_queue_create_class(struct xe_device *xe, struct xe_gt *gt, 300 struct xe_vm *vm, 301 enum xe_engine_class class, 302 u32 flags, u64 extensions) 303 { 304 struct xe_hw_engine *hwe, *hwe0 = NULL; 305 enum xe_hw_engine_id id; 306 u32 logical_mask = 0; 307 308 for_each_hw_engine(hwe, gt, id) { 309 if (xe_hw_engine_is_reserved(hwe)) 310 continue; 311 312 if (hwe->class == class) { 313 logical_mask |= BIT(hwe->logical_instance); 314 if (!hwe0) 315 hwe0 = hwe; 316 } 317 } 318 319 if (!logical_mask) 320 return ERR_PTR(-ENODEV); 321 322 return xe_exec_queue_create(xe, vm, logical_mask, 1, hwe0, flags, extensions); 323 } 324 325 /** 326 * xe_exec_queue_create_bind() - Create bind exec queue. 327 * @xe: Xe device. 328 * @tile: tile which bind exec queue belongs to. 329 * @flags: exec queue creation flags 330 * @extensions: exec queue creation extensions 331 * 332 * Normalize bind exec queue creation. Bind exec queue is tied to migration VM 333 * for access to physical memory required for page table programming. On a 334 * faulting devices the reserved copy engine instance must be used to avoid 335 * deadlocking (user binds cannot get stuck behind faults as kernel binds which 336 * resolve faults depend on user binds). On non-faulting devices any copy engine 337 * can be used. 338 * 339 * Returns exec queue on success, ERR_PTR on failure 340 */ 341 struct xe_exec_queue *xe_exec_queue_create_bind(struct xe_device *xe, 342 struct xe_tile *tile, 343 u32 flags, u64 extensions) 344 { 345 struct xe_gt *gt = tile->primary_gt; 346 struct xe_exec_queue *q; 347 struct xe_vm *migrate_vm; 348 349 migrate_vm = xe_migrate_get_vm(tile->migrate); 350 if (xe->info.has_usm) { 351 struct xe_hw_engine *hwe = xe_gt_hw_engine(gt, 352 XE_ENGINE_CLASS_COPY, 353 gt->usm.reserved_bcs_instance, 354 false); 355 356 if (!hwe) { 357 xe_vm_put(migrate_vm); 358 return ERR_PTR(-EINVAL); 359 } 360 361 q = xe_exec_queue_create(xe, migrate_vm, 362 BIT(hwe->logical_instance), 1, hwe, 363 flags, extensions); 364 } else { 365 q = xe_exec_queue_create_class(xe, gt, migrate_vm, 366 XE_ENGINE_CLASS_COPY, flags, 367 extensions); 368 } 369 xe_vm_put(migrate_vm); 370 371 return q; 372 } 373 ALLOW_ERROR_INJECTION(xe_exec_queue_create_bind, ERRNO); 374 375 void xe_exec_queue_destroy(struct kref *ref) 376 { 377 struct xe_exec_queue *q = container_of(ref, struct xe_exec_queue, refcount); 378 struct xe_exec_queue *eq, *next; 379 380 if (xe_exec_queue_uses_pxp(q)) 381 xe_pxp_exec_queue_remove(gt_to_xe(q->gt)->pxp, q); 382 383 xe_exec_queue_last_fence_put_unlocked(q); 384 if (!(q->flags & EXEC_QUEUE_FLAG_BIND_ENGINE_CHILD)) { 385 list_for_each_entry_safe(eq, next, &q->multi_gt_list, 386 multi_gt_link) 387 xe_exec_queue_put(eq); 388 } 389 390 q->ops->destroy(q); 391 } 392 393 void xe_exec_queue_fini(struct xe_exec_queue *q) 394 { 395 /* 396 * Before releasing our ref to lrc and xef, accumulate our run ticks 397 * and wakeup any waiters. 398 */ 399 xe_exec_queue_update_run_ticks(q); 400 if (q->xef && atomic_dec_and_test(&q->xef->exec_queue.pending_removal)) 401 wake_up_var(&q->xef->exec_queue.pending_removal); 402 403 __xe_exec_queue_fini(q); 404 __xe_exec_queue_free(q); 405 } 406 407 void xe_exec_queue_assign_name(struct xe_exec_queue *q, u32 instance) 408 { 409 switch (q->class) { 410 case XE_ENGINE_CLASS_RENDER: 411 snprintf(q->name, sizeof(q->name), "rcs%d", instance); 412 break; 413 case XE_ENGINE_CLASS_VIDEO_DECODE: 414 snprintf(q->name, sizeof(q->name), "vcs%d", instance); 415 break; 416 case XE_ENGINE_CLASS_VIDEO_ENHANCE: 417 snprintf(q->name, sizeof(q->name), "vecs%d", instance); 418 break; 419 case XE_ENGINE_CLASS_COPY: 420 snprintf(q->name, sizeof(q->name), "bcs%d", instance); 421 break; 422 case XE_ENGINE_CLASS_COMPUTE: 423 snprintf(q->name, sizeof(q->name), "ccs%d", instance); 424 break; 425 case XE_ENGINE_CLASS_OTHER: 426 snprintf(q->name, sizeof(q->name), "gsccs%d", instance); 427 break; 428 default: 429 XE_WARN_ON(q->class); 430 } 431 } 432 433 struct xe_exec_queue *xe_exec_queue_lookup(struct xe_file *xef, u32 id) 434 { 435 struct xe_exec_queue *q; 436 437 mutex_lock(&xef->exec_queue.lock); 438 q = xa_load(&xef->exec_queue.xa, id); 439 if (q) 440 xe_exec_queue_get(q); 441 mutex_unlock(&xef->exec_queue.lock); 442 443 return q; 444 } 445 446 enum xe_exec_queue_priority 447 xe_exec_queue_device_get_max_priority(struct xe_device *xe) 448 { 449 return capable(CAP_SYS_NICE) ? XE_EXEC_QUEUE_PRIORITY_HIGH : 450 XE_EXEC_QUEUE_PRIORITY_NORMAL; 451 } 452 453 static int exec_queue_set_priority(struct xe_device *xe, struct xe_exec_queue *q, 454 u64 value) 455 { 456 if (XE_IOCTL_DBG(xe, value > XE_EXEC_QUEUE_PRIORITY_HIGH)) 457 return -EINVAL; 458 459 if (XE_IOCTL_DBG(xe, value > xe_exec_queue_device_get_max_priority(xe))) 460 return -EPERM; 461 462 q->sched_props.priority = value; 463 return 0; 464 } 465 466 static bool xe_exec_queue_enforce_schedule_limit(void) 467 { 468 #if IS_ENABLED(CONFIG_DRM_XE_ENABLE_SCHEDTIMEOUT_LIMIT) 469 return true; 470 #else 471 return !capable(CAP_SYS_NICE); 472 #endif 473 } 474 475 static void 476 xe_exec_queue_get_prop_minmax(struct xe_hw_engine_class_intf *eclass, 477 enum xe_exec_queue_sched_prop prop, 478 u32 *min, u32 *max) 479 { 480 switch (prop) { 481 case XE_EXEC_QUEUE_JOB_TIMEOUT: 482 *min = eclass->sched_props.job_timeout_min; 483 *max = eclass->sched_props.job_timeout_max; 484 break; 485 case XE_EXEC_QUEUE_TIMESLICE: 486 *min = eclass->sched_props.timeslice_min; 487 *max = eclass->sched_props.timeslice_max; 488 break; 489 case XE_EXEC_QUEUE_PREEMPT_TIMEOUT: 490 *min = eclass->sched_props.preempt_timeout_min; 491 *max = eclass->sched_props.preempt_timeout_max; 492 break; 493 default: 494 break; 495 } 496 #if IS_ENABLED(CONFIG_DRM_XE_ENABLE_SCHEDTIMEOUT_LIMIT) 497 if (capable(CAP_SYS_NICE)) { 498 switch (prop) { 499 case XE_EXEC_QUEUE_JOB_TIMEOUT: 500 *min = XE_HW_ENGINE_JOB_TIMEOUT_MIN; 501 *max = XE_HW_ENGINE_JOB_TIMEOUT_MAX; 502 break; 503 case XE_EXEC_QUEUE_TIMESLICE: 504 *min = XE_HW_ENGINE_TIMESLICE_MIN; 505 *max = XE_HW_ENGINE_TIMESLICE_MAX; 506 break; 507 case XE_EXEC_QUEUE_PREEMPT_TIMEOUT: 508 *min = XE_HW_ENGINE_PREEMPT_TIMEOUT_MIN; 509 *max = XE_HW_ENGINE_PREEMPT_TIMEOUT_MAX; 510 break; 511 default: 512 break; 513 } 514 } 515 #endif 516 } 517 518 static int exec_queue_set_timeslice(struct xe_device *xe, struct xe_exec_queue *q, 519 u64 value) 520 { 521 u32 min = 0, max = 0; 522 523 xe_exec_queue_get_prop_minmax(q->hwe->eclass, 524 XE_EXEC_QUEUE_TIMESLICE, &min, &max); 525 526 if (xe_exec_queue_enforce_schedule_limit() && 527 !xe_hw_engine_timeout_in_range(value, min, max)) 528 return -EINVAL; 529 530 q->sched_props.timeslice_us = value; 531 return 0; 532 } 533 534 static int 535 exec_queue_set_pxp_type(struct xe_device *xe, struct xe_exec_queue *q, u64 value) 536 { 537 if (value == DRM_XE_PXP_TYPE_NONE) 538 return 0; 539 540 /* we only support HWDRM sessions right now */ 541 if (XE_IOCTL_DBG(xe, value != DRM_XE_PXP_TYPE_HWDRM)) 542 return -EINVAL; 543 544 if (!xe_pxp_is_enabled(xe->pxp)) 545 return -ENODEV; 546 547 return xe_pxp_exec_queue_set_type(xe->pxp, q, DRM_XE_PXP_TYPE_HWDRM); 548 } 549 550 typedef int (*xe_exec_queue_set_property_fn)(struct xe_device *xe, 551 struct xe_exec_queue *q, 552 u64 value); 553 554 static const xe_exec_queue_set_property_fn exec_queue_set_property_funcs[] = { 555 [DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY] = exec_queue_set_priority, 556 [DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE] = exec_queue_set_timeslice, 557 [DRM_XE_EXEC_QUEUE_SET_PROPERTY_PXP_TYPE] = exec_queue_set_pxp_type, 558 }; 559 560 static int exec_queue_user_ext_set_property(struct xe_device *xe, 561 struct xe_exec_queue *q, 562 u64 extension) 563 { 564 u64 __user *address = u64_to_user_ptr(extension); 565 struct drm_xe_ext_set_property ext; 566 int err; 567 u32 idx; 568 569 err = copy_from_user(&ext, address, sizeof(ext)); 570 if (XE_IOCTL_DBG(xe, err)) 571 return -EFAULT; 572 573 if (XE_IOCTL_DBG(xe, ext.property >= 574 ARRAY_SIZE(exec_queue_set_property_funcs)) || 575 XE_IOCTL_DBG(xe, ext.pad) || 576 XE_IOCTL_DBG(xe, ext.property != DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY && 577 ext.property != DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE && 578 ext.property != DRM_XE_EXEC_QUEUE_SET_PROPERTY_PXP_TYPE)) 579 return -EINVAL; 580 581 idx = array_index_nospec(ext.property, ARRAY_SIZE(exec_queue_set_property_funcs)); 582 if (!exec_queue_set_property_funcs[idx]) 583 return -EINVAL; 584 585 return exec_queue_set_property_funcs[idx](xe, q, ext.value); 586 } 587 588 typedef int (*xe_exec_queue_user_extension_fn)(struct xe_device *xe, 589 struct xe_exec_queue *q, 590 u64 extension); 591 592 static const xe_exec_queue_user_extension_fn exec_queue_user_extension_funcs[] = { 593 [DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY] = exec_queue_user_ext_set_property, 594 }; 595 596 #define MAX_USER_EXTENSIONS 16 597 static int exec_queue_user_extensions(struct xe_device *xe, struct xe_exec_queue *q, 598 u64 extensions, int ext_number) 599 { 600 u64 __user *address = u64_to_user_ptr(extensions); 601 struct drm_xe_user_extension ext; 602 int err; 603 u32 idx; 604 605 if (XE_IOCTL_DBG(xe, ext_number >= MAX_USER_EXTENSIONS)) 606 return -E2BIG; 607 608 err = copy_from_user(&ext, address, sizeof(ext)); 609 if (XE_IOCTL_DBG(xe, err)) 610 return -EFAULT; 611 612 if (XE_IOCTL_DBG(xe, ext.pad) || 613 XE_IOCTL_DBG(xe, ext.name >= 614 ARRAY_SIZE(exec_queue_user_extension_funcs))) 615 return -EINVAL; 616 617 idx = array_index_nospec(ext.name, 618 ARRAY_SIZE(exec_queue_user_extension_funcs)); 619 err = exec_queue_user_extension_funcs[idx](xe, q, extensions); 620 if (XE_IOCTL_DBG(xe, err)) 621 return err; 622 623 if (ext.next_extension) 624 return exec_queue_user_extensions(xe, q, ext.next_extension, 625 ++ext_number); 626 627 return 0; 628 } 629 630 static u32 calc_validate_logical_mask(struct xe_device *xe, 631 struct drm_xe_engine_class_instance *eci, 632 u16 width, u16 num_placements) 633 { 634 int len = width * num_placements; 635 int i, j, n; 636 u16 class; 637 u16 gt_id; 638 u32 return_mask = 0, prev_mask; 639 640 if (XE_IOCTL_DBG(xe, !xe_device_uc_enabled(xe) && 641 len > 1)) 642 return 0; 643 644 for (i = 0; i < width; ++i) { 645 u32 current_mask = 0; 646 647 for (j = 0; j < num_placements; ++j) { 648 struct xe_hw_engine *hwe; 649 650 n = j * width + i; 651 652 hwe = xe_hw_engine_lookup(xe, eci[n]); 653 if (XE_IOCTL_DBG(xe, !hwe)) 654 return 0; 655 656 if (XE_IOCTL_DBG(xe, xe_hw_engine_is_reserved(hwe))) 657 return 0; 658 659 if (XE_IOCTL_DBG(xe, n && eci[n].gt_id != gt_id) || 660 XE_IOCTL_DBG(xe, n && eci[n].engine_class != class)) 661 return 0; 662 663 class = eci[n].engine_class; 664 gt_id = eci[n].gt_id; 665 666 if (width == 1 || !i) 667 return_mask |= BIT(eci[n].engine_instance); 668 current_mask |= BIT(eci[n].engine_instance); 669 } 670 671 /* Parallel submissions must be logically contiguous */ 672 if (i && XE_IOCTL_DBG(xe, current_mask != prev_mask << 1)) 673 return 0; 674 675 prev_mask = current_mask; 676 } 677 678 return return_mask; 679 } 680 681 int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data, 682 struct drm_file *file) 683 { 684 struct xe_device *xe = to_xe_device(dev); 685 struct xe_file *xef = to_xe_file(file); 686 struct drm_xe_exec_queue_create *args = data; 687 struct drm_xe_engine_class_instance eci[XE_HW_ENGINE_MAX_INSTANCE]; 688 struct drm_xe_engine_class_instance __user *user_eci = 689 u64_to_user_ptr(args->instances); 690 struct xe_hw_engine *hwe; 691 struct xe_vm *vm; 692 struct xe_tile *tile; 693 struct xe_exec_queue *q = NULL; 694 u32 logical_mask; 695 u32 flags = 0; 696 u32 id; 697 u32 len; 698 int err; 699 700 if (XE_IOCTL_DBG(xe, args->flags & ~DRM_XE_EXEC_QUEUE_LOW_LATENCY_HINT) || 701 XE_IOCTL_DBG(xe, args->reserved[0] || args->reserved[1])) 702 return -EINVAL; 703 704 len = args->width * args->num_placements; 705 if (XE_IOCTL_DBG(xe, !len || len > XE_HW_ENGINE_MAX_INSTANCE)) 706 return -EINVAL; 707 708 err = copy_from_user(eci, user_eci, 709 sizeof(struct drm_xe_engine_class_instance) * len); 710 if (XE_IOCTL_DBG(xe, err)) 711 return -EFAULT; 712 713 if (XE_IOCTL_DBG(xe, !xe_device_get_gt(xe, eci[0].gt_id))) 714 return -EINVAL; 715 716 if (args->flags & DRM_XE_EXEC_QUEUE_LOW_LATENCY_HINT) 717 flags |= EXEC_QUEUE_FLAG_LOW_LATENCY; 718 719 if (eci[0].engine_class == DRM_XE_ENGINE_CLASS_VM_BIND) { 720 if (XE_IOCTL_DBG(xe, args->width != 1) || 721 XE_IOCTL_DBG(xe, args->num_placements != 1) || 722 XE_IOCTL_DBG(xe, eci[0].engine_instance != 0)) 723 return -EINVAL; 724 725 for_each_tile(tile, xe, id) { 726 struct xe_exec_queue *new; 727 728 flags |= EXEC_QUEUE_FLAG_VM; 729 if (id) 730 flags |= EXEC_QUEUE_FLAG_BIND_ENGINE_CHILD; 731 732 new = xe_exec_queue_create_bind(xe, tile, flags, 733 args->extensions); 734 if (IS_ERR(new)) { 735 err = PTR_ERR(new); 736 if (q) 737 goto put_exec_queue; 738 return err; 739 } 740 if (id == 0) 741 q = new; 742 else 743 list_add_tail(&new->multi_gt_list, 744 &q->multi_gt_link); 745 } 746 } else { 747 logical_mask = calc_validate_logical_mask(xe, eci, 748 args->width, 749 args->num_placements); 750 if (XE_IOCTL_DBG(xe, !logical_mask)) 751 return -EINVAL; 752 753 hwe = xe_hw_engine_lookup(xe, eci[0]); 754 if (XE_IOCTL_DBG(xe, !hwe)) 755 return -EINVAL; 756 757 vm = xe_vm_lookup(xef, args->vm_id); 758 if (XE_IOCTL_DBG(xe, !vm)) 759 return -ENOENT; 760 761 err = down_read_interruptible(&vm->lock); 762 if (err) { 763 xe_vm_put(vm); 764 return err; 765 } 766 767 if (XE_IOCTL_DBG(xe, xe_vm_is_closed_or_banned(vm))) { 768 up_read(&vm->lock); 769 xe_vm_put(vm); 770 return -ENOENT; 771 } 772 773 q = xe_exec_queue_create(xe, vm, logical_mask, 774 args->width, hwe, flags, 775 args->extensions); 776 up_read(&vm->lock); 777 xe_vm_put(vm); 778 if (IS_ERR(q)) 779 return PTR_ERR(q); 780 781 if (xe_vm_in_preempt_fence_mode(vm)) { 782 q->lr.context = dma_fence_context_alloc(1); 783 784 err = xe_vm_add_compute_exec_queue(vm, q); 785 if (XE_IOCTL_DBG(xe, err)) 786 goto put_exec_queue; 787 } 788 789 if (q->vm && q->hwe->hw_engine_group) { 790 err = xe_hw_engine_group_add_exec_queue(q->hwe->hw_engine_group, q); 791 if (err) 792 goto put_exec_queue; 793 } 794 } 795 796 q->xef = xe_file_get(xef); 797 798 /* user id alloc must always be last in ioctl to prevent UAF */ 799 err = xa_alloc(&xef->exec_queue.xa, &id, q, xa_limit_32b, GFP_KERNEL); 800 if (err) 801 goto kill_exec_queue; 802 803 args->exec_queue_id = id; 804 805 return 0; 806 807 kill_exec_queue: 808 xe_exec_queue_kill(q); 809 put_exec_queue: 810 xe_exec_queue_put(q); 811 return err; 812 } 813 814 int xe_exec_queue_get_property_ioctl(struct drm_device *dev, void *data, 815 struct drm_file *file) 816 { 817 struct xe_device *xe = to_xe_device(dev); 818 struct xe_file *xef = to_xe_file(file); 819 struct drm_xe_exec_queue_get_property *args = data; 820 struct xe_exec_queue *q; 821 int ret; 822 823 if (XE_IOCTL_DBG(xe, args->reserved[0] || args->reserved[1])) 824 return -EINVAL; 825 826 q = xe_exec_queue_lookup(xef, args->exec_queue_id); 827 if (XE_IOCTL_DBG(xe, !q)) 828 return -ENOENT; 829 830 switch (args->property) { 831 case DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN: 832 args->value = q->ops->reset_status(q); 833 ret = 0; 834 break; 835 default: 836 ret = -EINVAL; 837 } 838 839 xe_exec_queue_put(q); 840 841 return ret; 842 } 843 844 /** 845 * xe_exec_queue_lrc() - Get the LRC from exec queue. 846 * @q: The exec_queue. 847 * 848 * Retrieves the primary LRC for the exec queue. Note that this function 849 * returns only the first LRC instance, even when multiple parallel LRCs 850 * are configured. 851 * 852 * Return: Pointer to LRC on success, error on failure 853 */ 854 struct xe_lrc *xe_exec_queue_lrc(struct xe_exec_queue *q) 855 { 856 return q->lrc[0]; 857 } 858 859 /** 860 * xe_exec_queue_is_lr() - Whether an exec_queue is long-running 861 * @q: The exec_queue 862 * 863 * Return: True if the exec_queue is long-running, false otherwise. 864 */ 865 bool xe_exec_queue_is_lr(struct xe_exec_queue *q) 866 { 867 return q->vm && xe_vm_in_lr_mode(q->vm) && 868 !(q->flags & EXEC_QUEUE_FLAG_VM); 869 } 870 871 /** 872 * xe_exec_queue_is_idle() - Whether an exec_queue is idle. 873 * @q: The exec_queue 874 * 875 * FIXME: Need to determine what to use as the short-lived 876 * timeline lock for the exec_queues, so that the return value 877 * of this function becomes more than just an advisory 878 * snapshot in time. The timeline lock must protect the 879 * seqno from racing submissions on the same exec_queue. 880 * Typically vm->resv, but user-created timeline locks use the migrate vm 881 * and never grabs the migrate vm->resv so we have a race there. 882 * 883 * Return: True if the exec_queue is idle, false otherwise. 884 */ 885 bool xe_exec_queue_is_idle(struct xe_exec_queue *q) 886 { 887 if (xe_exec_queue_is_parallel(q)) { 888 int i; 889 890 for (i = 0; i < q->width; ++i) { 891 if (xe_lrc_seqno(q->lrc[i]) != 892 q->lrc[i]->fence_ctx.next_seqno - 1) 893 return false; 894 } 895 896 return true; 897 } 898 899 return xe_lrc_seqno(q->lrc[0]) == 900 q->lrc[0]->fence_ctx.next_seqno - 1; 901 } 902 903 /** 904 * xe_exec_queue_update_run_ticks() - Update run time in ticks for this exec queue 905 * from hw 906 * @q: The exec queue 907 * 908 * Update the timestamp saved by HW for this exec queue and save run ticks 909 * calculated by using the delta from last update. 910 */ 911 void xe_exec_queue_update_run_ticks(struct xe_exec_queue *q) 912 { 913 struct xe_device *xe = gt_to_xe(q->gt); 914 struct xe_lrc *lrc; 915 u64 old_ts, new_ts; 916 int idx; 917 918 /* 919 * Jobs that are executed by kernel doesn't have a corresponding xe_file 920 * and thus are not accounted. 921 */ 922 if (!q->xef) 923 return; 924 925 /* Synchronize with unbind while holding the xe file open */ 926 if (!drm_dev_enter(&xe->drm, &idx)) 927 return; 928 /* 929 * Only sample the first LRC. For parallel submission, all of them are 930 * scheduled together and we compensate that below by multiplying by 931 * width - this may introduce errors if that premise is not true and 932 * they don't exit 100% aligned. On the other hand, looping through 933 * the LRCs and reading them in different time could also introduce 934 * errors. 935 */ 936 lrc = q->lrc[0]; 937 new_ts = xe_lrc_update_timestamp(lrc, &old_ts); 938 q->xef->run_ticks[q->class] += (new_ts - old_ts) * q->width; 939 940 drm_dev_exit(idx); 941 } 942 943 /** 944 * xe_exec_queue_kill - permanently stop all execution from an exec queue 945 * @q: The exec queue 946 * 947 * This function permanently stops all activity on an exec queue. If the queue 948 * is actively executing on the HW, it will be kicked off the engine; any 949 * pending jobs are discarded and all future submissions are rejected. 950 * This function is safe to call multiple times. 951 */ 952 void xe_exec_queue_kill(struct xe_exec_queue *q) 953 { 954 struct xe_exec_queue *eq = q, *next; 955 956 list_for_each_entry_safe(eq, next, &eq->multi_gt_list, 957 multi_gt_link) { 958 q->ops->kill(eq); 959 xe_vm_remove_compute_exec_queue(q->vm, eq); 960 } 961 962 q->ops->kill(q); 963 xe_vm_remove_compute_exec_queue(q->vm, q); 964 } 965 966 int xe_exec_queue_destroy_ioctl(struct drm_device *dev, void *data, 967 struct drm_file *file) 968 { 969 struct xe_device *xe = to_xe_device(dev); 970 struct xe_file *xef = to_xe_file(file); 971 struct drm_xe_exec_queue_destroy *args = data; 972 struct xe_exec_queue *q; 973 974 if (XE_IOCTL_DBG(xe, args->pad) || 975 XE_IOCTL_DBG(xe, args->reserved[0] || args->reserved[1])) 976 return -EINVAL; 977 978 mutex_lock(&xef->exec_queue.lock); 979 q = xa_erase(&xef->exec_queue.xa, args->exec_queue_id); 980 if (q) 981 atomic_inc(&xef->exec_queue.pending_removal); 982 mutex_unlock(&xef->exec_queue.lock); 983 984 if (XE_IOCTL_DBG(xe, !q)) 985 return -ENOENT; 986 987 if (q->vm && q->hwe->hw_engine_group) 988 xe_hw_engine_group_del_exec_queue(q->hwe->hw_engine_group, q); 989 990 xe_exec_queue_kill(q); 991 992 trace_xe_exec_queue_close(q); 993 xe_exec_queue_put(q); 994 995 return 0; 996 } 997 998 static void xe_exec_queue_last_fence_lockdep_assert(struct xe_exec_queue *q, 999 struct xe_vm *vm) 1000 { 1001 if (q->flags & EXEC_QUEUE_FLAG_VM) { 1002 lockdep_assert_held(&vm->lock); 1003 } else { 1004 xe_vm_assert_held(vm); 1005 lockdep_assert_held(&q->hwe->hw_engine_group->mode_sem); 1006 } 1007 } 1008 1009 /** 1010 * xe_exec_queue_last_fence_put() - Drop ref to last fence 1011 * @q: The exec queue 1012 * @vm: The VM the engine does a bind or exec for 1013 */ 1014 void xe_exec_queue_last_fence_put(struct xe_exec_queue *q, struct xe_vm *vm) 1015 { 1016 xe_exec_queue_last_fence_lockdep_assert(q, vm); 1017 1018 xe_exec_queue_last_fence_put_unlocked(q); 1019 } 1020 1021 /** 1022 * xe_exec_queue_last_fence_put_unlocked() - Drop ref to last fence unlocked 1023 * @q: The exec queue 1024 * 1025 * Only safe to be called from xe_exec_queue_destroy(). 1026 */ 1027 void xe_exec_queue_last_fence_put_unlocked(struct xe_exec_queue *q) 1028 { 1029 if (q->last_fence) { 1030 dma_fence_put(q->last_fence); 1031 q->last_fence = NULL; 1032 } 1033 } 1034 1035 /** 1036 * xe_exec_queue_last_fence_get() - Get last fence 1037 * @q: The exec queue 1038 * @vm: The VM the engine does a bind or exec for 1039 * 1040 * Get last fence, takes a ref 1041 * 1042 * Returns: last fence if not signaled, dma fence stub if signaled 1043 */ 1044 struct dma_fence *xe_exec_queue_last_fence_get(struct xe_exec_queue *q, 1045 struct xe_vm *vm) 1046 { 1047 struct dma_fence *fence; 1048 1049 xe_exec_queue_last_fence_lockdep_assert(q, vm); 1050 1051 if (q->last_fence && 1052 test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &q->last_fence->flags)) 1053 xe_exec_queue_last_fence_put(q, vm); 1054 1055 fence = q->last_fence ? q->last_fence : dma_fence_get_stub(); 1056 dma_fence_get(fence); 1057 return fence; 1058 } 1059 1060 /** 1061 * xe_exec_queue_last_fence_get_for_resume() - Get last fence 1062 * @q: The exec queue 1063 * @vm: The VM the engine does a bind or exec for 1064 * 1065 * Get last fence, takes a ref. Only safe to be called in the context of 1066 * resuming the hw engine group's long-running exec queue, when the group 1067 * semaphore is held. 1068 * 1069 * Returns: last fence if not signaled, dma fence stub if signaled 1070 */ 1071 struct dma_fence *xe_exec_queue_last_fence_get_for_resume(struct xe_exec_queue *q, 1072 struct xe_vm *vm) 1073 { 1074 struct dma_fence *fence; 1075 1076 lockdep_assert_held_write(&q->hwe->hw_engine_group->mode_sem); 1077 1078 if (q->last_fence && 1079 test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &q->last_fence->flags)) 1080 xe_exec_queue_last_fence_put_unlocked(q); 1081 1082 fence = q->last_fence ? q->last_fence : dma_fence_get_stub(); 1083 dma_fence_get(fence); 1084 return fence; 1085 } 1086 1087 /** 1088 * xe_exec_queue_last_fence_set() - Set last fence 1089 * @q: The exec queue 1090 * @vm: The VM the engine does a bind or exec for 1091 * @fence: The fence 1092 * 1093 * Set the last fence for the engine. Increases reference count for fence, when 1094 * closing engine xe_exec_queue_last_fence_put should be called. 1095 */ 1096 void xe_exec_queue_last_fence_set(struct xe_exec_queue *q, struct xe_vm *vm, 1097 struct dma_fence *fence) 1098 { 1099 xe_exec_queue_last_fence_lockdep_assert(q, vm); 1100 1101 xe_exec_queue_last_fence_put(q, vm); 1102 q->last_fence = dma_fence_get(fence); 1103 } 1104 1105 /** 1106 * xe_exec_queue_last_fence_test_dep - Test last fence dependency of queue 1107 * @q: The exec queue 1108 * @vm: The VM the engine does a bind or exec for 1109 * 1110 * Returns: 1111 * -ETIME if there exists an unsignalled last fence dependency, zero otherwise. 1112 */ 1113 int xe_exec_queue_last_fence_test_dep(struct xe_exec_queue *q, struct xe_vm *vm) 1114 { 1115 struct dma_fence *fence; 1116 int err = 0; 1117 1118 fence = xe_exec_queue_last_fence_get(q, vm); 1119 if (fence) { 1120 err = test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags) ? 1121 0 : -ETIME; 1122 dma_fence_put(fence); 1123 } 1124 1125 return err; 1126 } 1127 1128 /** 1129 * xe_exec_queue_contexts_hwsp_rebase - Re-compute GGTT references 1130 * within all LRCs of a queue. 1131 * @q: the &xe_exec_queue struct instance containing target LRCs 1132 * @scratch: scratch buffer to be used as temporary storage 1133 * 1134 * Returns: zero on success, negative error code on failure 1135 */ 1136 int xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q, void *scratch) 1137 { 1138 int i; 1139 int err = 0; 1140 1141 for (i = 0; i < q->width; ++i) { 1142 struct xe_lrc *lrc; 1143 1144 /* Pairs with WRITE_ONCE in __xe_exec_queue_init */ 1145 lrc = READ_ONCE(q->lrc[i]); 1146 if (!lrc) 1147 continue; 1148 1149 xe_lrc_update_memirq_regs_with_address(lrc, q->hwe, scratch); 1150 xe_lrc_update_hwctx_regs_with_address(lrc); 1151 err = xe_lrc_setup_wa_bb_with_scratch(lrc, q->hwe, scratch); 1152 if (err) 1153 break; 1154 } 1155 1156 return err; 1157 } 1158