1*b40db12bSRiana Tauro /* SPDX-License-Identifier: MIT */ 2*b40db12bSRiana Tauro /* 3*b40db12bSRiana Tauro * Copyright © 2026 Intel Corporation 4*b40db12bSRiana Tauro */ 5*b40db12bSRiana Tauro #ifndef XE_DRM_RAS_H_ 6*b40db12bSRiana Tauro #define XE_DRM_RAS_H_ 7*b40db12bSRiana Tauro 8*b40db12bSRiana Tauro struct xe_device; 9*b40db12bSRiana Tauro 10*b40db12bSRiana Tauro #define for_each_error_severity(i) \ 11*b40db12bSRiana Tauro for (i = 0; i < DRM_XE_RAS_ERR_SEV_MAX; i++) 12*b40db12bSRiana Tauro 13*b40db12bSRiana Tauro int xe_drm_ras_init(struct xe_device *xe); 14*b40db12bSRiana Tauro 15*b40db12bSRiana Tauro #endif 16