1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2021 Intel Corporation 4 */ 5 6 #include "xe_device.h" 7 8 #include <linux/aperture.h> 9 #include <linux/delay.h> 10 #include <linux/fault-inject.h> 11 #include <linux/units.h> 12 13 #include <drm/drm_client.h> 14 #include <drm/drm_gem_ttm_helper.h> 15 #include <drm/drm_ioctl.h> 16 #include <drm/drm_managed.h> 17 #include <drm/drm_pagemap_util.h> 18 #include <drm/drm_print.h> 19 #include <kunit/static_stub.h> 20 #include <uapi/drm/xe_drm.h> 21 22 #include "display/xe_display.h" 23 #include "instructions/xe_gpu_commands.h" 24 #include "regs/xe_gt_regs.h" 25 #include "regs/xe_regs.h" 26 #include "xe_bo.h" 27 #include "xe_bo_evict.h" 28 #include "xe_configfs.h" 29 #include "xe_debugfs.h" 30 #include "xe_defaults.h" 31 #include "xe_devcoredump.h" 32 #include "xe_device_sysfs.h" 33 #include "xe_dma_buf.h" 34 #include "xe_drm_client.h" 35 #include "xe_drv.h" 36 #include "xe_exec.h" 37 #include "xe_exec_queue.h" 38 #include "xe_force_wake.h" 39 #include "xe_ggtt.h" 40 #include "xe_gt.h" 41 #include "xe_gt_mcr.h" 42 #include "xe_gt_printk.h" 43 #include "xe_gt_sriov_vf.h" 44 #include "xe_guc.h" 45 #include "xe_guc_pc.h" 46 #include "xe_hw_engine_group.h" 47 #include "xe_hwmon.h" 48 #include "xe_i2c.h" 49 #include "xe_irq.h" 50 #include "xe_late_bind_fw.h" 51 #include "xe_mmio.h" 52 #include "xe_module.h" 53 #include "xe_nvm.h" 54 #include "xe_oa.h" 55 #include "xe_observation.h" 56 #include "xe_pagefault.h" 57 #include "xe_pat.h" 58 #include "xe_pcode.h" 59 #include "xe_pm.h" 60 #include "xe_pmu.h" 61 #include "xe_psmi.h" 62 #include "xe_pxp.h" 63 #include "xe_query.h" 64 #include "xe_shrinker.h" 65 #include "xe_soc_remapper.h" 66 #include "xe_survivability_mode.h" 67 #include "xe_sriov.h" 68 #include "xe_svm.h" 69 #include "xe_sysctrl.h" 70 #include "xe_tile.h" 71 #include "xe_ttm_stolen_mgr.h" 72 #include "xe_ttm_sys_mgr.h" 73 #include "xe_vm.h" 74 #include "xe_vm_madvise.h" 75 #include "xe_vram.h" 76 #include "xe_vram_types.h" 77 #include "xe_vsec.h" 78 #include "xe_wait_user_fence.h" 79 #include "xe_wa.h" 80 81 #include <generated/xe_device_wa_oob.h> 82 #include <generated/xe_wa_oob.h> 83 84 static int xe_file_open(struct drm_device *dev, struct drm_file *file) 85 { 86 struct xe_device *xe = to_xe_device(dev); 87 struct xe_drm_client *client; 88 struct xe_file *xef; 89 int ret = -ENOMEM; 90 struct task_struct *task = NULL; 91 92 xef = kzalloc_obj(*xef); 93 if (!xef) 94 return ret; 95 96 client = xe_drm_client_alloc(); 97 if (!client) { 98 kfree(xef); 99 return ret; 100 } 101 102 xef->drm = file; 103 xef->client = client; 104 xef->xe = xe; 105 106 mutex_init(&xef->vm.lock); 107 xa_init_flags(&xef->vm.xa, XA_FLAGS_ALLOC1); 108 109 mutex_init(&xef->exec_queue.lock); 110 xa_init_flags(&xef->exec_queue.xa, XA_FLAGS_ALLOC1); 111 112 file->driver_priv = xef; 113 kref_init(&xef->refcount); 114 115 task = get_pid_task(rcu_access_pointer(file->pid), PIDTYPE_PID); 116 if (task) { 117 xef->process_name = kstrdup(task->comm, GFP_KERNEL); 118 xef->pid = task->pid; 119 put_task_struct(task); 120 } 121 122 return 0; 123 } 124 125 static void xe_file_destroy(struct kref *ref) 126 { 127 struct xe_file *xef = container_of(ref, struct xe_file, refcount); 128 129 xa_destroy(&xef->exec_queue.xa); 130 mutex_destroy(&xef->exec_queue.lock); 131 xa_destroy(&xef->vm.xa); 132 mutex_destroy(&xef->vm.lock); 133 134 xe_drm_client_put(xef->client); 135 kfree(xef->process_name); 136 kfree(xef); 137 } 138 139 /** 140 * xe_file_get() - Take a reference to the xe file object 141 * @xef: Pointer to the xe file 142 * 143 * Anyone with a pointer to xef must take a reference to the xe file 144 * object using this call. 145 * 146 * Return: xe file pointer 147 */ 148 struct xe_file *xe_file_get(struct xe_file *xef) 149 { 150 kref_get(&xef->refcount); 151 return xef; 152 } 153 154 /** 155 * xe_file_put() - Drop a reference to the xe file object 156 * @xef: Pointer to the xe file 157 * 158 * Used to drop reference to the xef object 159 */ 160 void xe_file_put(struct xe_file *xef) 161 { 162 kref_put(&xef->refcount, xe_file_destroy); 163 } 164 165 static void xe_file_close(struct drm_device *dev, struct drm_file *file) 166 { 167 struct xe_device *xe = to_xe_device(dev); 168 struct xe_file *xef = file->driver_priv; 169 struct xe_vm *vm; 170 struct xe_exec_queue *q; 171 unsigned long idx; 172 173 guard(xe_pm_runtime)(xe); 174 175 /* 176 * No need for exec_queue.lock here as there is no contention for it 177 * when FD is closing as IOCTLs presumably can't be modifying the 178 * xarray. Taking exec_queue.lock here causes undue dependency on 179 * vm->lock taken during xe_exec_queue_kill(). 180 */ 181 xa_for_each(&xef->exec_queue.xa, idx, q) { 182 if (q->vm && q->hwe->hw_engine_group) 183 xe_hw_engine_group_del_exec_queue(q->hwe->hw_engine_group, q); 184 xe_exec_queue_kill(q); 185 xe_exec_queue_put(q); 186 } 187 xa_for_each(&xef->vm.xa, idx, vm) 188 xe_vm_close_and_put(vm); 189 190 xe_file_put(xef); 191 } 192 193 static const struct drm_ioctl_desc xe_ioctls[] = { 194 DRM_IOCTL_DEF_DRV(XE_DEVICE_QUERY, xe_query_ioctl, DRM_RENDER_ALLOW), 195 DRM_IOCTL_DEF_DRV(XE_GEM_CREATE, xe_gem_create_ioctl, DRM_RENDER_ALLOW), 196 DRM_IOCTL_DEF_DRV(XE_GEM_MMAP_OFFSET, xe_gem_mmap_offset_ioctl, 197 DRM_RENDER_ALLOW), 198 DRM_IOCTL_DEF_DRV(XE_VM_CREATE, xe_vm_create_ioctl, DRM_RENDER_ALLOW), 199 DRM_IOCTL_DEF_DRV(XE_VM_DESTROY, xe_vm_destroy_ioctl, DRM_RENDER_ALLOW), 200 DRM_IOCTL_DEF_DRV(XE_VM_BIND, xe_vm_bind_ioctl, DRM_RENDER_ALLOW), 201 DRM_IOCTL_DEF_DRV(XE_EXEC, xe_exec_ioctl, DRM_RENDER_ALLOW), 202 DRM_IOCTL_DEF_DRV(XE_EXEC_QUEUE_CREATE, xe_exec_queue_create_ioctl, 203 DRM_RENDER_ALLOW), 204 DRM_IOCTL_DEF_DRV(XE_EXEC_QUEUE_DESTROY, xe_exec_queue_destroy_ioctl, 205 DRM_RENDER_ALLOW), 206 DRM_IOCTL_DEF_DRV(XE_EXEC_QUEUE_GET_PROPERTY, xe_exec_queue_get_property_ioctl, 207 DRM_RENDER_ALLOW), 208 DRM_IOCTL_DEF_DRV(XE_WAIT_USER_FENCE, xe_wait_user_fence_ioctl, 209 DRM_RENDER_ALLOW), 210 DRM_IOCTL_DEF_DRV(XE_OBSERVATION, xe_observation_ioctl, DRM_RENDER_ALLOW), 211 DRM_IOCTL_DEF_DRV(XE_MADVISE, xe_vm_madvise_ioctl, DRM_RENDER_ALLOW), 212 DRM_IOCTL_DEF_DRV(XE_VM_QUERY_MEM_RANGE_ATTRS, xe_vm_query_vmas_attrs_ioctl, 213 DRM_RENDER_ALLOW), 214 DRM_IOCTL_DEF_DRV(XE_EXEC_QUEUE_SET_PROPERTY, xe_exec_queue_set_property_ioctl, 215 DRM_RENDER_ALLOW), 216 DRM_IOCTL_DEF_DRV(XE_VM_GET_PROPERTY, xe_vm_get_property_ioctl, 217 DRM_RENDER_ALLOW), 218 }; 219 220 static long xe_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 221 { 222 struct drm_file *file_priv = file->private_data; 223 struct xe_device *xe = to_xe_device(file_priv->minor->dev); 224 long ret; 225 226 if (xe_device_wedged(xe)) 227 return -ECANCELED; 228 229 ACQUIRE(xe_pm_runtime_ioctl, pm)(xe); 230 ret = ACQUIRE_ERR(xe_pm_runtime_ioctl, &pm); 231 if (ret >= 0) 232 ret = drm_ioctl(file, cmd, arg); 233 234 return ret; 235 } 236 237 #ifdef CONFIG_COMPAT 238 static long xe_drm_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 239 { 240 struct drm_file *file_priv = file->private_data; 241 struct xe_device *xe = to_xe_device(file_priv->minor->dev); 242 long ret; 243 244 if (xe_device_wedged(xe)) 245 return -ECANCELED; 246 247 ACQUIRE(xe_pm_runtime_ioctl, pm)(xe); 248 ret = ACQUIRE_ERR(xe_pm_runtime_ioctl, &pm); 249 if (ret >= 0) 250 ret = drm_compat_ioctl(file, cmd, arg); 251 252 return ret; 253 } 254 #else 255 /* similarly to drm_compat_ioctl, let's it be assigned to .compat_ioct unconditionally */ 256 #define xe_drm_compat_ioctl NULL 257 #endif 258 259 static void barrier_open(struct vm_area_struct *vma) 260 { 261 drm_dev_get(vma->vm_private_data); 262 } 263 264 static void barrier_close(struct vm_area_struct *vma) 265 { 266 drm_dev_put(vma->vm_private_data); 267 } 268 269 static void barrier_release_dummy_page(struct drm_device *dev, void *res) 270 { 271 struct page *dummy_page = (struct page *)res; 272 273 __free_page(dummy_page); 274 } 275 276 static vm_fault_t barrier_fault(struct vm_fault *vmf) 277 { 278 struct drm_device *dev = vmf->vma->vm_private_data; 279 struct vm_area_struct *vma = vmf->vma; 280 vm_fault_t ret = VM_FAULT_NOPAGE; 281 pgprot_t prot; 282 int idx; 283 284 prot = vm_get_page_prot(vma->vm_flags); 285 286 if (drm_dev_enter(dev, &idx)) { 287 unsigned long pfn; 288 289 #define LAST_DB_PAGE_OFFSET 0x7ff001 290 pfn = PHYS_PFN(pci_resource_start(to_pci_dev(dev->dev), 0) + 291 LAST_DB_PAGE_OFFSET); 292 ret = vmf_insert_pfn_prot(vma, vma->vm_start, pfn, 293 pgprot_noncached(prot)); 294 drm_dev_exit(idx); 295 } else { 296 struct page *page; 297 298 /* Allocate new dummy page to map all the VA range in this VMA to it*/ 299 page = alloc_page(GFP_KERNEL | __GFP_ZERO); 300 if (!page) 301 return VM_FAULT_OOM; 302 303 /* Set the page to be freed using drmm release action */ 304 if (drmm_add_action_or_reset(dev, barrier_release_dummy_page, page)) 305 return VM_FAULT_OOM; 306 307 ret = vmf_insert_pfn_prot(vma, vma->vm_start, page_to_pfn(page), 308 prot); 309 } 310 311 return ret; 312 } 313 314 static const struct vm_operations_struct vm_ops_barrier = { 315 .open = barrier_open, 316 .close = barrier_close, 317 .fault = barrier_fault, 318 }; 319 320 static int xe_pci_barrier_mmap(struct file *filp, 321 struct vm_area_struct *vma) 322 { 323 struct drm_file *priv = filp->private_data; 324 struct drm_device *dev = priv->minor->dev; 325 struct xe_device *xe = to_xe_device(dev); 326 327 if (!IS_DGFX(xe)) 328 return -EINVAL; 329 330 if (vma->vm_end - vma->vm_start > SZ_4K) 331 return -EINVAL; 332 333 if (is_cow_mapping(vma->vm_flags)) 334 return -EINVAL; 335 336 if (vma->vm_flags & (VM_READ | VM_EXEC)) 337 return -EINVAL; 338 339 vm_flags_clear(vma, VM_MAYREAD | VM_MAYEXEC); 340 vm_flags_set(vma, VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP | VM_IO); 341 vma->vm_ops = &vm_ops_barrier; 342 vma->vm_private_data = dev; 343 drm_dev_get(vma->vm_private_data); 344 345 return 0; 346 } 347 348 static int xe_mmap(struct file *filp, struct vm_area_struct *vma) 349 { 350 struct drm_file *priv = filp->private_data; 351 struct drm_device *dev = priv->minor->dev; 352 353 if (drm_dev_is_unplugged(dev)) 354 return -ENODEV; 355 356 switch (vma->vm_pgoff) { 357 case XE_PCI_BARRIER_MMAP_OFFSET >> XE_PTE_SHIFT: 358 return xe_pci_barrier_mmap(filp, vma); 359 } 360 361 return drm_gem_mmap(filp, vma); 362 } 363 364 static const struct file_operations xe_driver_fops = { 365 .owner = THIS_MODULE, 366 .open = drm_open, 367 .release = drm_release_noglobal, 368 .unlocked_ioctl = xe_drm_ioctl, 369 .mmap = xe_mmap, 370 .poll = drm_poll, 371 .read = drm_read, 372 .compat_ioctl = xe_drm_compat_ioctl, 373 .llseek = noop_llseek, 374 #ifdef CONFIG_PROC_FS 375 .show_fdinfo = drm_show_fdinfo, 376 #endif 377 .fop_flags = FOP_UNSIGNED_OFFSET, 378 }; 379 380 /** 381 * xe_is_xe_file() - Is the file an xe device file? 382 * @file: The file. 383 * 384 * Checks whether the file is opened against 385 * an xe device. 386 * 387 * Return: %true if an xe file, %false if not. 388 */ 389 bool xe_is_xe_file(const struct file *file) 390 { 391 return file->f_op == &xe_driver_fops; 392 } 393 394 static const struct drm_driver regular_driver = { 395 .driver_features = 396 XE_DISPLAY_DRIVER_FEATURES | 397 DRIVER_GEM | 398 DRIVER_RENDER | DRIVER_SYNCOBJ | 399 DRIVER_SYNCOBJ_TIMELINE | DRIVER_GEM_GPUVA, 400 .open = xe_file_open, 401 .postclose = xe_file_close, 402 403 .gem_prime_import = xe_gem_prime_import, 404 405 .dumb_create = xe_bo_dumb_create, 406 .dumb_map_offset = drm_gem_ttm_dumb_map_offset, 407 #ifdef CONFIG_PROC_FS 408 .show_fdinfo = xe_drm_client_fdinfo, 409 #endif 410 .ioctls = xe_ioctls, 411 .num_ioctls = ARRAY_SIZE(xe_ioctls), 412 .fops = &xe_driver_fops, 413 .name = DRIVER_NAME, 414 .desc = DRIVER_DESC, 415 .major = DRIVER_MAJOR, 416 .minor = DRIVER_MINOR, 417 .patchlevel = DRIVER_PATCHLEVEL, 418 XE_DISPLAY_DRIVER_OPS, 419 }; 420 421 #ifdef CONFIG_PCI_IOV 422 static const struct drm_ioctl_desc xe_ioctls_admin_only[] = { 423 DRM_IOCTL_DEF_DRV(XE_DEVICE_QUERY, xe_query_ioctl, DRM_RENDER_ALLOW), 424 DRM_IOCTL_DEF_DRV(XE_OBSERVATION, xe_observation_ioctl, DRM_RENDER_ALLOW), 425 }; 426 427 static const struct drm_driver admin_only_driver = { 428 .driver_features = 429 XE_DISPLAY_DRIVER_FEATURES | 430 DRIVER_GEM | DRIVER_RENDER | DRIVER_GEM_GPUVA, 431 .open = xe_file_open, 432 .postclose = xe_file_close, 433 .ioctls = xe_ioctls_admin_only, 434 .num_ioctls = ARRAY_SIZE(xe_ioctls_admin_only), 435 .fops = &xe_driver_fops, 436 .name = DRIVER_NAME, 437 .desc = DRIVER_DESC, 438 .major = DRIVER_MAJOR, 439 .minor = DRIVER_MINOR, 440 .patchlevel = DRIVER_PATCHLEVEL, 441 XE_DISPLAY_DRIVER_OPS, 442 }; 443 444 /** 445 * xe_device_is_admin_only() - Check whether device is admin only or not. 446 * @xe: the &xe_device to check 447 * 448 * Return: true if the device is admin only, false otherwise. 449 */ 450 bool xe_device_is_admin_only(const struct xe_device *xe) 451 { 452 KUNIT_STATIC_STUB_REDIRECT(xe_device_is_admin_only, xe); 453 return xe->drm.driver == &admin_only_driver; 454 } 455 #endif 456 457 static void xe_device_destroy(struct drm_device *dev, void *dummy) 458 { 459 struct xe_device *xe = to_xe_device(dev); 460 461 xe_bo_dev_fini(&xe->bo_device); 462 463 if (xe->preempt_fence_wq) 464 destroy_workqueue(xe->preempt_fence_wq); 465 466 if (xe->ordered_wq) 467 destroy_workqueue(xe->ordered_wq); 468 469 if (xe->unordered_wq) 470 destroy_workqueue(xe->unordered_wq); 471 472 if (xe->destroy_wq) 473 destroy_workqueue(xe->destroy_wq); 474 475 ttm_device_fini(&xe->ttm); 476 } 477 478 struct xe_device *xe_device_create(struct pci_dev *pdev, 479 const struct pci_device_id *ent) 480 { 481 const struct drm_driver *driver = ®ular_driver; 482 struct xe_device *xe; 483 int err; 484 485 #ifdef CONFIG_PCI_IOV 486 /* 487 * Since XE device is not initialized yet, read from configfs 488 * directly to decide whether we are in admin-only PF mode or not. 489 */ 490 if (xe_configfs_admin_only_pf(pdev)) 491 driver = &admin_only_driver; 492 #endif 493 494 err = aperture_remove_conflicting_pci_devices(pdev, driver->name); 495 if (err) 496 return ERR_PTR(err); 497 498 xe = devm_drm_dev_alloc(&pdev->dev, driver, struct xe_device, drm); 499 if (IS_ERR(xe)) 500 return xe; 501 502 err = ttm_device_init(&xe->ttm, &xe_ttm_funcs, xe->drm.dev, 503 xe->drm.anon_inode->i_mapping, 504 xe->drm.vma_offset_manager, 0); 505 if (WARN_ON(err)) 506 return ERR_PTR(err); 507 508 xe_bo_dev_init(&xe->bo_device); 509 err = drmm_add_action_or_reset(&xe->drm, xe_device_destroy, NULL); 510 if (err) 511 return ERR_PTR(err); 512 513 err = xe_shrinker_create(xe); 514 if (err) 515 return ERR_PTR(err); 516 517 xe->info.devid = pdev->device; 518 xe->info.revid = pdev->revision; 519 xe->info.force_execlist = xe_modparam.force_execlist; 520 xe->atomic_svm_timeslice_ms = 5; 521 xe->min_run_period_lr_ms = 5; 522 523 err = xe_irq_init(xe); 524 if (err) 525 return ERR_PTR(err); 526 527 xe_validation_device_init(&xe->val); 528 529 init_waitqueue_head(&xe->ufence_wq); 530 531 init_rwsem(&xe->usm.lock); 532 533 err = xe_pagemap_shrinker_create(xe); 534 if (err) 535 return ERR_PTR(err); 536 537 xa_init_flags(&xe->usm.asid_to_vm, XA_FLAGS_ALLOC); 538 539 if (IS_ENABLED(CONFIG_DRM_XE_DEBUG)) { 540 /* Trigger a large asid and an early asid wrap. */ 541 u32 asid; 542 543 BUILD_BUG_ON(XE_MAX_ASID < 2); 544 err = xa_alloc_cyclic(&xe->usm.asid_to_vm, &asid, NULL, 545 XA_LIMIT(XE_MAX_ASID - 2, XE_MAX_ASID - 1), 546 &xe->usm.next_asid, GFP_KERNEL); 547 drm_WARN_ON(&xe->drm, err); 548 if (err >= 0) 549 xa_erase(&xe->usm.asid_to_vm, asid); 550 } 551 552 err = xe_bo_pinned_init(xe); 553 if (err) 554 return ERR_PTR(err); 555 556 xe->preempt_fence_wq = alloc_ordered_workqueue("xe-preempt-fence-wq", 557 WQ_MEM_RECLAIM); 558 xe->ordered_wq = alloc_ordered_workqueue("xe-ordered-wq", 0); 559 xe->unordered_wq = alloc_workqueue("xe-unordered-wq", WQ_PERCPU, 0); 560 xe->destroy_wq = alloc_workqueue("xe-destroy-wq", WQ_PERCPU, 0); 561 if (!xe->ordered_wq || !xe->unordered_wq || 562 !xe->preempt_fence_wq || !xe->destroy_wq) { 563 /* 564 * Cleanup done in xe_device_destroy via 565 * drmm_add_action_or_reset register above 566 */ 567 drm_err(&xe->drm, "Failed to allocate xe workqueues\n"); 568 return ERR_PTR(-ENOMEM); 569 } 570 571 err = drmm_mutex_init(&xe->drm, &xe->pmt.lock); 572 if (err) 573 return ERR_PTR(err); 574 575 return xe; 576 } 577 ALLOW_ERROR_INJECTION(xe_device_create, ERRNO); /* See xe_pci_probe() */ 578 579 static bool xe_driver_flr_disabled(struct xe_device *xe) 580 { 581 if (IS_SRIOV_VF(xe)) 582 return true; 583 584 if (xe_mmio_read32(xe_root_tile_mmio(xe), GU_CNTL_PROTECTED) & DRIVERINT_FLR_DIS) { 585 drm_info(&xe->drm, "Driver-FLR disabled by BIOS\n"); 586 return true; 587 } 588 589 return false; 590 } 591 592 /* 593 * The driver-initiated FLR is the highest level of reset that we can trigger 594 * from within the driver. It is different from the PCI FLR in that it doesn't 595 * fully reset the SGUnit and doesn't modify the PCI config space and therefore 596 * it doesn't require a re-enumeration of the PCI BARs. However, the 597 * driver-initiated FLR does still cause a reset of both GT and display and a 598 * memory wipe of local and stolen memory, so recovery would require a full HW 599 * re-init and saving/restoring (or re-populating) the wiped memory. Since we 600 * perform the FLR as the very last action before releasing access to the HW 601 * during the driver release flow, we don't attempt recovery at all, because 602 * if/when a new instance of Xe is bound to the device it will do a full 603 * re-init anyway. 604 */ 605 static void __xe_driver_flr(struct xe_device *xe) 606 { 607 const unsigned int flr_timeout = 3 * USEC_PER_SEC; /* specs recommend a 3s wait */ 608 struct xe_mmio *mmio = xe_root_tile_mmio(xe); 609 int ret; 610 611 drm_dbg(&xe->drm, "Triggering Driver-FLR\n"); 612 613 /* 614 * Make sure any pending FLR requests have cleared by waiting for the 615 * FLR trigger bit to go to zero. Also clear GU_DEBUG's DRIVERFLR_STATUS 616 * to make sure it's not still set from a prior attempt (it's a write to 617 * clear bit). 618 * Note that we should never be in a situation where a previous attempt 619 * is still pending (unless the HW is totally dead), but better to be 620 * safe in case something unexpected happens 621 */ 622 ret = xe_mmio_wait32(mmio, GU_CNTL, DRIVERFLR, 0, flr_timeout, NULL, false); 623 if (ret) { 624 drm_err(&xe->drm, "Driver-FLR-prepare wait for ready failed! %d\n", ret); 625 return; 626 } 627 xe_mmio_write32(mmio, GU_DEBUG, DRIVERFLR_STATUS); 628 629 /* Trigger the actual Driver-FLR */ 630 xe_mmio_rmw32(mmio, GU_CNTL, 0, DRIVERFLR); 631 632 /* Wait for hardware teardown to complete */ 633 ret = xe_mmio_wait32(mmio, GU_CNTL, DRIVERFLR, 0, flr_timeout, NULL, false); 634 if (ret) { 635 drm_err(&xe->drm, "Driver-FLR-teardown wait completion failed! %d\n", ret); 636 return; 637 } 638 639 /* Wait for hardware/firmware re-init to complete */ 640 ret = xe_mmio_wait32(mmio, GU_DEBUG, DRIVERFLR_STATUS, DRIVERFLR_STATUS, 641 flr_timeout, NULL, false); 642 if (ret) { 643 drm_err(&xe->drm, "Driver-FLR-reinit wait completion failed! %d\n", ret); 644 return; 645 } 646 647 /* Clear sticky completion status */ 648 xe_mmio_write32(mmio, GU_DEBUG, DRIVERFLR_STATUS); 649 } 650 651 static void xe_driver_flr(struct xe_device *xe) 652 { 653 if (xe_driver_flr_disabled(xe)) 654 return; 655 656 __xe_driver_flr(xe); 657 } 658 659 static void xe_driver_flr_fini(void *arg) 660 { 661 struct xe_device *xe = arg; 662 663 if (xe->needs_flr_on_fini) 664 xe_driver_flr(xe); 665 } 666 667 static void xe_device_sanitize(void *arg) 668 { 669 struct xe_device *xe = arg; 670 struct xe_gt *gt; 671 u8 id; 672 673 for_each_gt(gt, xe, id) 674 xe_gt_sanitize(gt); 675 } 676 677 static int xe_set_dma_info(struct xe_device *xe) 678 { 679 unsigned int mask_size = xe->info.dma_mask_size; 680 int err; 681 682 dma_set_max_seg_size(xe->drm.dev, xe_sg_segment_size(xe->drm.dev)); 683 684 err = dma_set_mask(xe->drm.dev, DMA_BIT_MASK(mask_size)); 685 if (err) 686 goto mask_err; 687 688 err = dma_set_coherent_mask(xe->drm.dev, DMA_BIT_MASK(mask_size)); 689 if (err) 690 goto mask_err; 691 692 return 0; 693 694 mask_err: 695 drm_err(&xe->drm, "Can't set DMA mask/consistent mask (%d)\n", err); 696 return err; 697 } 698 699 static void assert_lmem_ready(struct xe_device *xe) 700 { 701 if (!IS_DGFX(xe) || IS_SRIOV_VF(xe)) 702 return; 703 704 xe_assert(xe, xe_mmio_read32(xe_root_tile_mmio(xe), GU_CNTL) & 705 LMEM_INIT); 706 } 707 708 static void vf_update_device_info(struct xe_device *xe) 709 { 710 xe_assert(xe, IS_SRIOV_VF(xe)); 711 /* disable features that are not available/applicable to VFs */ 712 xe->info.probe_display = 0; 713 xe->info.has_heci_cscfi = 0; 714 xe->info.has_heci_gscfi = 0; 715 xe->info.has_late_bind = 0; 716 xe->info.skip_guc_pc = 1; 717 xe->info.skip_pcode = 1; 718 } 719 720 static int xe_device_vram_alloc(struct xe_device *xe) 721 { 722 struct xe_vram_region *vram; 723 724 if (!IS_DGFX(xe)) 725 return 0; 726 727 vram = drmm_kzalloc(&xe->drm, sizeof(*vram), GFP_KERNEL); 728 if (!vram) 729 return -ENOMEM; 730 731 xe->mem.vram = vram; 732 return 0; 733 } 734 735 /** 736 * xe_device_probe_early: Device early probe 737 * @xe: xe device instance 738 * 739 * Initialize MMIO resources that don't require any 740 * knowledge about tile count. Also initialize pcode and 741 * check vram initialization on root tile. 742 * 743 * Return: 0 on success, error code on failure 744 */ 745 int xe_device_probe_early(struct xe_device *xe) 746 { 747 int err; 748 749 xe_wa_device_init(xe); 750 xe_wa_process_device_oob(xe); 751 752 err = xe_mmio_probe_early(xe); 753 if (err) 754 return err; 755 756 xe_sriov_probe_early(xe); 757 758 if (xe_device_is_admin_only(xe) && !IS_SRIOV_PF(xe)) { 759 xe_err(xe, "Can't run Admin-only mode without SR-IOV PF mode!\n"); 760 return -ENODEV; 761 } 762 763 if (IS_SRIOV_VF(xe)) 764 vf_update_device_info(xe); 765 766 /* 767 * Check for pcode uncore_init status to confirm if the SoC 768 * initialization is complete. Until done, any MMIO or lmem access from 769 * the driver will be blocked 770 */ 771 err = xe_pcode_probe_early(xe); 772 if (err || xe_survivability_mode_is_requested(xe)) { 773 int save_err = err; 774 775 /* 776 * Try to leave device in survivability mode if device is 777 * possible, but still return the previous error for error 778 * propagation 779 */ 780 err = xe_survivability_mode_boot_enable(xe); 781 if (err) 782 return err; 783 784 return save_err; 785 } 786 787 /* 788 * Make sure the lmem is initialized and ready to use. xe_pcode_ready() 789 * is flagged after full initialization is complete. Assert if lmem is 790 * not initialized. 791 */ 792 assert_lmem_ready(xe); 793 794 xe->wedged.mode = xe_device_validate_wedged_mode(xe, xe_modparam.wedged_mode) ? 795 XE_DEFAULT_WEDGED_MODE : xe_modparam.wedged_mode; 796 drm_dbg(&xe->drm, "wedged_mode: setting mode (%u) %s\n", 797 xe->wedged.mode, xe_wedged_mode_to_string(xe->wedged.mode)); 798 799 err = xe_device_vram_alloc(xe); 800 if (err) 801 return err; 802 803 return 0; 804 } 805 ALLOW_ERROR_INJECTION(xe_device_probe_early, ERRNO); /* See xe_pci_probe() */ 806 807 static int probe_has_flat_ccs(struct xe_device *xe) 808 { 809 struct xe_gt *gt; 810 u32 reg; 811 812 /* Always enabled/disabled, no runtime check to do */ 813 if (GRAPHICS_VER(xe) < 20 || !xe->info.has_flat_ccs || IS_SRIOV_VF(xe)) 814 return 0; 815 816 gt = xe_root_mmio_gt(xe); 817 if (!gt) 818 return 0; 819 820 CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FW_GT); 821 if (!fw_ref.domains) 822 return -ETIMEDOUT; 823 824 reg = xe_gt_mcr_unicast_read_any(gt, XE2_FLAT_CCS_BASE_RANGE_LOWER); 825 xe->info.has_flat_ccs = (reg & XE2_FLAT_CCS_ENABLE); 826 827 if (!xe->info.has_flat_ccs) 828 drm_dbg(&xe->drm, 829 "Flat CCS has been disabled in bios, May lead to performance impact"); 830 831 return 0; 832 } 833 834 /* 835 * Detect if the driver is being run on pre-production hardware. We don't 836 * keep workarounds for pre-production hardware long term, so print an 837 * error and add taint if we're being loaded on a pre-production platform 838 * for which the pre-prod workarounds have already been removed. 839 * 840 * The general policy is that we'll remove any workarounds that only apply to 841 * pre-production hardware around the time force_probe restrictions are lifted 842 * for a platform of the next major IP generation (for example, Xe2 pre-prod 843 * workarounds should be removed around the time the first Xe3 platforms have 844 * force_probe lifted). 845 */ 846 static void detect_preproduction_hw(struct xe_device *xe) 847 { 848 struct xe_gt *gt; 849 int id; 850 851 /* 852 * SR-IOV VFs don't have access to the FUSE2 register, so we can't 853 * check pre-production status there. But the host OS will notice 854 * and report the pre-production status, which should be enough to 855 * help us catch mistaken use of pre-production hardware. 856 */ 857 if (IS_SRIOV_VF(xe)) 858 return; 859 860 /* 861 * The "SW_CAP" fuse contains a bit indicating whether the device is a 862 * production or pre-production device. This fuse is reflected through 863 * the GT "FUSE2" register, even though the contents of the fuse are 864 * not GT-specific. Every GT's reflection of this fuse should show the 865 * same value, so we'll just use the first available GT for lookup. 866 */ 867 for_each_gt(gt, xe, id) 868 break; 869 870 if (!gt) 871 return; 872 873 CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FW_GT); 874 if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FW_GT)) { 875 xe_gt_err(gt, "Forcewake failure; cannot determine production/pre-production hw status.\n"); 876 return; 877 } 878 879 if (xe_mmio_read32(>->mmio, FUSE2) & PRODUCTION_HW) 880 return; 881 882 xe_info(xe, "Pre-production hardware detected.\n"); 883 if (!xe->info.has_pre_prod_wa) { 884 xe_err(xe, "Pre-production workarounds for this platform have already been removed.\n"); 885 add_taint(TAINT_MACHINE_CHECK, LOCKDEP_STILL_OK); 886 } 887 } 888 889 static void xe_device_wedged_fini(struct drm_device *drm, void *arg) 890 { 891 struct xe_device *xe = arg; 892 893 if (atomic_read(&xe->wedged.flag)) 894 xe_pm_runtime_put(xe); 895 } 896 897 int xe_device_probe(struct xe_device *xe) 898 { 899 struct xe_tile *tile; 900 struct xe_gt *gt; 901 int err; 902 u8 id; 903 904 xe_pat_init_early(xe); 905 906 err = xe_sriov_init(xe); 907 if (err) 908 return err; 909 910 xe->info.mem_region_mask = 1; 911 912 err = xe_set_dma_info(xe); 913 if (err) 914 return err; 915 916 err = xe_mmio_probe_tiles(xe); 917 if (err) 918 return err; 919 920 for_each_gt(gt, xe, id) { 921 err = xe_gt_init_early(gt); 922 if (err) 923 return err; 924 } 925 926 for_each_tile(tile, xe, id) { 927 err = xe_ggtt_init_early(tile->mem.ggtt); 928 if (err) 929 return err; 930 } 931 932 /* 933 * From here on, if a step fails, make sure a Driver-FLR is triggereed 934 */ 935 err = devm_add_action_or_reset(xe->drm.dev, xe_driver_flr_fini, xe); 936 if (err) 937 return err; 938 939 err = probe_has_flat_ccs(xe); 940 if (err) 941 return err; 942 943 err = xe_vram_probe(xe); 944 if (err) 945 return err; 946 947 for_each_tile(tile, xe, id) { 948 err = xe_tile_init_noalloc(tile); 949 if (err) 950 return err; 951 } 952 953 /* 954 * Allow allocations only now to ensure xe_display_init_early() 955 * is the first to allocate, always. 956 */ 957 err = xe_ttm_sys_mgr_init(xe); 958 if (err) 959 return err; 960 961 /* Allocate and map stolen after potential VRAM resize */ 962 err = xe_ttm_stolen_mgr_init(xe); 963 if (err) 964 return err; 965 966 /* 967 * Now that GT is initialized (TTM in particular), 968 * we can try to init display, and inherit the initial fb. 969 * This is the reason the first allocation needs to be done 970 * inside display. 971 */ 972 err = xe_display_init_early(xe); 973 if (err) 974 return err; 975 976 for_each_tile(tile, xe, id) { 977 err = xe_tile_init(tile); 978 if (err) 979 return err; 980 } 981 982 err = xe_irq_install(xe); 983 if (err) 984 return err; 985 986 for_each_gt(gt, xe, id) { 987 err = xe_gt_init(gt); 988 if (err) 989 return err; 990 } 991 992 err = xe_pagefault_init(xe); 993 if (err) 994 return err; 995 996 if (xe->tiles->media_gt && 997 XE_GT_WA(xe->tiles->media_gt, 15015404425_disable)) 998 XE_DEVICE_WA_DISABLE(xe, 15015404425); 999 1000 err = xe_devcoredump_init(xe); 1001 if (err) 1002 return err; 1003 1004 xe_nvm_init(xe); 1005 1006 err = xe_soc_remapper_init(xe); 1007 if (err) 1008 return err; 1009 1010 err = xe_heci_gsc_init(xe); 1011 if (err) 1012 return err; 1013 1014 err = xe_late_bind_init(&xe->late_bind); 1015 if (err) 1016 return err; 1017 1018 err = xe_oa_init(xe); 1019 if (err) 1020 return err; 1021 1022 err = xe_display_init(xe); 1023 if (err) 1024 return err; 1025 1026 err = xe_pxp_init(xe); 1027 if (err) 1028 return err; 1029 1030 err = xe_psmi_init(xe); 1031 if (err) 1032 return err; 1033 1034 err = drm_dev_register(&xe->drm, 0); 1035 if (err) 1036 return err; 1037 1038 xe_display_register(xe); 1039 1040 err = xe_oa_register(xe); 1041 if (err) 1042 goto err_unregister_display; 1043 1044 err = xe_pmu_register(&xe->pmu); 1045 if (err) 1046 goto err_unregister_display; 1047 1048 err = xe_sysctrl_init(xe); 1049 if (err) 1050 goto err_unregister_display; 1051 1052 err = xe_device_sysfs_init(xe); 1053 if (err) 1054 goto err_unregister_display; 1055 1056 xe_debugfs_register(xe); 1057 1058 err = xe_hwmon_register(xe); 1059 if (err) 1060 goto err_unregister_display; 1061 1062 err = xe_i2c_probe(xe); 1063 if (err) 1064 goto err_unregister_display; 1065 1066 for_each_gt(gt, xe, id) 1067 xe_gt_sanitize_freq(gt); 1068 1069 xe_vsec_init(xe); 1070 1071 err = xe_sriov_init_late(xe); 1072 if (err) 1073 goto err_unregister_display; 1074 1075 detect_preproduction_hw(xe); 1076 1077 err = drmm_add_action_or_reset(&xe->drm, xe_device_wedged_fini, xe); 1078 if (err) 1079 goto err_unregister_display; 1080 1081 return devm_add_action_or_reset(xe->drm.dev, xe_device_sanitize, xe); 1082 1083 err_unregister_display: 1084 xe_display_unregister(xe); 1085 drm_dev_unregister(&xe->drm); 1086 1087 return err; 1088 } 1089 1090 void xe_device_remove(struct xe_device *xe) 1091 { 1092 xe_display_unregister(xe); 1093 1094 drm_dev_unplug(&xe->drm); 1095 1096 xe_bo_pci_dev_remove_all(xe); 1097 } 1098 1099 void xe_device_shutdown(struct xe_device *xe) 1100 { 1101 struct xe_gt *gt; 1102 u8 id; 1103 1104 drm_dbg(&xe->drm, "Shutting down device\n"); 1105 1106 xe_display_pm_shutdown(xe); 1107 1108 xe_irq_suspend(xe); 1109 1110 for_each_gt(gt, xe, id) 1111 xe_gt_shutdown(gt); 1112 1113 xe_display_pm_shutdown_late(xe); 1114 1115 if (!xe_driver_flr_disabled(xe)) { 1116 /* BOOM! */ 1117 __xe_driver_flr(xe); 1118 } 1119 } 1120 1121 /** 1122 * xe_device_wmb() - Device specific write memory barrier 1123 * @xe: the &xe_device 1124 * 1125 * While wmb() is sufficient for a barrier if we use system memory, on discrete 1126 * platforms with device memory we additionally need to issue a register write. 1127 * Since it doesn't matter which register we write to, use the read-only VF_CAP 1128 * register that is also marked as accessible by the VFs. 1129 */ 1130 void xe_device_wmb(struct xe_device *xe) 1131 { 1132 wmb(); 1133 if (IS_DGFX(xe)) 1134 xe_mmio_write32(xe_root_tile_mmio(xe), VF_CAP_REG, 0); 1135 } 1136 1137 /* 1138 * Issue a TRANSIENT_FLUSH_REQUEST and wait for completion on each gt. 1139 */ 1140 static void tdf_request_sync(struct xe_device *xe) 1141 { 1142 struct xe_gt *gt; 1143 u8 id; 1144 1145 for_each_gt_with_type(gt, xe, id, BIT(XE_GT_TYPE_MAIN)) { 1146 CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FW_GT); 1147 if (!fw_ref.domains) 1148 return; 1149 1150 xe_mmio_write32(>->mmio, XE2_TDF_CTRL, TRANSIENT_FLUSH_REQUEST); 1151 1152 /* 1153 * FIXME: We can likely do better here with our choice of 1154 * timeout. Currently we just assume the worst case, i.e. 150us, 1155 * which is believed to be sufficient to cover the worst case 1156 * scenario on current platforms if all cache entries are 1157 * transient and need to be flushed.. 1158 */ 1159 if (xe_mmio_wait32(>->mmio, XE2_TDF_CTRL, TRANSIENT_FLUSH_REQUEST, 0, 1160 300, NULL, false)) 1161 xe_gt_err_once(gt, "TD flush timeout\n"); 1162 } 1163 } 1164 1165 /** 1166 * xe_device_is_l2_flush_optimized - if L2 flush is optimized by HW 1167 * @xe: The device to check. 1168 * 1169 * Return: true if the HW device optimizing L2 flush, false otherwise. 1170 */ 1171 bool xe_device_is_l2_flush_optimized(struct xe_device *xe) 1172 { 1173 /* XA is *always* flushed, like at the end-of-submssion (and maybe other 1174 * places), just that internally as an optimisation hw doesn't need to make 1175 * that a full flush (which will also include XA) when Media is 1176 * off/powergated, since it doesn't need to worry about GT caches vs Media 1177 * coherency, and only CPU vs GPU coherency, so can make that flush a 1178 * targeted XA flush, since stuff tagged with XA now means it's shared with 1179 * the CPU. The main implication is that we now need to somehow flush non-XA before 1180 * freeing system memory pages, otherwise dirty cachelines could be flushed after the free 1181 * (like if Media suddenly turns on and does a full flush) 1182 */ 1183 if (GRAPHICS_VER(xe) >= 35 && !IS_DGFX(xe)) 1184 return true; 1185 return false; 1186 } 1187 1188 void xe_device_l2_flush(struct xe_device *xe) 1189 { 1190 struct xe_gt *gt; 1191 1192 gt = xe_root_mmio_gt(xe); 1193 if (!gt) 1194 return; 1195 1196 if (!XE_GT_WA(gt, 16023588340)) 1197 return; 1198 1199 CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FW_GT); 1200 if (!fw_ref.domains) 1201 return; 1202 1203 spin_lock(>->global_invl_lock); 1204 1205 xe_mmio_write32(>->mmio, XE2_GLOBAL_INVAL, 0x1); 1206 if (xe_mmio_wait32(>->mmio, XE2_GLOBAL_INVAL, 0x1, 0x0, 1000, NULL, true)) 1207 xe_gt_err_once(gt, "Global invalidation timeout\n"); 1208 1209 spin_unlock(>->global_invl_lock); 1210 } 1211 1212 /** 1213 * xe_device_td_flush() - Flush transient L3 cache entries 1214 * @xe: The device 1215 * 1216 * Display engine has direct access to memory and is never coherent with L3/L4 1217 * caches (or CPU caches), however KMD is responsible for specifically flushing 1218 * transient L3 GPU cache entries prior to the flip sequence to ensure scanout 1219 * can happen from such a surface without seeing corruption. 1220 * 1221 * Display surfaces can be tagged as transient by mapping it using one of the 1222 * various L3:XD PAT index modes on Xe2. 1223 * 1224 * Note: On non-discrete xe2 platforms, like LNL, the entire L3 cache is flushed 1225 * at the end of each submission via PIPE_CONTROL for compute/render, since SA 1226 * Media is not coherent with L3 and we want to support render-vs-media 1227 * usescases. For other engines like copy/blt the HW internally forces uncached 1228 * behaviour, hence why we can skip the TDF on such platforms. 1229 */ 1230 void xe_device_td_flush(struct xe_device *xe) 1231 { 1232 struct xe_gt *root_gt; 1233 1234 /* 1235 * From Xe3p onward the HW takes care of flush of TD entries also along 1236 * with flushing XA entries, which will be at the usual sync points, 1237 * like at the end of submission, so no manual flush is needed here. 1238 */ 1239 if (GRAPHICS_VER(xe) >= 35) 1240 return; 1241 1242 if (!IS_DGFX(xe) || GRAPHICS_VER(xe) < 20) 1243 return; 1244 1245 root_gt = xe_root_mmio_gt(xe); 1246 if (!root_gt) 1247 return; 1248 1249 if (XE_GT_WA(root_gt, 16023588340)) { 1250 /* A transient flush is not sufficient: flush the L2 */ 1251 xe_device_l2_flush(xe); 1252 } else { 1253 xe_guc_pc_apply_flush_freq_limit(&root_gt->uc.guc.pc); 1254 tdf_request_sync(xe); 1255 xe_guc_pc_remove_flush_freq_limit(&root_gt->uc.guc.pc); 1256 } 1257 } 1258 1259 u32 xe_device_ccs_bytes(struct xe_device *xe, u64 size) 1260 { 1261 return xe_device_has_flat_ccs(xe) ? 1262 DIV_ROUND_UP_ULL(size, NUM_BYTES_PER_CCS_BYTE(xe)) : 0; 1263 } 1264 1265 /** 1266 * xe_device_assert_mem_access - Inspect the current runtime_pm state. 1267 * @xe: xe device instance 1268 * 1269 * To be used before any kind of memory access. It will splat a debug warning 1270 * if the device is currently sleeping. But it doesn't guarantee in any way 1271 * that the device is going to remain awake. Xe PM runtime get and put 1272 * functions might be added to the outer bound of the memory access, while 1273 * this check is intended for inner usage to splat some warning if the worst 1274 * case has just happened. 1275 */ 1276 void xe_device_assert_mem_access(struct xe_device *xe) 1277 { 1278 xe_assert(xe, !xe_pm_runtime_suspended(xe)); 1279 } 1280 1281 void xe_device_snapshot_print(struct xe_device *xe, struct drm_printer *p) 1282 { 1283 struct xe_gt *gt; 1284 u8 id; 1285 1286 drm_printf(p, "PCI ID: 0x%04x\n", xe->info.devid); 1287 drm_printf(p, "PCI revision: 0x%02x\n", xe->info.revid); 1288 1289 for_each_gt(gt, xe, id) { 1290 drm_printf(p, "GT id: %u\n", id); 1291 drm_printf(p, "\tTile: %u\n", gt->tile->id); 1292 drm_printf(p, "\tType: %s\n", 1293 gt->info.type == XE_GT_TYPE_MAIN ? "main" : "media"); 1294 drm_printf(p, "\tIP ver: %u.%u.%u\n", 1295 REG_FIELD_GET(GMD_ID_ARCH_MASK, gt->info.gmdid), 1296 REG_FIELD_GET(GMD_ID_RELEASE_MASK, gt->info.gmdid), 1297 REG_FIELD_GET(GMD_ID_REVID, gt->info.gmdid)); 1298 drm_printf(p, "\tCS reference clock: %u\n", gt->info.reference_clock); 1299 } 1300 } 1301 1302 u64 xe_device_canonicalize_addr(struct xe_device *xe, u64 address) 1303 { 1304 return sign_extend64(address, xe->info.va_bits - 1); 1305 } 1306 1307 u64 xe_device_uncanonicalize_addr(struct xe_device *xe, u64 address) 1308 { 1309 return address & GENMASK_ULL(xe->info.va_bits - 1, 0); 1310 } 1311 1312 /** 1313 * DOC: Xe Device Wedging 1314 * 1315 * Xe driver uses drm device wedged uevent as documented in Documentation/gpu/drm-uapi.rst. 1316 * When device is in wedged state, every IOCTL will be blocked and GT cannot 1317 * be used. The conditions under which the driver declares the device wedged 1318 * depend on the wedged mode configuration (see &enum xe_wedged_mode). The 1319 * default recovery method for a wedged state is rebind/bus-reset. 1320 * 1321 * Another recovery method is vendor-specific. Below are the cases that send 1322 * ``WEDGED=vendor-specific`` recovery method in drm device wedged uevent. 1323 * 1324 * Case: Firmware Flash 1325 * -------------------- 1326 * 1327 * Identification Hint 1328 * +++++++++++++++++++ 1329 * 1330 * ``WEDGED=vendor-specific`` drm device wedged uevent with 1331 * :ref:`Runtime Survivability mode <xe-survivability-mode>` is used to notify 1332 * admin/userspace consumer about the need for a firmware flash. 1333 * 1334 * Recovery Procedure 1335 * ++++++++++++++++++ 1336 * 1337 * Once ``WEDGED=vendor-specific`` drm device wedged uevent is received, follow 1338 * the below steps 1339 * 1340 * - Check Runtime Survivability mode sysfs. 1341 * If enabled, firmware flash is required to recover the device. 1342 * 1343 * /sys/bus/pci/devices/<device>/survivability_mode 1344 * 1345 * - Admin/userspace consumer can use firmware flashing tools like fwupd to flash 1346 * firmware and restore device to normal operation. 1347 */ 1348 1349 /** 1350 * xe_device_set_wedged_method - Set wedged recovery method 1351 * @xe: xe device instance 1352 * @method: recovery method to set 1353 * 1354 * Set wedged recovery method to be sent in drm wedged uevent. 1355 */ 1356 void xe_device_set_wedged_method(struct xe_device *xe, unsigned long method) 1357 { 1358 xe->wedged.method = method; 1359 } 1360 1361 /** 1362 * xe_device_declare_wedged - Declare device wedged 1363 * @xe: xe device instance 1364 * 1365 * This is a final state that can only be cleared with the recovery method 1366 * specified in the drm wedged uevent. The method can be set using 1367 * xe_device_set_wedged_method before declaring the device as wedged. If no method 1368 * is set, reprobe (unbind/re-bind) will be sent by default. 1369 * 1370 * In this state every IOCTL will be blocked so the GT cannot be used. 1371 * In general it will be called upon any critical error such as gt reset 1372 * failure or guc loading failure. Userspace will be notified of this state 1373 * through device wedged uevent. 1374 * If xe.wedged module parameter is set to 2, this function will be called 1375 * on every single execution timeout (a.k.a. GPU hang) right after devcoredump 1376 * snapshot capture. In this mode, GT reset won't be attempted so the state of 1377 * the issue is preserved for further debugging. 1378 */ 1379 void xe_device_declare_wedged(struct xe_device *xe) 1380 { 1381 struct xe_gt *gt; 1382 u8 id; 1383 1384 if (xe->wedged.mode == XE_WEDGED_MODE_NEVER) { 1385 drm_dbg(&xe->drm, "Wedged mode is forcibly disabled\n"); 1386 return; 1387 } 1388 1389 if (!atomic_xchg(&xe->wedged.flag, 1)) { 1390 xe->needs_flr_on_fini = true; 1391 xe_pm_runtime_get_noresume(xe); 1392 drm_err(&xe->drm, 1393 "CRITICAL: Xe has declared device %s as wedged.\n" 1394 "IOCTLs and executions are blocked.\n" 1395 "For recovery procedure, refer to https://docs.kernel.org/gpu/drm-uapi.html#device-wedging\n" 1396 "Please file a _new_ bug report at https://gitlab.freedesktop.org/drm/xe/kernel/issues/new\n", 1397 dev_name(xe->drm.dev)); 1398 } 1399 1400 for_each_gt(gt, xe, id) 1401 xe_gt_declare_wedged(gt); 1402 1403 if (xe_device_wedged(xe)) { 1404 /* 1405 * XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET is intended for debugging 1406 * hangs, so wedge the device with 'none' recovery method and have 1407 * it available to the user for debugging. 1408 */ 1409 if (xe->wedged.mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET) 1410 xe_device_set_wedged_method(xe, DRM_WEDGE_RECOVERY_NONE); 1411 /* If no wedge recovery method is set, use default */ 1412 else if (!xe->wedged.method) 1413 xe_device_set_wedged_method(xe, DRM_WEDGE_RECOVERY_REBIND | 1414 DRM_WEDGE_RECOVERY_BUS_RESET); 1415 1416 /* Notify userspace of wedged device */ 1417 drm_dev_wedged_event(&xe->drm, xe->wedged.method, NULL); 1418 } 1419 } 1420 1421 /** 1422 * xe_device_validate_wedged_mode - Check if given mode is supported 1423 * @xe: the &xe_device 1424 * @mode: requested mode to validate 1425 * 1426 * Check whether the provided wedged mode is supported. 1427 * 1428 * Return: 0 if mode is supported, error code otherwise. 1429 */ 1430 int xe_device_validate_wedged_mode(struct xe_device *xe, unsigned int mode) 1431 { 1432 if (mode > XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET) { 1433 drm_dbg(&xe->drm, "wedged_mode: invalid value (%u)\n", mode); 1434 return -EINVAL; 1435 } else if (mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET && (IS_SRIOV_VF(xe) || 1436 (IS_SRIOV_PF(xe) && !IS_ENABLED(CONFIG_DRM_XE_DEBUG)))) { 1437 drm_dbg(&xe->drm, "wedged_mode: (%u) %s mode is not supported for %s\n", 1438 mode, xe_wedged_mode_to_string(mode), 1439 xe_sriov_mode_to_string(xe_device_sriov_mode(xe))); 1440 return -EPERM; 1441 } 1442 1443 return 0; 1444 } 1445 1446 /** 1447 * xe_wedged_mode_to_string - Convert enum value to string. 1448 * @mode: the &xe_wedged_mode to convert 1449 * 1450 * Returns: wedged mode as a user friendly string. 1451 */ 1452 const char *xe_wedged_mode_to_string(enum xe_wedged_mode mode) 1453 { 1454 switch (mode) { 1455 case XE_WEDGED_MODE_NEVER: 1456 return "never"; 1457 case XE_WEDGED_MODE_UPON_CRITICAL_ERROR: 1458 return "upon-critical-error"; 1459 case XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET: 1460 return "upon-any-hang-no-reset"; 1461 default: 1462 return "<invalid>"; 1463 } 1464 } 1465 1466 /** 1467 * xe_device_asid_to_vm() - Find VM from ASID 1468 * @xe: the &xe_device 1469 * @asid: Address space ID 1470 * 1471 * Find a VM from ASID and take a reference to VM which caller must drop. 1472 * Reclaim safe. 1473 * 1474 * Return: VM on success, ERR_PTR on failure 1475 */ 1476 struct xe_vm *xe_device_asid_to_vm(struct xe_device *xe, u32 asid) 1477 { 1478 struct xe_vm *vm; 1479 1480 down_read(&xe->usm.lock); 1481 vm = xa_load(&xe->usm.asid_to_vm, asid); 1482 if (vm) 1483 xe_vm_get(vm); 1484 else 1485 vm = ERR_PTR(-EINVAL); 1486 up_read(&xe->usm.lock); 1487 1488 return vm; 1489 } 1490