1af049be5SLucas De Marchi /* SPDX-License-Identifier: GPL-2.0 AND MIT */ 2af049be5SLucas De Marchi /* 3af049be5SLucas De Marchi * Copyright © 2023 Intel Corporation 4af049be5SLucas De Marchi */ 5af049be5SLucas De Marchi 6af049be5SLucas De Marchi #ifndef _XE_PCI_TEST_H_ 7af049be5SLucas De Marchi #define _XE_PCI_TEST_H_ 8af049be5SLucas De Marchi 96cad2285SLucas De Marchi #include <linux/types.h> 106cad2285SLucas De Marchi 11e4604100SLucas De Marchi #include "xe_platform_types.h" 124ceb8645SMichal Wajdeczko #include "xe_sriov_types.h" 13e4604100SLucas De Marchi 14af049be5SLucas De Marchi struct xe_device; 153713ed52SMatt Roper struct xe_graphics_desc; 163713ed52SMatt Roper struct xe_media_desc; 17af049be5SLucas De Marchi 18af049be5SLucas De Marchi typedef int (*xe_device_fn)(struct xe_device *); 193713ed52SMatt Roper typedef void (*xe_graphics_fn)(const struct xe_graphics_desc *); 203713ed52SMatt Roper typedef void (*xe_media_fn)(const struct xe_media_desc *); 21af049be5SLucas De Marchi 223713ed52SMatt Roper void xe_call_for_each_graphics_ip(xe_graphics_fn xe_fn); 233713ed52SMatt Roper void xe_call_for_each_media_ip(xe_media_fn xe_fn); 24af049be5SLucas De Marchi 255b2a63b4SLucas De Marchi struct xe_pci_fake_data { 264ceb8645SMichal Wajdeczko enum xe_sriov_mode sriov_mode; 275b2a63b4SLucas De Marchi enum xe_platform platform; 285b2a63b4SLucas De Marchi enum xe_subplatform subplatform; 296cad2285SLucas De Marchi u32 graphics_verx100; 306cad2285SLucas De Marchi u32 media_verx100; 316cad2285SLucas De Marchi u32 graphics_step; 326cad2285SLucas De Marchi u32 media_step; 335b2a63b4SLucas De Marchi }; 34e4604100SLucas De Marchi 355b2a63b4SLucas De Marchi int xe_pci_fake_device_init(struct xe_device *xe); 36e4604100SLucas De Marchi 37*8bfab7cdSMichal Wajdeczko const void *xe_pci_live_device_gen_param(const void *prev, char *desc); 38*8bfab7cdSMichal Wajdeczko 39af049be5SLucas De Marchi #endif 40