1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2024 Intel Corporation 4 */ 5 #ifndef _XE_PMT_H_ 6 #define _XE_PMT_H_ 7 8 #include "xe_regs.h" 9 10 #define BMG_PMT_BASE_OFFSET 0xDB000 11 #define BMG_DISCOVERY_OFFSET (SOC_BASE + BMG_PMT_BASE_OFFSET) 12 13 #define PUNIT_TELEMETRY_GUID XE_REG(BMG_DISCOVERY_OFFSET + 0x4) 14 #define BMG_ENERGY_STATUS_PMT_OFFSET (0x30) 15 #define ENERGY_PKG REG_GENMASK64(31, 0) 16 #define ENERGY_CARD REG_GENMASK64(63, 32) 17 18 #define BMG_TELEMETRY_BASE_OFFSET 0xE0000 19 #define BMG_TELEMETRY_OFFSET (SOC_BASE + BMG_TELEMETRY_BASE_OFFSET) 20 21 #define SG_REMAP_INDEX1 XE_REG(SOC_BASE + 0x08) 22 #define SG_REMAP_BITS REG_GENMASK(31, 24) 23 24 #define BMG_MODS_RESIDENCY_OFFSET (0x4D0) 25 #define BMG_G2_RESIDENCY_OFFSET (0x530) 26 #define BMG_G6_RESIDENCY_OFFSET (0x538) 27 #define BMG_G8_RESIDENCY_OFFSET (0x540) 28 #define BMG_G10_RESIDENCY_OFFSET (0x548) 29 30 #define BMG_PCIE_LINK_L0_RESIDENCY_OFFSET (0x570) 31 #define BMG_PCIE_LINK_L1_RESIDENCY_OFFSET (0x578) 32 #define BMG_PCIE_LINK_L1_2_RESIDENCY_OFFSET (0x580) 33 34 #endif 35