1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2021 Intel Corporation 4 */ 5 6 /* for ioread64 */ 7 #include <linux/io-64-nonatomic-lo-hi.h> 8 9 #include "regs/xe_gtt_defs.h" 10 #include "xe_ggtt.h" 11 #include "xe_mmio.h" 12 13 #include "i915_reg.h" 14 #include "intel_atomic_plane.h" 15 #include "intel_crtc.h" 16 #include "intel_display.h" 17 #include "intel_display_types.h" 18 #include "intel_fb.h" 19 #include "intel_fb_pin.h" 20 #include "intel_frontbuffer.h" 21 #include "intel_plane_initial.h" 22 #include "xe_bo.h" 23 #include "xe_wa.h" 24 25 #include <generated/xe_wa_oob.h> 26 27 void intel_plane_initial_vblank_wait(struct intel_crtc *crtc) 28 { 29 /* Early xe has no irq */ 30 struct xe_device *xe = to_xe_device(crtc->base.dev); 31 struct xe_reg pipe_frmtmstmp = XE_REG(i915_mmio_reg_offset(PIPE_FRMTMSTMP(crtc->pipe))); 32 u32 timestamp; 33 int ret; 34 35 timestamp = xe_mmio_read32(xe_root_tile_mmio(xe), pipe_frmtmstmp); 36 37 ret = xe_mmio_wait32_not(xe_root_tile_mmio(xe), pipe_frmtmstmp, ~0U, timestamp, 40000U, ×tamp, false); 38 if (ret < 0) 39 drm_warn(&xe->drm, "waiting for early vblank failed with %i\n", ret); 40 } 41 42 static bool 43 intel_reuse_initial_plane_obj(struct intel_crtc *this, 44 const struct intel_initial_plane_config plane_configs[], 45 struct drm_framebuffer **fb) 46 { 47 struct xe_device *xe = to_xe_device(this->base.dev); 48 struct intel_crtc *crtc; 49 50 for_each_intel_crtc(&xe->drm, crtc) { 51 struct intel_plane *plane = 52 to_intel_plane(crtc->base.primary); 53 const struct intel_plane_state *plane_state = 54 to_intel_plane_state(plane->base.state); 55 const struct intel_crtc_state *crtc_state = 56 to_intel_crtc_state(crtc->base.state); 57 58 if (!crtc_state->uapi.active) 59 continue; 60 61 if (!plane_state->ggtt_vma) 62 continue; 63 64 if (plane_configs[this->pipe].base == plane_configs[crtc->pipe].base) { 65 *fb = plane_state->hw.fb; 66 return true; 67 } 68 } 69 70 return false; 71 } 72 73 static struct xe_bo * 74 initial_plane_bo(struct xe_device *xe, 75 struct intel_initial_plane_config *plane_config) 76 { 77 struct xe_tile *tile0 = xe_device_get_root_tile(xe); 78 struct xe_bo *bo; 79 resource_size_t phys_base; 80 u32 base, size, flags; 81 u64 page_size = xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K; 82 83 if (plane_config->size == 0) 84 return NULL; 85 86 flags = XE_BO_FLAG_PINNED | XE_BO_FLAG_SCANOUT | XE_BO_FLAG_GGTT; 87 88 base = round_down(plane_config->base, page_size); 89 if (IS_DGFX(xe)) { 90 u64 __iomem *gte = tile0->mem.ggtt->gsm; 91 u64 pte; 92 93 gte += base / XE_PAGE_SIZE; 94 95 pte = ioread64(gte); 96 if (!(pte & XE_GGTT_PTE_DM)) { 97 drm_err(&xe->drm, 98 "Initial plane programming missing DM bit\n"); 99 return NULL; 100 } 101 102 phys_base = pte & ~(page_size - 1); 103 flags |= XE_BO_FLAG_VRAM0; 104 105 /* 106 * We don't currently expect this to ever be placed in the 107 * stolen portion. 108 */ 109 if (phys_base >= tile0->mem.vram.usable_size) { 110 drm_err(&xe->drm, 111 "Initial plane programming using invalid range, phys_base=%pa\n", 112 &phys_base); 113 return NULL; 114 } 115 116 drm_dbg(&xe->drm, 117 "Using phys_base=%pa, based on initial plane programming\n", 118 &phys_base); 119 } else { 120 struct ttm_resource_manager *stolen = ttm_manager_type(&xe->ttm, XE_PL_STOLEN); 121 122 if (!stolen) 123 return NULL; 124 phys_base = base; 125 flags |= XE_BO_FLAG_STOLEN; 126 127 if (XE_WA(xe_root_mmio_gt(xe), 22019338487_display)) 128 return NULL; 129 130 /* 131 * If the FB is too big, just don't use it since fbdev is not very 132 * important and we should probably use that space with FBC or other 133 * features. 134 */ 135 if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) && 136 plane_config->size * 2 >> PAGE_SHIFT >= stolen->size) 137 return NULL; 138 } 139 140 size = round_up(plane_config->base + plane_config->size, 141 page_size); 142 size -= base; 143 144 bo = xe_bo_create_pin_map_at(xe, tile0, NULL, size, phys_base, 145 ttm_bo_type_kernel, flags); 146 if (IS_ERR(bo)) { 147 drm_dbg(&xe->drm, 148 "Failed to create bo phys_base=%pa size %u with flags %x: %li\n", 149 &phys_base, size, flags, PTR_ERR(bo)); 150 return NULL; 151 } 152 153 return bo; 154 } 155 156 static bool 157 intel_alloc_initial_plane_obj(struct intel_crtc *crtc, 158 struct intel_initial_plane_config *plane_config) 159 { 160 struct xe_device *xe = to_xe_device(crtc->base.dev); 161 struct drm_mode_fb_cmd2 mode_cmd = { 0 }; 162 struct drm_framebuffer *fb = &plane_config->fb->base; 163 struct xe_bo *bo; 164 165 switch (fb->modifier) { 166 case DRM_FORMAT_MOD_LINEAR: 167 case I915_FORMAT_MOD_X_TILED: 168 case I915_FORMAT_MOD_Y_TILED: 169 case I915_FORMAT_MOD_4_TILED: 170 break; 171 default: 172 drm_dbg_kms(&xe->drm, 173 "Unsupported modifier for initial FB: 0x%llx\n", 174 fb->modifier); 175 return false; 176 } 177 178 mode_cmd.pixel_format = fb->format->format; 179 mode_cmd.width = fb->width; 180 mode_cmd.height = fb->height; 181 mode_cmd.pitches[0] = fb->pitches[0]; 182 mode_cmd.modifier[0] = fb->modifier; 183 mode_cmd.flags = DRM_MODE_FB_MODIFIERS; 184 185 bo = initial_plane_bo(xe, plane_config); 186 if (!bo) 187 return false; 188 189 if (intel_framebuffer_init(to_intel_framebuffer(fb), 190 &bo->ttm.base, &mode_cmd)) { 191 drm_dbg_kms(&xe->drm, "intel fb init failed\n"); 192 goto err_bo; 193 } 194 /* Reference handed over to fb */ 195 xe_bo_put(bo); 196 197 return true; 198 199 err_bo: 200 xe_bo_unpin_map_no_vm(bo); 201 return false; 202 } 203 204 static void 205 intel_find_initial_plane_obj(struct intel_crtc *crtc, 206 struct intel_initial_plane_config plane_configs[]) 207 { 208 struct intel_initial_plane_config *plane_config = 209 &plane_configs[crtc->pipe]; 210 struct intel_plane *plane = 211 to_intel_plane(crtc->base.primary); 212 struct intel_plane_state *plane_state = 213 to_intel_plane_state(plane->base.state); 214 struct drm_framebuffer *fb; 215 struct i915_vma *vma; 216 217 /* 218 * TODO: 219 * Disable planes if get_initial_plane_config() failed. 220 * Make sure things work if the surface base is not page aligned. 221 */ 222 if (!plane_config->fb) 223 return; 224 225 if (intel_alloc_initial_plane_obj(crtc, plane_config)) 226 fb = &plane_config->fb->base; 227 else if (!intel_reuse_initial_plane_obj(crtc, plane_configs, &fb)) 228 goto nofb; 229 230 plane_state->uapi.rotation = plane_config->rotation; 231 intel_fb_fill_view(to_intel_framebuffer(fb), 232 plane_state->uapi.rotation, &plane_state->view); 233 234 vma = intel_fb_pin_to_ggtt(fb, &plane_state->view.gtt, 235 0, 0, 0, false, &plane_state->flags); 236 if (IS_ERR(vma)) 237 goto nofb; 238 239 plane_state->ggtt_vma = vma; 240 plane_state->uapi.src_x = 0; 241 plane_state->uapi.src_y = 0; 242 plane_state->uapi.src_w = fb->width << 16; 243 plane_state->uapi.src_h = fb->height << 16; 244 245 plane_state->uapi.crtc_x = 0; 246 plane_state->uapi.crtc_y = 0; 247 plane_state->uapi.crtc_w = fb->width; 248 plane_state->uapi.crtc_h = fb->height; 249 250 plane_state->uapi.fb = fb; 251 drm_framebuffer_get(fb); 252 253 plane_state->uapi.crtc = &crtc->base; 254 intel_plane_copy_uapi_to_hw_state(plane_state, plane_state, crtc); 255 256 atomic_or(plane->frontbuffer_bit, &to_intel_frontbuffer(fb)->bits); 257 258 plane_config->vma = vma; 259 return; 260 261 nofb: 262 /* 263 * We've failed to reconstruct the BIOS FB. Current display state 264 * indicates that the primary plane is visible, but has a NULL FB, 265 * which will lead to problems later if we don't fix it up. The 266 * simplest solution is to just disable the primary plane now and 267 * pretend the BIOS never had it enabled. 268 */ 269 intel_plane_disable_noatomic(crtc, plane); 270 } 271 272 static void plane_config_fini(struct intel_initial_plane_config *plane_config) 273 { 274 if (plane_config->fb) { 275 struct drm_framebuffer *fb = &plane_config->fb->base; 276 277 /* We may only have the stub and not a full framebuffer */ 278 if (drm_framebuffer_read_refcount(fb)) 279 drm_framebuffer_put(fb); 280 else 281 kfree(fb); 282 } 283 } 284 285 void intel_initial_plane_config(struct intel_display *display) 286 { 287 struct intel_initial_plane_config plane_configs[I915_MAX_PIPES] = {}; 288 struct intel_crtc *crtc; 289 290 for_each_intel_crtc(display->drm, crtc) { 291 struct intel_initial_plane_config *plane_config = 292 &plane_configs[crtc->pipe]; 293 294 if (!to_intel_crtc_state(crtc->base.state)->uapi.active) 295 continue; 296 297 /* 298 * Note that reserving the BIOS fb up front prevents us 299 * from stuffing other stolen allocations like the ring 300 * on top. This prevents some ugliness at boot time, and 301 * can even allow for smooth boot transitions if the BIOS 302 * fb is large enough for the active pipe configuration. 303 */ 304 display->funcs.display->get_initial_plane_config(crtc, plane_config); 305 306 /* 307 * If the fb is shared between multiple heads, we'll 308 * just get the first one. 309 */ 310 intel_find_initial_plane_obj(crtc, plane_configs); 311 312 if (display->funcs.display->fixup_initial_plane_config(crtc, plane_config)) 313 intel_plane_initial_vblank_wait(crtc); 314 315 plane_config_fini(plane_config); 316 } 317 } 318