1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2021 Intel Corporation 4 */ 5 6 /* for ioread64 */ 7 #include <linux/io-64-nonatomic-lo-hi.h> 8 9 #include "regs/xe_gtt_defs.h" 10 #include "xe_ggtt.h" 11 #include "xe_mmio.h" 12 13 #include "intel_crtc.h" 14 #include "intel_display.h" 15 #include "intel_display_core.h" 16 #include "intel_display_regs.h" 17 #include "intel_display_types.h" 18 #include "intel_fb.h" 19 #include "intel_fb_pin.h" 20 #include "intel_frontbuffer.h" 21 #include "intel_plane.h" 22 #include "intel_plane_initial.h" 23 #include "xe_bo.h" 24 #include "xe_vram_types.h" 25 #include "xe_wa.h" 26 27 #include <generated/xe_wa_oob.h> 28 29 void intel_plane_initial_vblank_wait(struct intel_crtc *crtc) 30 { 31 /* Early xe has no irq */ 32 struct xe_device *xe = to_xe_device(crtc->base.dev); 33 struct xe_reg pipe_frmtmstmp = XE_REG(i915_mmio_reg_offset(PIPE_FRMTMSTMP(crtc->pipe))); 34 u32 timestamp; 35 int ret; 36 37 timestamp = xe_mmio_read32(xe_root_tile_mmio(xe), pipe_frmtmstmp); 38 39 ret = xe_mmio_wait32_not(xe_root_tile_mmio(xe), pipe_frmtmstmp, ~0U, timestamp, 40000U, ×tamp, false); 40 if (ret < 0) 41 drm_warn(&xe->drm, "waiting for early vblank failed with %i\n", ret); 42 } 43 44 static bool 45 intel_reuse_initial_plane_obj(struct intel_crtc *this, 46 const struct intel_initial_plane_config plane_configs[], 47 struct drm_framebuffer **fb) 48 { 49 struct xe_device *xe = to_xe_device(this->base.dev); 50 struct intel_crtc *crtc; 51 52 for_each_intel_crtc(&xe->drm, crtc) { 53 struct intel_plane *plane = 54 to_intel_plane(crtc->base.primary); 55 const struct intel_plane_state *plane_state = 56 to_intel_plane_state(plane->base.state); 57 const struct intel_crtc_state *crtc_state = 58 to_intel_crtc_state(crtc->base.state); 59 60 if (!crtc_state->uapi.active) 61 continue; 62 63 if (!plane_state->ggtt_vma) 64 continue; 65 66 if (plane_configs[this->pipe].base == plane_configs[crtc->pipe].base) { 67 *fb = plane_state->hw.fb; 68 return true; 69 } 70 } 71 72 return false; 73 } 74 75 static struct xe_bo * 76 initial_plane_bo(struct xe_device *xe, 77 struct intel_initial_plane_config *plane_config) 78 { 79 struct xe_tile *tile0 = xe_device_get_root_tile(xe); 80 struct xe_bo *bo; 81 resource_size_t phys_base; 82 u32 base, size, flags; 83 u64 page_size = xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K; 84 85 if (plane_config->size == 0) 86 return NULL; 87 88 flags = XE_BO_FLAG_SCANOUT | XE_BO_FLAG_GGTT; 89 90 base = round_down(plane_config->base, page_size); 91 if (IS_DGFX(xe)) { 92 u64 pte = xe_ggtt_read_pte(tile0->mem.ggtt, base); 93 94 if (!(pte & XE_GGTT_PTE_DM)) { 95 drm_err(&xe->drm, 96 "Initial plane programming missing DM bit\n"); 97 return NULL; 98 } 99 100 phys_base = pte & ~(page_size - 1); 101 flags |= XE_BO_FLAG_VRAM0; 102 103 /* 104 * We don't currently expect this to ever be placed in the 105 * stolen portion. 106 */ 107 if (phys_base >= xe_vram_region_usable_size(tile0->mem.vram)) { 108 drm_err(&xe->drm, 109 "Initial plane programming using invalid range, phys_base=%pa\n", 110 &phys_base); 111 return NULL; 112 } 113 114 drm_dbg(&xe->drm, 115 "Using phys_base=%pa, based on initial plane programming\n", 116 &phys_base); 117 } else { 118 struct ttm_resource_manager *stolen = ttm_manager_type(&xe->ttm, XE_PL_STOLEN); 119 120 if (!stolen) 121 return NULL; 122 phys_base = base; 123 flags |= XE_BO_FLAG_STOLEN; 124 125 if (XE_GT_WA(xe_root_mmio_gt(xe), 22019338487_display)) 126 return NULL; 127 128 /* 129 * If the FB is too big, just don't use it since fbdev is not very 130 * important and we should probably use that space with FBC or other 131 * features. 132 */ 133 if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) && 134 plane_config->size * 2 >> PAGE_SHIFT >= stolen->size) 135 return NULL; 136 } 137 138 size = round_up(plane_config->base + plane_config->size, 139 page_size); 140 size -= base; 141 142 bo = xe_bo_create_pin_map_at(xe, tile0, NULL, size, phys_base, 143 ttm_bo_type_kernel, flags); 144 if (IS_ERR(bo)) { 145 drm_dbg(&xe->drm, 146 "Failed to create bo phys_base=%pa size %u with flags %x: %li\n", 147 &phys_base, size, flags, PTR_ERR(bo)); 148 return NULL; 149 } 150 151 return bo; 152 } 153 154 static bool 155 intel_alloc_initial_plane_obj(struct intel_crtc *crtc, 156 struct intel_initial_plane_config *plane_config) 157 { 158 struct xe_device *xe = to_xe_device(crtc->base.dev); 159 struct drm_mode_fb_cmd2 mode_cmd = { 0 }; 160 struct drm_framebuffer *fb = &plane_config->fb->base; 161 struct xe_bo *bo; 162 163 switch (fb->modifier) { 164 case DRM_FORMAT_MOD_LINEAR: 165 case I915_FORMAT_MOD_X_TILED: 166 case I915_FORMAT_MOD_Y_TILED: 167 case I915_FORMAT_MOD_4_TILED: 168 break; 169 default: 170 drm_dbg_kms(&xe->drm, 171 "Unsupported modifier for initial FB: 0x%llx\n", 172 fb->modifier); 173 return false; 174 } 175 176 mode_cmd.pixel_format = fb->format->format; 177 mode_cmd.width = fb->width; 178 mode_cmd.height = fb->height; 179 mode_cmd.pitches[0] = fb->pitches[0]; 180 mode_cmd.modifier[0] = fb->modifier; 181 mode_cmd.flags = DRM_MODE_FB_MODIFIERS; 182 183 bo = initial_plane_bo(xe, plane_config); 184 if (!bo) 185 return false; 186 187 if (intel_framebuffer_init(to_intel_framebuffer(fb), 188 &bo->ttm.base, fb->format, &mode_cmd)) { 189 drm_dbg_kms(&xe->drm, "intel fb init failed\n"); 190 goto err_bo; 191 } 192 /* Reference handed over to fb */ 193 xe_bo_put(bo); 194 195 return true; 196 197 err_bo: 198 xe_bo_unpin_map_no_vm(bo); 199 return false; 200 } 201 202 static void 203 intel_find_initial_plane_obj(struct intel_crtc *crtc, 204 struct intel_initial_plane_config plane_configs[]) 205 { 206 struct intel_initial_plane_config *plane_config = 207 &plane_configs[crtc->pipe]; 208 struct intel_plane *plane = 209 to_intel_plane(crtc->base.primary); 210 struct intel_plane_state *plane_state = 211 to_intel_plane_state(plane->base.state); 212 struct drm_framebuffer *fb; 213 struct i915_vma *vma; 214 215 /* 216 * TODO: 217 * Disable planes if get_initial_plane_config() failed. 218 * Make sure things work if the surface base is not page aligned. 219 */ 220 if (!plane_config->fb) 221 return; 222 223 if (intel_alloc_initial_plane_obj(crtc, plane_config)) 224 fb = &plane_config->fb->base; 225 else if (!intel_reuse_initial_plane_obj(crtc, plane_configs, &fb)) 226 goto nofb; 227 228 plane_state->uapi.rotation = plane_config->rotation; 229 intel_fb_fill_view(to_intel_framebuffer(fb), 230 plane_state->uapi.rotation, &plane_state->view); 231 232 vma = intel_fb_pin_to_ggtt(fb, &plane_state->view.gtt, 233 0, 0, 0, false, &plane_state->flags); 234 if (IS_ERR(vma)) 235 goto nofb; 236 237 plane_state->ggtt_vma = vma; 238 plane_state->uapi.src_x = 0; 239 plane_state->uapi.src_y = 0; 240 plane_state->uapi.src_w = fb->width << 16; 241 plane_state->uapi.src_h = fb->height << 16; 242 243 plane_state->uapi.crtc_x = 0; 244 plane_state->uapi.crtc_y = 0; 245 plane_state->uapi.crtc_w = fb->width; 246 plane_state->uapi.crtc_h = fb->height; 247 248 plane_state->uapi.fb = fb; 249 drm_framebuffer_get(fb); 250 251 plane_state->uapi.crtc = &crtc->base; 252 intel_plane_copy_uapi_to_hw_state(plane_state, plane_state, crtc); 253 254 atomic_or(plane->frontbuffer_bit, &to_intel_frontbuffer(fb)->bits); 255 256 plane_config->vma = vma; 257 return; 258 259 nofb: 260 /* 261 * We've failed to reconstruct the BIOS FB. Current display state 262 * indicates that the primary plane is visible, but has a NULL FB, 263 * which will lead to problems later if we don't fix it up. The 264 * simplest solution is to just disable the primary plane now and 265 * pretend the BIOS never had it enabled. 266 */ 267 intel_plane_disable_noatomic(crtc, plane); 268 } 269 270 static void plane_config_fini(struct intel_initial_plane_config *plane_config) 271 { 272 if (plane_config->fb) { 273 struct drm_framebuffer *fb = &plane_config->fb->base; 274 275 /* We may only have the stub and not a full framebuffer */ 276 if (drm_framebuffer_read_refcount(fb)) 277 drm_framebuffer_put(fb); 278 else 279 kfree(fb); 280 } 281 } 282 283 void intel_initial_plane_config(struct intel_display *display) 284 { 285 struct intel_initial_plane_config plane_configs[I915_MAX_PIPES] = {}; 286 struct intel_crtc *crtc; 287 288 for_each_intel_crtc(display->drm, crtc) { 289 struct intel_initial_plane_config *plane_config = 290 &plane_configs[crtc->pipe]; 291 292 if (!to_intel_crtc_state(crtc->base.state)->uapi.active) 293 continue; 294 295 /* 296 * Note that reserving the BIOS fb up front prevents us 297 * from stuffing other stolen allocations like the ring 298 * on top. This prevents some ugliness at boot time, and 299 * can even allow for smooth boot transitions if the BIOS 300 * fb is large enough for the active pipe configuration. 301 */ 302 display->funcs.display->get_initial_plane_config(crtc, plane_config); 303 304 /* 305 * If the fb is shared between multiple heads, we'll 306 * just get the first one. 307 */ 308 intel_find_initial_plane_obj(crtc, plane_configs); 309 310 if (display->funcs.display->fixup_initial_plane_config(crtc, plane_config)) 311 intel_plane_initial_vblank_wait(crtc); 312 313 plane_config_fini(plane_config); 314 } 315 } 316