1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2021 Intel Corporation 4 */ 5 6 /* for ioread64 */ 7 #include <linux/io-64-nonatomic-lo-hi.h> 8 9 #include "regs/xe_gtt_defs.h" 10 #include "xe_ggtt.h" 11 #include "xe_mmio.h" 12 13 #include "intel_crtc.h" 14 #include "intel_display.h" 15 #include "intel_display_core.h" 16 #include "intel_display_regs.h" 17 #include "intel_display_types.h" 18 #include "intel_fb.h" 19 #include "intel_fb_pin.h" 20 #include "intel_frontbuffer.h" 21 #include "intel_plane.h" 22 #include "intel_plane_initial.h" 23 #include "xe_bo.h" 24 #include "xe_wa.h" 25 26 #include <generated/xe_wa_oob.h> 27 28 void intel_plane_initial_vblank_wait(struct intel_crtc *crtc) 29 { 30 /* Early xe has no irq */ 31 struct xe_device *xe = to_xe_device(crtc->base.dev); 32 struct xe_reg pipe_frmtmstmp = XE_REG(i915_mmio_reg_offset(PIPE_FRMTMSTMP(crtc->pipe))); 33 u32 timestamp; 34 int ret; 35 36 timestamp = xe_mmio_read32(xe_root_tile_mmio(xe), pipe_frmtmstmp); 37 38 ret = xe_mmio_wait32_not(xe_root_tile_mmio(xe), pipe_frmtmstmp, ~0U, timestamp, 40000U, ×tamp, false); 39 if (ret < 0) 40 drm_warn(&xe->drm, "waiting for early vblank failed with %i\n", ret); 41 } 42 43 static bool 44 intel_reuse_initial_plane_obj(struct intel_crtc *this, 45 const struct intel_initial_plane_config plane_configs[], 46 struct drm_framebuffer **fb) 47 { 48 struct xe_device *xe = to_xe_device(this->base.dev); 49 struct intel_crtc *crtc; 50 51 for_each_intel_crtc(&xe->drm, crtc) { 52 struct intel_plane *plane = 53 to_intel_plane(crtc->base.primary); 54 const struct intel_plane_state *plane_state = 55 to_intel_plane_state(plane->base.state); 56 const struct intel_crtc_state *crtc_state = 57 to_intel_crtc_state(crtc->base.state); 58 59 if (!crtc_state->uapi.active) 60 continue; 61 62 if (!plane_state->ggtt_vma) 63 continue; 64 65 if (plane_configs[this->pipe].base == plane_configs[crtc->pipe].base) { 66 *fb = plane_state->hw.fb; 67 return true; 68 } 69 } 70 71 return false; 72 } 73 74 static struct xe_bo * 75 initial_plane_bo(struct xe_device *xe, 76 struct intel_initial_plane_config *plane_config) 77 { 78 struct xe_tile *tile0 = xe_device_get_root_tile(xe); 79 struct xe_bo *bo; 80 resource_size_t phys_base; 81 u32 base, size, flags; 82 u64 page_size = xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K; 83 84 if (plane_config->size == 0) 85 return NULL; 86 87 flags = XE_BO_FLAG_SCANOUT | XE_BO_FLAG_GGTT; 88 89 base = round_down(plane_config->base, page_size); 90 if (IS_DGFX(xe)) { 91 u64 pte = xe_ggtt_read_pte(tile0->mem.ggtt, base); 92 93 if (!(pte & XE_GGTT_PTE_DM)) { 94 drm_err(&xe->drm, 95 "Initial plane programming missing DM bit\n"); 96 return NULL; 97 } 98 99 phys_base = pte & ~(page_size - 1); 100 flags |= XE_BO_FLAG_VRAM0; 101 102 /* 103 * We don't currently expect this to ever be placed in the 104 * stolen portion. 105 */ 106 if (phys_base >= tile0->mem.vram.usable_size) { 107 drm_err(&xe->drm, 108 "Initial plane programming using invalid range, phys_base=%pa\n", 109 &phys_base); 110 return NULL; 111 } 112 113 drm_dbg(&xe->drm, 114 "Using phys_base=%pa, based on initial plane programming\n", 115 &phys_base); 116 } else { 117 struct ttm_resource_manager *stolen = ttm_manager_type(&xe->ttm, XE_PL_STOLEN); 118 119 if (!stolen) 120 return NULL; 121 phys_base = base; 122 flags |= XE_BO_FLAG_STOLEN; 123 124 if (XE_WA(xe_root_mmio_gt(xe), 22019338487_display)) 125 return NULL; 126 127 /* 128 * If the FB is too big, just don't use it since fbdev is not very 129 * important and we should probably use that space with FBC or other 130 * features. 131 */ 132 if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) && 133 plane_config->size * 2 >> PAGE_SHIFT >= stolen->size) 134 return NULL; 135 } 136 137 size = round_up(plane_config->base + plane_config->size, 138 page_size); 139 size -= base; 140 141 bo = xe_bo_create_pin_map_at(xe, tile0, NULL, size, phys_base, 142 ttm_bo_type_kernel, flags); 143 if (IS_ERR(bo)) { 144 drm_dbg(&xe->drm, 145 "Failed to create bo phys_base=%pa size %u with flags %x: %li\n", 146 &phys_base, size, flags, PTR_ERR(bo)); 147 return NULL; 148 } 149 150 return bo; 151 } 152 153 static bool 154 intel_alloc_initial_plane_obj(struct intel_crtc *crtc, 155 struct intel_initial_plane_config *plane_config) 156 { 157 struct xe_device *xe = to_xe_device(crtc->base.dev); 158 struct drm_mode_fb_cmd2 mode_cmd = { 0 }; 159 struct drm_framebuffer *fb = &plane_config->fb->base; 160 struct xe_bo *bo; 161 162 switch (fb->modifier) { 163 case DRM_FORMAT_MOD_LINEAR: 164 case I915_FORMAT_MOD_X_TILED: 165 case I915_FORMAT_MOD_Y_TILED: 166 case I915_FORMAT_MOD_4_TILED: 167 break; 168 default: 169 drm_dbg_kms(&xe->drm, 170 "Unsupported modifier for initial FB: 0x%llx\n", 171 fb->modifier); 172 return false; 173 } 174 175 mode_cmd.pixel_format = fb->format->format; 176 mode_cmd.width = fb->width; 177 mode_cmd.height = fb->height; 178 mode_cmd.pitches[0] = fb->pitches[0]; 179 mode_cmd.modifier[0] = fb->modifier; 180 mode_cmd.flags = DRM_MODE_FB_MODIFIERS; 181 182 bo = initial_plane_bo(xe, plane_config); 183 if (!bo) 184 return false; 185 186 if (intel_framebuffer_init(to_intel_framebuffer(fb), 187 &bo->ttm.base, fb->format, &mode_cmd)) { 188 drm_dbg_kms(&xe->drm, "intel fb init failed\n"); 189 goto err_bo; 190 } 191 /* Reference handed over to fb */ 192 xe_bo_put(bo); 193 194 return true; 195 196 err_bo: 197 xe_bo_unpin_map_no_vm(bo); 198 return false; 199 } 200 201 static void 202 intel_find_initial_plane_obj(struct intel_crtc *crtc, 203 struct intel_initial_plane_config plane_configs[]) 204 { 205 struct intel_initial_plane_config *plane_config = 206 &plane_configs[crtc->pipe]; 207 struct intel_plane *plane = 208 to_intel_plane(crtc->base.primary); 209 struct intel_plane_state *plane_state = 210 to_intel_plane_state(plane->base.state); 211 struct drm_framebuffer *fb; 212 struct i915_vma *vma; 213 214 /* 215 * TODO: 216 * Disable planes if get_initial_plane_config() failed. 217 * Make sure things work if the surface base is not page aligned. 218 */ 219 if (!plane_config->fb) 220 return; 221 222 if (intel_alloc_initial_plane_obj(crtc, plane_config)) 223 fb = &plane_config->fb->base; 224 else if (!intel_reuse_initial_plane_obj(crtc, plane_configs, &fb)) 225 goto nofb; 226 227 plane_state->uapi.rotation = plane_config->rotation; 228 intel_fb_fill_view(to_intel_framebuffer(fb), 229 plane_state->uapi.rotation, &plane_state->view); 230 231 vma = intel_fb_pin_to_ggtt(fb, &plane_state->view.gtt, 232 0, 0, 0, false, &plane_state->flags); 233 if (IS_ERR(vma)) 234 goto nofb; 235 236 plane_state->ggtt_vma = vma; 237 plane_state->uapi.src_x = 0; 238 plane_state->uapi.src_y = 0; 239 plane_state->uapi.src_w = fb->width << 16; 240 plane_state->uapi.src_h = fb->height << 16; 241 242 plane_state->uapi.crtc_x = 0; 243 plane_state->uapi.crtc_y = 0; 244 plane_state->uapi.crtc_w = fb->width; 245 plane_state->uapi.crtc_h = fb->height; 246 247 plane_state->uapi.fb = fb; 248 drm_framebuffer_get(fb); 249 250 plane_state->uapi.crtc = &crtc->base; 251 intel_plane_copy_uapi_to_hw_state(plane_state, plane_state, crtc); 252 253 atomic_or(plane->frontbuffer_bit, &to_intel_frontbuffer(fb)->bits); 254 255 plane_config->vma = vma; 256 return; 257 258 nofb: 259 /* 260 * We've failed to reconstruct the BIOS FB. Current display state 261 * indicates that the primary plane is visible, but has a NULL FB, 262 * which will lead to problems later if we don't fix it up. The 263 * simplest solution is to just disable the primary plane now and 264 * pretend the BIOS never had it enabled. 265 */ 266 intel_plane_disable_noatomic(crtc, plane); 267 } 268 269 static void plane_config_fini(struct intel_initial_plane_config *plane_config) 270 { 271 if (plane_config->fb) { 272 struct drm_framebuffer *fb = &plane_config->fb->base; 273 274 /* We may only have the stub and not a full framebuffer */ 275 if (drm_framebuffer_read_refcount(fb)) 276 drm_framebuffer_put(fb); 277 else 278 kfree(fb); 279 } 280 } 281 282 void intel_initial_plane_config(struct intel_display *display) 283 { 284 struct intel_initial_plane_config plane_configs[I915_MAX_PIPES] = {}; 285 struct intel_crtc *crtc; 286 287 for_each_intel_crtc(display->drm, crtc) { 288 struct intel_initial_plane_config *plane_config = 289 &plane_configs[crtc->pipe]; 290 291 if (!to_intel_crtc_state(crtc->base.state)->uapi.active) 292 continue; 293 294 /* 295 * Note that reserving the BIOS fb up front prevents us 296 * from stuffing other stolen allocations like the ring 297 * on top. This prevents some ugliness at boot time, and 298 * can even allow for smooth boot transitions if the BIOS 299 * fb is large enough for the active pipe configuration. 300 */ 301 display->funcs.display->get_initial_plane_config(crtc, plane_config); 302 303 /* 304 * If the fb is shared between multiple heads, we'll 305 * just get the first one. 306 */ 307 intel_find_initial_plane_obj(crtc, plane_configs); 308 309 if (display->funcs.display->fixup_initial_plane_config(crtc, plane_config)) 310 intel_plane_initial_vblank_wait(crtc); 311 312 plane_config_fini(plane_config); 313 } 314 } 315