1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2021 Intel Corporation 4 */ 5 6 /* for ioread64 */ 7 #include <linux/io-64-nonatomic-lo-hi.h> 8 9 #include "regs/xe_gtt_defs.h" 10 #include "xe_ggtt.h" 11 #include "xe_mmio.h" 12 13 #include "i915_reg.h" 14 #include "intel_atomic_plane.h" 15 #include "intel_crtc.h" 16 #include "intel_display.h" 17 #include "intel_display_types.h" 18 #include "intel_fb.h" 19 #include "intel_fb_pin.h" 20 #include "intel_frontbuffer.h" 21 #include "intel_plane_initial.h" 22 #include "xe_bo.h" 23 #include "xe_wa.h" 24 25 #include <generated/xe_wa_oob.h> 26 27 void intel_plane_initial_vblank_wait(struct intel_crtc *crtc) 28 { 29 /* Early xe has no irq */ 30 struct xe_device *xe = to_xe_device(crtc->base.dev); 31 struct xe_reg pipe_frmtmstmp = XE_REG(i915_mmio_reg_offset(PIPE_FRMTMSTMP(crtc->pipe))); 32 u32 timestamp; 33 int ret; 34 35 timestamp = xe_mmio_read32(xe_root_tile_mmio(xe), pipe_frmtmstmp); 36 37 ret = xe_mmio_wait32_not(xe_root_tile_mmio(xe), pipe_frmtmstmp, ~0U, timestamp, 40000U, ×tamp, false); 38 if (ret < 0) 39 drm_warn(&xe->drm, "waiting for early vblank failed with %i\n", ret); 40 } 41 42 static bool 43 intel_reuse_initial_plane_obj(struct intel_crtc *this, 44 const struct intel_initial_plane_config plane_configs[], 45 struct drm_framebuffer **fb) 46 { 47 struct xe_device *xe = to_xe_device(this->base.dev); 48 struct intel_crtc *crtc; 49 50 for_each_intel_crtc(&xe->drm, crtc) { 51 struct intel_plane *plane = 52 to_intel_plane(crtc->base.primary); 53 const struct intel_plane_state *plane_state = 54 to_intel_plane_state(plane->base.state); 55 const struct intel_crtc_state *crtc_state = 56 to_intel_crtc_state(crtc->base.state); 57 58 if (!crtc_state->uapi.active) 59 continue; 60 61 if (!plane_state->ggtt_vma) 62 continue; 63 64 if (plane_configs[this->pipe].base == plane_configs[crtc->pipe].base) { 65 *fb = plane_state->hw.fb; 66 return true; 67 } 68 } 69 70 return false; 71 } 72 73 static struct xe_bo * 74 initial_plane_bo(struct xe_device *xe, 75 struct intel_initial_plane_config *plane_config) 76 { 77 struct xe_tile *tile0 = xe_device_get_root_tile(xe); 78 struct xe_bo *bo; 79 resource_size_t phys_base; 80 u32 base, size, flags; 81 u64 page_size = xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K; 82 83 if (plane_config->size == 0) 84 return NULL; 85 86 flags = XE_BO_FLAG_SCANOUT | XE_BO_FLAG_GGTT; 87 88 base = round_down(plane_config->base, page_size); 89 if (IS_DGFX(xe)) { 90 u64 pte = xe_ggtt_read_pte(tile0->mem.ggtt, base); 91 92 if (!(pte & XE_GGTT_PTE_DM)) { 93 drm_err(&xe->drm, 94 "Initial plane programming missing DM bit\n"); 95 return NULL; 96 } 97 98 phys_base = pte & ~(page_size - 1); 99 flags |= XE_BO_FLAG_VRAM0; 100 101 /* 102 * We don't currently expect this to ever be placed in the 103 * stolen portion. 104 */ 105 if (phys_base >= tile0->mem.vram.usable_size) { 106 drm_err(&xe->drm, 107 "Initial plane programming using invalid range, phys_base=%pa\n", 108 &phys_base); 109 return NULL; 110 } 111 112 drm_dbg(&xe->drm, 113 "Using phys_base=%pa, based on initial plane programming\n", 114 &phys_base); 115 } else { 116 struct ttm_resource_manager *stolen = ttm_manager_type(&xe->ttm, XE_PL_STOLEN); 117 118 if (!stolen) 119 return NULL; 120 phys_base = base; 121 flags |= XE_BO_FLAG_STOLEN; 122 123 if (XE_WA(xe_root_mmio_gt(xe), 22019338487_display)) 124 return NULL; 125 126 /* 127 * If the FB is too big, just don't use it since fbdev is not very 128 * important and we should probably use that space with FBC or other 129 * features. 130 */ 131 if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) && 132 plane_config->size * 2 >> PAGE_SHIFT >= stolen->size) 133 return NULL; 134 } 135 136 size = round_up(plane_config->base + plane_config->size, 137 page_size); 138 size -= base; 139 140 bo = xe_bo_create_pin_map_at(xe, tile0, NULL, size, phys_base, 141 ttm_bo_type_kernel, flags); 142 if (IS_ERR(bo)) { 143 drm_dbg(&xe->drm, 144 "Failed to create bo phys_base=%pa size %u with flags %x: %li\n", 145 &phys_base, size, flags, PTR_ERR(bo)); 146 return NULL; 147 } 148 149 return bo; 150 } 151 152 static bool 153 intel_alloc_initial_plane_obj(struct intel_crtc *crtc, 154 struct intel_initial_plane_config *plane_config) 155 { 156 struct xe_device *xe = to_xe_device(crtc->base.dev); 157 struct drm_mode_fb_cmd2 mode_cmd = { 0 }; 158 struct drm_framebuffer *fb = &plane_config->fb->base; 159 struct xe_bo *bo; 160 161 switch (fb->modifier) { 162 case DRM_FORMAT_MOD_LINEAR: 163 case I915_FORMAT_MOD_X_TILED: 164 case I915_FORMAT_MOD_Y_TILED: 165 case I915_FORMAT_MOD_4_TILED: 166 break; 167 default: 168 drm_dbg_kms(&xe->drm, 169 "Unsupported modifier for initial FB: 0x%llx\n", 170 fb->modifier); 171 return false; 172 } 173 174 mode_cmd.pixel_format = fb->format->format; 175 mode_cmd.width = fb->width; 176 mode_cmd.height = fb->height; 177 mode_cmd.pitches[0] = fb->pitches[0]; 178 mode_cmd.modifier[0] = fb->modifier; 179 mode_cmd.flags = DRM_MODE_FB_MODIFIERS; 180 181 bo = initial_plane_bo(xe, plane_config); 182 if (!bo) 183 return false; 184 185 if (intel_framebuffer_init(to_intel_framebuffer(fb), 186 &bo->ttm.base, &mode_cmd)) { 187 drm_dbg_kms(&xe->drm, "intel fb init failed\n"); 188 goto err_bo; 189 } 190 /* Reference handed over to fb */ 191 xe_bo_put(bo); 192 193 return true; 194 195 err_bo: 196 xe_bo_unpin_map_no_vm(bo); 197 return false; 198 } 199 200 static void 201 intel_find_initial_plane_obj(struct intel_crtc *crtc, 202 struct intel_initial_plane_config plane_configs[]) 203 { 204 struct intel_initial_plane_config *plane_config = 205 &plane_configs[crtc->pipe]; 206 struct intel_plane *plane = 207 to_intel_plane(crtc->base.primary); 208 struct intel_plane_state *plane_state = 209 to_intel_plane_state(plane->base.state); 210 struct drm_framebuffer *fb; 211 struct i915_vma *vma; 212 213 /* 214 * TODO: 215 * Disable planes if get_initial_plane_config() failed. 216 * Make sure things work if the surface base is not page aligned. 217 */ 218 if (!plane_config->fb) 219 return; 220 221 if (intel_alloc_initial_plane_obj(crtc, plane_config)) 222 fb = &plane_config->fb->base; 223 else if (!intel_reuse_initial_plane_obj(crtc, plane_configs, &fb)) 224 goto nofb; 225 226 plane_state->uapi.rotation = plane_config->rotation; 227 intel_fb_fill_view(to_intel_framebuffer(fb), 228 plane_state->uapi.rotation, &plane_state->view); 229 230 vma = intel_fb_pin_to_ggtt(fb, &plane_state->view.gtt, 231 0, 0, 0, false, &plane_state->flags); 232 if (IS_ERR(vma)) 233 goto nofb; 234 235 plane_state->ggtt_vma = vma; 236 plane_state->uapi.src_x = 0; 237 plane_state->uapi.src_y = 0; 238 plane_state->uapi.src_w = fb->width << 16; 239 plane_state->uapi.src_h = fb->height << 16; 240 241 plane_state->uapi.crtc_x = 0; 242 plane_state->uapi.crtc_y = 0; 243 plane_state->uapi.crtc_w = fb->width; 244 plane_state->uapi.crtc_h = fb->height; 245 246 plane_state->uapi.fb = fb; 247 drm_framebuffer_get(fb); 248 249 plane_state->uapi.crtc = &crtc->base; 250 intel_plane_copy_uapi_to_hw_state(plane_state, plane_state, crtc); 251 252 atomic_or(plane->frontbuffer_bit, &to_intel_frontbuffer(fb)->bits); 253 254 plane_config->vma = vma; 255 return; 256 257 nofb: 258 /* 259 * We've failed to reconstruct the BIOS FB. Current display state 260 * indicates that the primary plane is visible, but has a NULL FB, 261 * which will lead to problems later if we don't fix it up. The 262 * simplest solution is to just disable the primary plane now and 263 * pretend the BIOS never had it enabled. 264 */ 265 intel_plane_disable_noatomic(crtc, plane); 266 } 267 268 static void plane_config_fini(struct intel_initial_plane_config *plane_config) 269 { 270 if (plane_config->fb) { 271 struct drm_framebuffer *fb = &plane_config->fb->base; 272 273 /* We may only have the stub and not a full framebuffer */ 274 if (drm_framebuffer_read_refcount(fb)) 275 drm_framebuffer_put(fb); 276 else 277 kfree(fb); 278 } 279 } 280 281 void intel_initial_plane_config(struct intel_display *display) 282 { 283 struct intel_initial_plane_config plane_configs[I915_MAX_PIPES] = {}; 284 struct intel_crtc *crtc; 285 286 for_each_intel_crtc(display->drm, crtc) { 287 struct intel_initial_plane_config *plane_config = 288 &plane_configs[crtc->pipe]; 289 290 if (!to_intel_crtc_state(crtc->base.state)->uapi.active) 291 continue; 292 293 /* 294 * Note that reserving the BIOS fb up front prevents us 295 * from stuffing other stolen allocations like the ring 296 * on top. This prevents some ugliness at boot time, and 297 * can even allow for smooth boot transitions if the BIOS 298 * fb is large enough for the active pipe configuration. 299 */ 300 display->funcs.display->get_initial_plane_config(crtc, plane_config); 301 302 /* 303 * If the fb is shared between multiple heads, we'll 304 * just get the first one. 305 */ 306 intel_find_initial_plane_obj(crtc, plane_configs); 307 308 if (display->funcs.display->fixup_initial_plane_config(crtc, plane_config)) 309 intel_plane_initial_vblank_wait(crtc); 310 311 plane_config_fini(plane_config); 312 } 313 } 314